From patchwork Tue Apr 11 07:01:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 125894 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5B2CE42919; Tue, 11 Apr 2023 09:01:40 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D616540DFD; Tue, 11 Apr 2023 09:01:39 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 6E20440A8B for ; Tue, 11 Apr 2023 09:01:38 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33ALExMj020822 for ; Tue, 11 Apr 2023 00:01:37 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=yRfCxH+lxXhUE/Bww+A5PAr02kux8G4Cc4v5Pg1mhNg=; b=CCBCwl0xgKzIWNd5/Iv/ul7ClPtjvQTUB7KbioGbMguHvPdVme3iRtcHnbV/I+vFyTFG i4mvNq4H3DNY1rhKc0WoHeAwPtzRzMDFfHqRuujOmVOIw0COUoTSmTUJdj66Y1g3lBfj azPDsrORMBmry+Kjd6b36InkdORS3T72MQrxo1bF3x0FCIoTGZWbmmTD5VlpYphpDYgv pAcZ7qtPZ9d6Aso79AoNH0SbzEIqX0f5pHgDZEzja5GfJe8hHao0V7zI2Iko0+OvTNGn IL0ICzJ9+1ePqMPwND8HxmuIzYQI2C+wt7MQbiBdanzM3GZl+7/JwfRX8ToCWFN9W0io Dg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pvt73abss-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 11 Apr 2023 00:01:36 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 11 Apr 2023 00:01:35 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 11 Apr 2023 00:01:35 -0700 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.122]) by maili.marvell.com (Postfix) with ESMTP id 636903F7050; Tue, 11 Apr 2023 00:01:32 -0700 (PDT) From: To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Pavan Nikhilesh Subject: [PATCH 1/2] net/cnxk: optimize flow control hysteresis Date: Tue, 11 Apr 2023 12:31:28 +0530 Message-ID: <20230411070129.870-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-GUID: 7mpNy6dmKl9ilcctPxoJnK6JK3-bjiSV X-Proofpoint-ORIG-GUID: 7mpNy6dmKl9ilcctPxoJnK6JK3-bjiSV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-11_04,2023-04-06_03,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Set flow control hysteresis to ignore immediate sequence of decrement-increment to avoid unnecessary LLC traffic. Enable hysteresis when SQ length is more than 512 as it lower queue lengths will require faster updates. Signed-off-by: Pavan Nikhilesh Signed-off-by: Satha Rao --- drivers/net/cnxk/cnxk_ethdev.c | 2 ++ drivers/net/cnxk/cnxk_ethdev.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index 1cae3084e1..42a52ed0ca 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -487,6 +487,8 @@ cnxk_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, sq->qid = qid; sq->nb_desc = nb_desc; sq->max_sqe_sz = nix_sq_max_sqe_sz(dev); + if (sq->nb_desc >= CNXK_NIX_DEF_SQ_COUNT) + sq->fc_hyst_bits = 0x1; if (nix->tx_compl_ena) { sq->cqid = sq->qid + dev->nb_rxq; diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 62a06e5d03..97537de17a 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -49,6 +49,8 @@ /* LPB & SPB */ #define CNXK_NIX_NUM_POOLS_MAX 2 +#define CNXK_NIX_DEF_SQ_COUNT 512 + #define CNXK_NIX_RSS_L3_L4_SRC_DST \ (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY | \ RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY) From patchwork Tue Apr 11 07:01:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 125895 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 01E3342919; Tue, 11 Apr 2023 09:01:45 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DE8BC41141; Tue, 11 Apr 2023 09:01:41 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 0C7CE4111C for ; Tue, 11 Apr 2023 09:01:40 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33B6RAJZ008071 for ; Tue, 11 Apr 2023 00:01:40 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=VRC+VhBEYK6iqoe0L0CmPHjKvaIYjNpX9pbH162jgCM=; b=dY+qV0Eu91Fo3Nz017kYbUp/T8217/PfE7PZDd5CiC7oJmFtKRpNdSX0cvCxQbAWtt8A 9Ge01x7MLpn+CcZWT4fvqcPH/tu3sOFrE0eI3y99Jx0xCokf2Wu2nrOpF+JwVTJfiHv/ Kn4IqTsqWysSrUlcT491M8TsILmEWosQ4gpIVTP0d1LAMFwh+Cp9A9Qqw3d9gCo3Mykr cZk8gcvlpTzWxvG7HYJqA1Ss2N2hRMhUx0ApUDUTpLA4e+5aaqzw14cFSfVUF8f+A1TM 6pZ2gTZoFyCZqy+XJgreEUxYC8v3Mk67GzRFh92xQKXdLYZKgnsrFMj91vEXNn3kwt8b pA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3purfs8p93-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 11 Apr 2023 00:01:40 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 11 Apr 2023 00:01:37 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 11 Apr 2023 00:01:37 -0700 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.122]) by maili.marvell.com (Postfix) with ESMTP id 772023F7070; Tue, 11 Apr 2023 00:01:35 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Subject: [PATCH 2/2] event/cnxk: restrict stashing to multi-core Date: Tue, 11 Apr 2023 12:31:29 +0530 Message-ID: <20230411070129.870-2-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230411070129.870-1-pbhagavatula@marvell.com> References: <20230411070129.870-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: SQ330RQB58yoRSnRJ35xi1mbpaWIMm0B X-Proofpoint-GUID: SQ330RQB58yoRSnRJ35xi1mbpaWIMm0B X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-11_04,2023-04-06_03,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Enable WQE stashing by default only when multiple event ports are enabled. Signed-off-by: Pavan Nikhilesh --- drivers/event/cnxk/cn10k_eventdev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 071ea5a212..49d205af39 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -902,7 +902,7 @@ cn10k_sso_rx_adapter_queue_add( lookup_mem = rxq->lookup_mem; cn10k_sso_set_priv_mem(event_dev, lookup_mem); cn10k_sso_fp_fns_set((struct rte_eventdev *)(uintptr_t)event_dev); - if (roc_feature_sso_has_stash()) { + if (roc_feature_sso_has_stash() && dev->nb_event_ports > 1) { stash.hwgrp = queue_conf->ev.queue_id; stash.stash_offset = CN10K_SSO_DEFAULT_STASH_OFFSET; stash.stash_count = CN10K_SSO_DEFAULT_STASH_LENGTH;