From patchwork Fri Mar 3 04:52:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kaiwen Deng X-Patchwork-Id: 124757 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6AFEF41DBF; Fri, 3 Mar 2023 06:24:39 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 460E1410D0; Fri, 3 Mar 2023 06:24:39 +0100 (CET) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 9078640687; Fri, 3 Mar 2023 06:24:37 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677821077; x=1709357077; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=V3SbR+wWZVEHkqIG5fU0zAl8l5tDELxSvnuGZbSfmAQ=; b=Rfv9Emq9ZltFXYSuvZ2+boTSQCYZQzxxjcBiJ9zZzXj9chZBJdUFPYZH 7Vr/b2SnC6Wy1luY20n/DtKFCcPuKDJdwJjSH4BhHZhM0VbnFIsm2DN6B SNhzJvHbLadKQDbAAE7Hxa4xPr/lM9w1z1j724HLzLRLmFoG6rASY6Pxo 3Qus+BDmfYvSFXMbIyC395W4YiEEghbX9mHbGpPjH+RqBBrguYdpfju73 Y/ojRNLS/u9FOorMrhAuV475Duc0Kt0qmNEsijIfHOcAug1eJkfvD7xvY wlMeXudtiWFmuhV7DlgdglZc54fCSuhMOkJ5/AypyS726CC6K/iaPGcbM Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10637"; a="318781975" X-IronPort-AV: E=Sophos;i="5.98,229,1673942400"; d="scan'208";a="318781975" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2023 21:24:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10637"; a="739373886" X-IronPort-AV: E=Sophos;i="5.98,229,1673942400"; d="scan'208";a="739373886" Received: from shwdenpg561.ccr.corp.intel.com (HELO dpdk..) ([10.239.252.3]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2023 21:24:33 -0800 From: Kaiwen Deng To: dev@dpdk.org Cc: stable@dpdk.org, qiming.yang@intel.com, yidingx.zhou@intel.com, Kaiwen Deng , Wenjun Wu , Qi Zhang , Wenzhuo Lu Subject: [PATCH] net/ixgbe: fix IPv6 mask in fdir Date: Fri, 3 Mar 2023 12:52:26 +0800 Message-Id: <20230303045226.1927885-1-kaiwenx.deng@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Rules without addr mask cannot be created together in ixgbe when setting IPv6 addr mask to default value as 0. This commit is to change the default value of IPv6 addr mask as '0xFF'. Fixes: cba954b7beda ("net/ixgbe: enable IPv6 mask in flow rules") Fixes: 7d629cacedee ("net/ixgbe: enable IPv6 for consistent API") Cc: stable@dpdk.org Signed-off-by: Kaiwen Deng Tested-by: Song Jiale --- drivers/net/ixgbe/ixgbe_flow.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c index 79c84044af..eac81ee489 100644 --- a/drivers/net/ixgbe/ixgbe_flow.c +++ b/drivers/net/ixgbe/ixgbe_flow.c @@ -1645,10 +1645,6 @@ ixgbe_parse_fdir_filter_normal(struct rte_eth_dev *dev, memset(&rule->mask, 0xFF, sizeof(struct ixgbe_hw_fdir_mask)); rule->mask.vlan_tci_mask = 0; rule->mask.flex_bytes_mask = 0; - rule->mask.dst_port_mask = 0; - rule->mask.src_port_mask = 0; - rule->mask.src_ipv6_mask = 0; - rule->mask.dst_ipv6_mask = 0; /** * The first not void item should be @@ -1922,9 +1918,9 @@ ixgbe_parse_fdir_filter_normal(struct rte_eth_dev *dev, /* check src addr mask */ for (j = 0; j < 16; j++) { - if (ipv6_mask->hdr.src_addr[j] == UINT8_MAX) { - rule->mask.src_ipv6_mask |= 1 << j; - } else if (ipv6_mask->hdr.src_addr[j] != 0) { + if (ipv6_mask->hdr.src_addr[j] == 0) { + rule->mask.src_ipv6_mask &= ~(1 << j); + } else if (ipv6_mask->hdr.src_addr[j] != UINT8_MAX) { memset(rule, 0, sizeof(struct ixgbe_fdir_rule)); rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, @@ -1935,9 +1931,9 @@ ixgbe_parse_fdir_filter_normal(struct rte_eth_dev *dev, /* check dst addr mask */ for (j = 0; j < 16; j++) { - if (ipv6_mask->hdr.dst_addr[j] == UINT8_MAX) { - rule->mask.dst_ipv6_mask |= 1 << j; - } else if (ipv6_mask->hdr.dst_addr[j] != 0) { + if (ipv6_mask->hdr.dst_addr[j] == 0) { + rule->mask.dst_ipv6_mask &= ~(1 << j); + } else if (ipv6_mask->hdr.dst_addr[j] != UINT8_MAX) { memset(rule, 0, sizeof(struct ixgbe_fdir_rule)); rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM,