From patchwork Tue Feb 7 06:10:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ajmera, Megha" X-Patchwork-Id: 123196 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2203F41C2A; Tue, 7 Feb 2023 07:14:41 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F353140ED9; Tue, 7 Feb 2023 07:14:40 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 2E9C440E6E; Tue, 7 Feb 2023 07:14:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675750479; x=1707286479; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=p2Thxn6KrghBhVVhWsG90lUXXLEvmQ0b8oV8NmewlLg=; b=My9AgYV5VuFsUW1ZBuvpBaSfvuwHtFI7tgW2vhhbKm8ylP1hKgcs/D9i 85xb0CYb0WPmmTQ88u6uz0+As2wIZP6UznSxJgnOhI8APFx7hQYm76m0n 3I64ZdTcZ3TGbLOskhi5EWhh+gbfyfvW1rssKd6kNmfLnDWBNTRxrCB6t k8skX699yR0ItDp2uFSf2D6BuyyEqINd05OXNrmxu0iKLZd/3YhIb9MYV REiMfloiPxCiqkvYMOC38MRKW4KIKUh2M1u1kPHTpsPsPUe00yn1s02V9 ITlTgHEF1vty39XNiSFUFOL7Ma+YQpXl/bq7K8bbhrIFwKOOmDoehMd+q g==; X-IronPort-AV: E=McAfee;i="6500,9779,10613"; a="356785157" X-IronPort-AV: E=Sophos;i="5.97,278,1669104000"; d="scan'208";a="356785157" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2023 22:14:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10613"; a="660098765" X-IronPort-AV: E=Sophos;i="5.97,278,1669104000"; d="scan'208";a="660098765" Received: from unknown (HELO localhost.localdomain) ([10.190.213.60]) by orsmga007.jf.intel.com with ESMTP; 06 Feb 2023 22:14:35 -0800 From: Megha Ajmera To: dev@dpdk.org, jasvinder.singh@intel.com, cristian.dumitrescu@intel.com Cc: stable@dpdk.org Subject: [PATCH v2] sched: fix for incorrect alignment of bitmap, pipe and queue structs in subport Date: Tue, 7 Feb 2023 06:10:08 +0000 Message-Id: <20230207061008.773757-1-megha.ajmera@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Big structures like bitmap, pipes and queues in subport are addressed using offset of 'memory' field in subport structures. This means no other variable should be added after 'memory' variable or else addressing of such structs like bitmap etc. become incorrect. Realigned tc_ov_enabled variable in subport structure. Fixes: f5e60154ade ("sched: enable traffic class oversubscription conditionally") Signed-off-by: Megha Ajmera Acked-by: Cristian Dumitrescu --- lib/sched/rte_sched.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c index c91697131d..eaecd7ceb4 100644 --- a/lib/sched/rte_sched.c +++ b/lib/sched/rte_sched.c @@ -202,6 +202,9 @@ struct rte_sched_subport { uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE]; uint32_t qsize_sum; + /* TC oversubscription activation */ + int tc_ov_enabled; + struct rte_sched_pipe *pipe; struct rte_sched_queue *queue; struct rte_sched_queue_extra *queue_extra; @@ -210,8 +213,6 @@ struct rte_sched_subport { struct rte_mbuf **queue_array; uint8_t memory[0] __rte_cache_aligned; - /* TC oversubscription activation */ - int tc_ov_enabled; } __rte_cache_aligned; struct rte_sched_port {