From patchwork Wed Nov 28 10:41:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Daly, Lee" X-Patchwork-Id: 48382 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 023FA1B465; Wed, 28 Nov 2018 11:42:03 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id CCA581B3FD for ; Wed, 28 Nov 2018 11:42:01 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Nov 2018 02:42:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,290,1539673200"; d="scan'208";a="96154045" Received: from silpixa00399501.ir.intel.com ([10.237.223.69]) by orsmga008.jf.intel.com with ESMTP; 28 Nov 2018 02:41:59 -0800 From: Lee Daly To: fiona.trahe@intel.com, akhil.goyal@nxp.com Cc: dev@dpdk.org, Lee Daly Date: Wed, 28 Nov 2018 10:41:45 +0000 Message-Id: <1543401707-87314-1-git-send-email-lee.daly@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539102109-9311-1-git-send-email-lee.daly@intel.com> References: <1539102109-9311-1-git-send-email-lee.daly@intel.com> Subject: [dpdk-dev] [PATCH v2 1/3] compress/isal: enable checksum support in driver X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch adds checksum support in the ISA-L PMD for both compression and decompression. CRC32 is supported as well as Adler32. Signed-off-by: Lee Daly Acked-by: Fiona Trahe --- drivers/compress/isal/isal_compress_pmd.c | 80 ++++++++++++++++++++++----- drivers/compress/isal/isal_compress_pmd_ops.c | 4 +- 2 files changed, 69 insertions(+), 15 deletions(-) diff --git a/drivers/compress/isal/isal_compress_pmd.c b/drivers/compress/isal/isal_compress_pmd.c index 9f1e968..b087ed8 100644 --- a/drivers/compress/isal/isal_compress_pmd.c +++ b/drivers/compress/isal/isal_compress_pmd.c @@ -16,6 +16,8 @@ #define RTE_COMP_ISAL_LEVEL_ONE 1 #define RTE_COMP_ISAL_LEVEL_TWO 2 #define RTE_COMP_ISAL_LEVEL_THREE 3 /* Optimised for AVX512 & AVX2 only */ +#define CHKSUM_SZ_CRC 8 +#define CHKSUM_SZ_ADLER 4 int isal_logtype_driver; @@ -43,12 +45,6 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform, } priv_xform->compress.algo = RTE_COMP_ALGO_DEFLATE; - /* Set private xform checksum - raw deflate by default */ - if (xform->compress.chksum != RTE_COMP_CHECKSUM_NONE) { - ISAL_PMD_LOG(ERR, "Checksum not supported\n"); - return -ENOTSUP; - } - /* Set private xform window size, 32K supported */ if (xform->compress.window_size == RTE_COMP_ISAL_WINDOW_SIZE) priv_xform->compress.window_size = @@ -77,6 +73,27 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform, return -ENOTSUP; } + /* Set private xform checksum */ + switch (xform->compress.chksum) { + /* Raw deflate by default */ + case(RTE_COMP_CHECKSUM_NONE): + priv_xform->compress.chksum = IGZIP_DEFLATE; + break; + case(RTE_COMP_CHECKSUM_CRC32): + priv_xform->compress.chksum = IGZIP_GZIP_NO_HDR; + break; + case(RTE_COMP_CHECKSUM_ADLER32): + priv_xform->compress.chksum = IGZIP_ZLIB_NO_HDR; + break; + case(RTE_COMP_CHECKSUM_CRC32_ADLER32): + ISAL_PMD_LOG(ERR, "Combined CRC and ADLER checksum not" + " supported\n"); + return -ENOTSUP; + default: + ISAL_PMD_LOG(ERR, "Checksum type not supported\n"); + return -ENOTSUP; + } + /* Set private xform level. * Checking compliance with compressdev API, -1 <= level => 9 */ @@ -170,9 +187,24 @@ isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform, } priv_xform->decompress.algo = RTE_COMP_ALGO_DEFLATE; - /* Set private xform checksum - raw deflate by default */ - if (xform->compress.chksum != RTE_COMP_CHECKSUM_NONE) { - ISAL_PMD_LOG(ERR, "Checksum not supported\n"); + /* Set private xform checksum */ + switch (xform->decompress.chksum) { + /* Raw deflate by default */ + case(RTE_COMP_CHECKSUM_NONE): + priv_xform->decompress.chksum = ISAL_DEFLATE; + break; + case(RTE_COMP_CHECKSUM_CRC32): + priv_xform->decompress.chksum = ISAL_GZIP_NO_HDR_VER; + break; + case(RTE_COMP_CHECKSUM_ADLER32): + priv_xform->decompress.chksum = ISAL_ZLIB_NO_HDR_VER; + break; + case(RTE_COMP_CHECKSUM_CRC32_ADLER32): + ISAL_PMD_LOG(ERR, "Combined CRC and ADLER checksum not" + " supported\n"); + return -ENOTSUP; + default: + ISAL_PMD_LOG(ERR, "Checksum type not supported\n"); return -ENOTSUP; } @@ -376,6 +408,9 @@ process_isal_deflate(struct rte_comp_op *op, struct isal_comp_qp *qp, qp->stream->level_buf = temp_level_buf; + /* Set Checksum flag */ + qp->stream->gzip_flag = priv_xform->compress.chksum; + /* Stateless operation, input will be consumed in one go */ qp->stream->flush = NO_FLUSH; @@ -459,8 +494,18 @@ process_isal_deflate(struct rte_comp_op *op, struct isal_comp_qp *qp, return ret; } } + op->consumed = qp->stream->total_in; - op->produced = qp->stream->total_out; + if (qp->stream->gzip_flag == IGZIP_DEFLATE) { + op->produced = qp->stream->total_out; + } else if (qp->stream->gzip_flag == IGZIP_ZLIB_NO_HDR) { + op->produced = qp->stream->total_out - CHKSUM_SZ_ADLER; + op->output_chksum = qp->stream->internal_state.crc + 1; + } else { + op->produced = qp->stream->total_out - CHKSUM_SZ_CRC; + op->output_chksum = qp->stream->internal_state.crc; + } + isal_deflate_reset(qp->stream); return ret; @@ -468,7 +513,8 @@ process_isal_deflate(struct rte_comp_op *op, struct isal_comp_qp *qp, /* Stateless Decompression Function */ static int -process_isal_inflate(struct rte_comp_op *op, struct isal_comp_qp *qp) +process_isal_inflate(struct rte_comp_op *op, struct isal_comp_qp *qp, + struct isal_priv_xform *priv_xform) { int ret = 0; @@ -477,6 +523,9 @@ process_isal_inflate(struct rte_comp_op *op, struct isal_comp_qp *qp) /* Initialize decompression state */ isal_inflate_init(qp->state); + /* Set Checksum flag */ + qp->state->crc_flag = priv_xform->decompress.chksum; + if (op->m_src->pkt_len < (op->src.length + op->src.offset)) { ISAL_PMD_LOG(ERR, "Input mbuf(s) not big enough.\n"); op->status = RTE_COMP_OP_STATUS_INVALID_ARGS; @@ -531,13 +580,16 @@ process_isal_inflate(struct rte_comp_op *op, struct isal_comp_qp *qp) return -1; } - if (ret != ISAL_DECOMP_OK) { + if (ret != ISAL_DECOMP_OK && ret != ISAL_END_INPUT) { + ISAL_PMD_LOG(ERR, "Decompression operation failed\n"); op->status = RTE_COMP_OP_STATUS_ERROR; return ret; } op->consumed = op->src.length - qp->state->avail_in; } - op->produced = qp->state->total_out; + op->produced = qp->state->total_out; + op->output_chksum = qp->state->crc; + isal_inflate_reset(qp->state); return ret; @@ -553,7 +605,7 @@ process_op(struct isal_comp_qp *qp, struct rte_comp_op *op, process_isal_deflate(op, qp, priv_xform); break; case RTE_COMP_DECOMPRESS: - process_isal_inflate(op, qp); + process_isal_inflate(op, qp, priv_xform); break; default: ISAL_PMD_LOG(ERR, "Operation Not Supported\n"); diff --git a/drivers/compress/isal/isal_compress_pmd_ops.c b/drivers/compress/isal/isal_compress_pmd_ops.c index 41cade8..7b91849 100644 --- a/drivers/compress/isal/isal_compress_pmd_ops.c +++ b/drivers/compress/isal/isal_compress_pmd_ops.c @@ -17,7 +17,9 @@ static const struct rte_compressdev_capabilities isal_pmd_capabilities[] = { RTE_COMP_FF_OOP_LB_IN_SGL_OUT | RTE_COMP_FF_SHAREABLE_PRIV_XFORM | RTE_COMP_FF_HUFFMAN_FIXED | - RTE_COMP_FF_HUFFMAN_DYNAMIC, + RTE_COMP_FF_HUFFMAN_DYNAMIC | + RTE_COMP_FF_CRC32_CHECKSUM | + RTE_COMP_FF_ADLER32_CHECKSUM, .window_size = { .min = 15, .max = 15, From patchwork Wed Nov 28 10:41:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Daly, Lee" X-Patchwork-Id: 48383 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BA37B1B484; Wed, 28 Nov 2018 11:42:06 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 936A71B3FD for ; Wed, 28 Nov 2018 11:42:02 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Nov 2018 02:42:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,290,1539673200"; d="scan'208";a="96154056" Received: from silpixa00399501.ir.intel.com ([10.237.223.69]) by orsmga008.jf.intel.com with ESMTP; 28 Nov 2018 02:42:00 -0800 From: Lee Daly To: fiona.trahe@intel.com, akhil.goyal@nxp.com Cc: dev@dpdk.org, Lee Daly Date: Wed, 28 Nov 2018 10:41:46 +0000 Message-Id: <1543401707-87314-2-git-send-email-lee.daly@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1543401707-87314-1-git-send-email-lee.daly@intel.com> References: <1539102109-9311-1-git-send-email-lee.daly@intel.com> <1543401707-87314-1-git-send-email-lee.daly@intel.com> Subject: [dpdk-dev] [PATCH v2 2/3] test/compress: add checksum tests X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch adds a test which examines what type of checksum the PMD supports, adler, crc32 or alder32_crc32 and tests that feature if the PMD supports it. Signed-off-by: Lee Daly Acked-by: Tomasz Jozwiak Acked-by: Fiona Trahe --- test/test/test_compressdev.c | 206 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 203 insertions(+), 3 deletions(-) diff --git a/test/test/test_compressdev.c b/test/test/test_compressdev.c index 4b98001..2ca4c91 100644 --- a/test/test/test_compressdev.c +++ b/test/test/test_compressdev.c @@ -37,6 +37,12 @@ #define CACHE_SIZE 0 #define OFFSET 800 +#define ZLIB_CRC_CHECKSUM_WINDOW_BITS 31 +#define ZLIB_HEADER_SIZE 2 +#define ZLIB_TRAILER_SIZE 4 +#define GZIP_HEADER_SIZE 10 +#define GZIP_TRAILER_SIZE 8 + const char * huffman_type_strings[] = { [RTE_COMP_HUFFMAN_DEFAULT] = "PMD default", @@ -319,6 +325,10 @@ compress_zlib(struct rte_comp_op *op, * When doing raw DEFLATE, this number will be negative. */ window_bits = -(xform->compress.window_size); + if (xform->compress.chksum == RTE_COMP_CHECKSUM_ADLER32) + window_bits *= -1; + else if (xform->compress.chksum == RTE_COMP_CHECKSUM_CRC32) + window_bits = ZLIB_CRC_CHECKSUM_WINDOW_BITS; comp_level = xform->compress.level; @@ -422,8 +432,19 @@ compress_zlib(struct rte_comp_op *op, } op->consumed = stream.total_in; - op->produced = stream.total_out; + if (xform->compress.chksum == RTE_COMP_CHECKSUM_ADLER32) { + rte_pktmbuf_adj(op->m_dst, ZLIB_HEADER_SIZE); + op->produced = stream.total_out - + (ZLIB_HEADER_SIZE + ZLIB_TRAILER_SIZE); + } else if (xform->compress.chksum == RTE_COMP_CHECKSUM_CRC32) { + rte_pktmbuf_adj(op->m_dst, GZIP_HEADER_SIZE); + op->produced = stream.total_out - + (GZIP_HEADER_SIZE + GZIP_TRAILER_SIZE); + } else + op->produced = stream.total_out; + op->status = RTE_COMP_OP_STATUS_SUCCESS; + op->output_chksum = stream.adler; deflateReset(&stream); @@ -457,7 +478,6 @@ decompress_zlib(struct rte_comp_op *op, * When doing raw DEFLATE, this number will be negative. */ window_bits = -(xform->decompress.window_size); - ret = inflateInit2(&stream, window_bits); if (ret != Z_OK) { @@ -706,6 +726,7 @@ test_deflate_comp_decomp(const char * const test_bufs[], const struct rte_compressdev_capabilities *capa = rte_compressdev_capability_get(0, RTE_COMP_ALGO_DEFLATE); char *contig_buf = NULL; + uint64_t compress_checksum[num_bufs]; /* Initialize all arrays to NULL */ memset(uncomp_bufs, 0, sizeof(struct rte_mbuf *) * num_bufs); @@ -896,6 +917,7 @@ test_deflate_comp_decomp(const char * const test_bufs[], &ops_processed[num_total_deqd], num_bufs); num_total_deqd += num_deqd; deqd_retries++; + } while (num_total_deqd < num_enqd); deqd_retries = 0; @@ -929,6 +951,8 @@ test_deflate_comp_decomp(const char * const test_bufs[], ops_processed[i]->consumed == 0 ? 0 : (float)ops_processed[i]->produced / ops_processed[i]->consumed * 100); + if (compress_xform->chksum != RTE_COMP_CHECKSUM_NONE) + compress_checksum[i] = ops_processed[i]->output_chksum; ops[i] = NULL; } @@ -1166,11 +1190,23 @@ test_deflate_comp_decomp(const char * const test_bufs[], buf2 = rte_pktmbuf_read(ops_processed[i]->m_dst, ops_processed[i]->dst.offset, ops_processed[i]->produced, contig_buf); - if (compare_buffers(buf1, strlen(buf1) + 1, buf2, ops_processed[i]->produced) < 0) goto exit; + /* Test checksums */ + if (compress_xforms[0]->compress.chksum != + RTE_COMP_CHECKSUM_NONE) { + if (ops_processed[i]->output_chksum != + compress_checksum[i]) { + RTE_LOG(ERR, USER1, "The checksums differ\n" + "Compression Checksum: %" PRIu64 "\tDecompression " + "Checksum: %" PRIu64 "\n", compress_checksum[i], + ops_processed[i]->output_chksum); + goto exit; + } + } + rte_free(contig_buf); contig_buf = NULL; } @@ -1605,6 +1641,168 @@ test_compressdev_deflate_stateless_offset(void) } return TEST_SUCCESS; + +} + +static int +test_compressdev_deflate_stateless_checksum(void) +{ + struct comp_testsuite_params *ts_params = &testsuite_params; + const char *test_buffer; + uint16_t i; + int ret; + const struct rte_compressdev_capabilities *capab; + + capab = rte_compressdev_capability_get(0, RTE_COMP_ALGO_DEFLATE); + TEST_ASSERT(capab != NULL, "Failed to retrieve device capabilities"); + + /* Check if driver supports any checksum */ + if ((capab->comp_feature_flags & RTE_COMP_FF_CRC32_CHECKSUM) == 0 && + (capab->comp_feature_flags & + RTE_COMP_FF_ADLER32_CHECKSUM) == 0 && + (capab->comp_feature_flags & + RTE_COMP_FF_CRC32_ADLER32_CHECKSUM) == 0) + return -ENOTSUP; + + struct rte_comp_xform *compress_xform = + rte_malloc(NULL, sizeof(struct rte_comp_xform), 0); + if (compress_xform == NULL) { + RTE_LOG(ERR, USER1, "Compress xform could not be created\n"); + ret = TEST_FAILED; + goto exit; + } + + memcpy(compress_xform, ts_params->def_comp_xform, + sizeof(struct rte_comp_xform)); + + struct rte_comp_xform *decompress_xform = + rte_malloc(NULL, sizeof(struct rte_comp_xform), 0); + if (decompress_xform == NULL) { + RTE_LOG(ERR, USER1, "Decompress xform could not be created\n"); + ret = TEST_FAILED; + goto exit; + } + + memcpy(decompress_xform, ts_params->def_decomp_xform, + sizeof(struct rte_comp_xform)); + + /* Check if driver supports crc32 checksum and test */ + if ((capab->comp_feature_flags & RTE_COMP_FF_CRC32_CHECKSUM)) { + compress_xform->compress.chksum = RTE_COMP_CHECKSUM_CRC32; + decompress_xform->decompress.chksum = RTE_COMP_CHECKSUM_CRC32; + + for (i = 0; i < RTE_DIM(compress_test_bufs); i++) { + test_buffer = compress_test_bufs[i]; + + /* Generate zlib checksum and test against selected + * drivers decompression checksum + */ + if (test_deflate_comp_decomp(&test_buffer, 1, + &i, + &compress_xform, + &decompress_xform, + 1, + RTE_COMP_OP_STATELESS, + 0, + ZLIB_COMPRESS, + 0) < 0) { + ret = TEST_FAILED; + goto exit; + } + + /* Generate compression and decompression + * checksum of selected driver + */ + if (test_deflate_comp_decomp(&test_buffer, 1, + &i, + &compress_xform, + &decompress_xform, + 1, + RTE_COMP_OP_STATELESS, + 0, + ZLIB_NONE, + 0) < 0) { + ret = TEST_FAILED; + goto exit; + } + } + } + + /* Check if driver supports adler32 checksum and test */ + if ((capab->comp_feature_flags & RTE_COMP_FF_ADLER32_CHECKSUM)) { + compress_xform->compress.chksum = RTE_COMP_CHECKSUM_ADLER32; + decompress_xform->decompress.chksum = RTE_COMP_CHECKSUM_ADLER32; + + for (i = 0; i < RTE_DIM(compress_test_bufs); i++) { + test_buffer = compress_test_bufs[i]; + + /* Generate zlib checksum and test against selected + * drivers decompression checksum + */ + if (test_deflate_comp_decomp(&test_buffer, 1, + &i, + &compress_xform, + &decompress_xform, + 1, + RTE_COMP_OP_STATELESS, + 0, + ZLIB_COMPRESS, + 0) < 0) { + ret = TEST_FAILED; + goto exit; + } + /* Generate compression and decompression + * checksum of selected driver + */ + if (test_deflate_comp_decomp(&test_buffer, 1, + &i, + &compress_xform, + &decompress_xform, + 1, + RTE_COMP_OP_STATELESS, + 0, + ZLIB_NONE, + 0) < 0) { + ret = TEST_FAILED; + goto exit; + } + } + } + + /* Check if driver supports combined crc and adler checksum and test */ + if ((capab->comp_feature_flags & RTE_COMP_FF_CRC32_ADLER32_CHECKSUM)) { + compress_xform->compress.chksum = + RTE_COMP_CHECKSUM_CRC32_ADLER32; + decompress_xform->decompress.chksum = + RTE_COMP_CHECKSUM_CRC32_ADLER32; + + for (i = 0; i < RTE_DIM(compress_test_bufs); i++) { + test_buffer = compress_test_bufs[i]; + + /* Generate compression and decompression + * checksum of selected driver + */ + if (test_deflate_comp_decomp(&test_buffer, 1, + &i, + &compress_xform, + &decompress_xform, + 1, + RTE_COMP_OP_STATELESS, + 0, + ZLIB_NONE, + 0) < 0) { + ret = TEST_FAILED; + goto exit; + } + } + } + + ret = TEST_SUCCESS; + +exit: + rte_free(compress_xform); + rte_free(decompress_xform); + return ret; } static struct unit_test_suite compressdev_testsuite = { @@ -1628,6 +1826,8 @@ static struct unit_test_suite compressdev_testsuite = { test_compressdev_deflate_stateless_sgl), TEST_CASE_ST(generic_ut_setup, generic_ut_teardown, test_compressdev_deflate_stateless_offset), + TEST_CASE_ST(generic_ut_setup, generic_ut_teardown, + test_compressdev_deflate_stateless_checksum), TEST_CASES_END() /**< NULL terminate unit test array */ } }; From patchwork Wed Nov 28 10:41:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Daly, Lee" X-Patchwork-Id: 48384 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 835291B48E; Wed, 28 Nov 2018 11:42:08 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 5A7D21B473 for ; Wed, 28 Nov 2018 11:42:04 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Nov 2018 02:42:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,290,1539673200"; d="scan'208";a="96154066" Received: from silpixa00399501.ir.intel.com ([10.237.223.69]) by orsmga008.jf.intel.com with ESMTP; 28 Nov 2018 02:42:02 -0800 From: Lee Daly To: fiona.trahe@intel.com, akhil.goyal@nxp.com Cc: dev@dpdk.org, Lee Daly Date: Wed, 28 Nov 2018 10:41:47 +0000 Message-Id: <1543401707-87314-3-git-send-email-lee.daly@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1543401707-87314-1-git-send-email-lee.daly@intel.com> References: <1539102109-9311-1-git-send-email-lee.daly@intel.com> <1543401707-87314-1-git-send-email-lee.daly@intel.com> Subject: [dpdk-dev] [PATCH v2 3/3] doc: update ISA-L guide to reflect checksum support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This updates the ISA-L compression driver guide on how to enable and use checksums. This also updates the compression drivers features matrix. Will add to release notes once the 19.02.rst file is added. Signed-off-by: Lee Daly Acked-by: Fiona Trahe --- doc/guides/compressdevs/features/isal.ini | 2 ++ doc/guides/compressdevs/isal.rst | 30 ++++++++++++++++++++++++++++-- 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/doc/guides/compressdevs/features/isal.ini b/doc/guides/compressdevs/features/isal.ini index 919cf70..e705031 100644 --- a/doc/guides/compressdevs/features/isal.ini +++ b/doc/guides/compressdevs/features/isal.ini @@ -12,5 +12,7 @@ OOP SGL In SGL Out = Y OOP SGL In LB Out = Y OOP LB In SGL Out = Y Deflate = Y +Adler32 = Y +Crc32 = Y Fixed = Y Dynamic = Y diff --git a/doc/guides/compressdevs/isal.rst b/doc/guides/compressdevs/isal.rst index 3bc3022..af1f41f 100644 --- a/doc/guides/compressdevs/isal.rst +++ b/doc/guides/compressdevs/isal.rst @@ -27,6 +27,33 @@ Window size support: * 32K +Checksum: + + * CRC32 + * ADLER32 + +To enable a checksum in the driver, the compression and/or decompression xform +structure, rte_comp_xform, must be filled with either of the CompressDev +checksum flags supported. :: + + compress_xform->compress.chksum = RTE_COMP_CHECKSUM_CRC32 + + decompress_xform->decompress.chksum = RTE_COMP_CHECKSUM_CRC32 + +:: + + compress_xform->compress.chksum = RTE_COMP_CHECKSUM_ADLER32 + + decompress_xform->decompress.chksum = RTE_COMP_CHECKSUM_ADLER32 + +If you request a checksum for compression or decompression, +the checksum field in the operation structure, ``op->output_chksum``, +will be filled with the checksum. + +.. Note:: + + For the compression case above, your output buffer will need to be large enough to hold the compressed data plus a scratchpad for the checksum at the end, the scratchpad is 8 bytes for CRC32 and 4 bytes for Adler32. + Level guide: The ISA-L levels have been mapped to somewhat correspond to the same ZLIB level, @@ -75,13 +102,12 @@ As a result the level mappings from the API to the PMD are shown below. The above table only shows mapping when API calls for dynamic compression. For fixed compression, regardless of API level, internally ISA-L level 0 is always used. + Limitations ----------- * Compressdev level 0, no compression, is not supported. -* Checksums will not be supported until future release. - Installation ------------