From patchwork Fri Sep 30 18:45:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 117229 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 685CAA00C4; Fri, 30 Sep 2022 20:46:17 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9AD2641140; Fri, 30 Sep 2022 20:46:12 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 8D4BE4003F for ; Fri, 30 Sep 2022 20:46:09 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664563569; x=1696099569; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=I3pJo9zPMftpoRlQv6lvIQ9HO1BxQthYB99SsfCxfuI=; b=FW3sXoX8V1qn4QL+3ZPoFEcwS0VQUK4yjwyyEf2y+NXr8Miw1pufeqDh zCfXuhFZjI4iAmdA/TXCsc+ptCDrZryAt9k3oQclQhG0mK8N9k/zSS6Nv DAbElgz9Dr08+Ut2iZgEkdW1yWD3r7qhEt2xMkdxtTX8tpCJ86s+sU2wd LTWQEBYGui2iCz1p6k4IT/jdgEKT391bkxy7mbLZ+ycNkiyACQoxBIw3P /dDm098/gJWl0Ob1Qr3v45sSt2aNzstCJjj5VCMlF7SkbEpzTcGU2xn/y 78F3HDSUz/o21+oB0tqmbZ786VZRkPLfQOS8ecih/6RNNVEO13Qf54v7z w==; X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="289424023" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="289424023" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 11:46:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="951650862" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="951650862" Received: from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245]) by fmsmga005.fm.intel.com with ESMTP; 30 Sep 2022 11:46:07 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, mingshan.zhang@intel.com, hemant.agrawal@nxp.com, Nicolas Chautru Subject: [PATCH v10 1/7] bbdev: allow operation type enum for growth Date: Fri, 30 Sep 2022 11:45:59 -0700 Message-Id: <20220930184605.47655-2-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220930184605.47655-1-nicolas.chautru@intel.com> References: <1655491040-183649-6-git-send-email-nicolas.chautru@intel.com> <20220930184605.47655-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Updating the enum for rte_bbdev_op_type to allow to keep ABI compatible for enum insertion while adding padded maximum value for array need. Removing RTE_BBDEV_OP_TYPE_COUNT and instead exposing RTE_BBDEV_OP_TYPE_SIZE_MAX. Signed-off-by: Nicolas Chautru Acked-by: Maxime Coquelin --- app/test-bbdev/test_bbdev.c | 2 +- app/test-bbdev/test_bbdev_perf.c | 4 ++-- examples/bbdev_app/main.c | 2 +- lib/bbdev/rte_bbdev.c | 8 +++++--- lib/bbdev/rte_bbdev_op.h | 12 ++++++++++-- 5 files changed, 19 insertions(+), 9 deletions(-) diff --git a/app/test-bbdev/test_bbdev.c b/app/test-bbdev/test_bbdev.c index ac06d7320a..65805977ae 100644 --- a/app/test-bbdev/test_bbdev.c +++ b/app/test-bbdev/test_bbdev.c @@ -521,7 +521,7 @@ test_bbdev_op_pool(void) rte_mempool_free(mp); TEST_ASSERT((mp = rte_bbdev_op_pool_create("Test_INV", - RTE_BBDEV_OP_TYPE_COUNT, size, cache_size, 0)) == NULL, + RTE_BBDEV_OP_TYPE_SIZE_MAX, size, cache_size, 0)) == NULL, "Failed test for rte_bbdev_op_pool_create: " "returned value is not NULL for invalid type"); diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c index fad3b1e49d..1abda2d995 100644 --- a/app/test-bbdev/test_bbdev_perf.c +++ b/app/test-bbdev/test_bbdev_perf.c @@ -2428,13 +2428,13 @@ run_test_case_on_device(test_case_function *test_case_func, uint8_t dev_id, /* Find capabilities */ const struct rte_bbdev_op_cap *cap = info.drv.capabilities; - for (i = 0; i < RTE_BBDEV_OP_TYPE_COUNT; i++) { + do { if (cap->type == test_vector.op_type) { capabilities = cap; break; } cap++; - } + } while (cap->type != RTE_BBDEV_OP_NONE); TEST_ASSERT_NOT_NULL(capabilities, "Couldn't find capabilities"); diff --git a/examples/bbdev_app/main.c b/examples/bbdev_app/main.c index fc7e8b8174..7e16e16bf8 100644 --- a/examples/bbdev_app/main.c +++ b/examples/bbdev_app/main.c @@ -1041,7 +1041,7 @@ main(int argc, char **argv) void *sigret; struct app_config_params app_params = def_app_config; struct rte_mempool *ethdev_mbuf_mempool, *bbdev_mbuf_mempool; - struct rte_mempool *bbdev_op_pools[RTE_BBDEV_OP_TYPE_COUNT]; + struct rte_mempool *bbdev_op_pools[RTE_BBDEV_OP_TYPE_SIZE_MAX]; struct lcore_conf lcore_conf[RTE_MAX_LCORE] = { {0} }; struct lcore_statistics lcore_stats[RTE_MAX_LCORE] = { {0} }; struct stats_lcore_params stats_lcore; diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c index aaee7b7872..4da80472a8 100644 --- a/lib/bbdev/rte_bbdev.c +++ b/lib/bbdev/rte_bbdev.c @@ -23,6 +23,8 @@ #define DEV_NAME "BBDEV" +/* Number of supported operation types */ +#define BBDEV_OP_TYPE_COUNT 5 /* BBDev library logging ID */ RTE_LOG_REGISTER_DEFAULT(bbdev_logtype, NOTICE); @@ -890,10 +892,10 @@ rte_bbdev_op_pool_create(const char *name, enum rte_bbdev_op_type type, return NULL; } - if (type >= RTE_BBDEV_OP_TYPE_COUNT) { + if (type >= BBDEV_OP_TYPE_COUNT) { rte_bbdev_log(ERR, "Invalid op type (%u), should be less than %u", - type, RTE_BBDEV_OP_TYPE_COUNT); + type, BBDEV_OP_TYPE_COUNT); return NULL; } @@ -1125,7 +1127,7 @@ rte_bbdev_op_type_str(enum rte_bbdev_op_type op_type) "RTE_BBDEV_OP_LDPC_ENC", }; - if (op_type < RTE_BBDEV_OP_TYPE_COUNT) + if (op_type < BBDEV_OP_TYPE_COUNT) return op_types[op_type]; rte_bbdev_log(ERR, "Invalid operation type"); diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h index 6d561334e8..4f1cff8412 100644 --- a/lib/bbdev/rte_bbdev_op.h +++ b/lib/bbdev/rte_bbdev_op.h @@ -48,6 +48,12 @@ extern "C" { /* LDPC: Maximum number of Code Blocks in Transport Block.*/ #define RTE_BBDEV_LDPC_MAX_CODE_BLOCKS (256) +/* + * Maximum size to be used to manage the enum rte_bbdev_op_type including padding for future + * enum insertion + */ +#define RTE_BBDEV_OP_TYPE_SIZE_MAX 8 + /** Flags for turbo decoder operation and capability structure */ enum rte_bbdev_op_td_flag_bitmasks { /** If sub block de-interleaving is to be performed. */ @@ -741,14 +747,16 @@ struct rte_bbdev_op_cap_ldpc_enc { uint16_t num_buffers_dst; }; -/** Different operation types supported by the device */ +/** Different operation types supported by the device + * The related macro RTE_BBDEV_OP_TYPE_SIZE_MAX can be used as an absolute maximum for + * notably sizing array while allowing for future enumeration insertion. + */ enum rte_bbdev_op_type { RTE_BBDEV_OP_NONE, /**< Dummy operation that does nothing */ RTE_BBDEV_OP_TURBO_DEC, /**< Turbo decode */ RTE_BBDEV_OP_TURBO_ENC, /**< Turbo encode */ RTE_BBDEV_OP_LDPC_DEC, /**< LDPC decode */ RTE_BBDEV_OP_LDPC_ENC, /**< LDPC encode */ - RTE_BBDEV_OP_TYPE_COUNT, /**< Count of different op types */ }; /** Bit indexes of possible errors reported through status field */ From patchwork Fri Sep 30 18:46:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 117230 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 80939A00C4; Fri, 30 Sep 2022 20:46:22 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 74EC642802; Fri, 30 Sep 2022 20:46:13 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id E21BE40684 for ; Fri, 30 Sep 2022 20:46:09 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664563570; x=1696099570; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=t7FYI8ht2jfAhAETmU+cdzSOgM7hFQPbxbX4vRaBfd4=; b=fvItCf+pfiuRKuGb5ZjjT+e3ps5iYYoC2znf5CymyqD1k4jyR0xJARQY fHin8w1tjTgaDCe9psroLwBTlKN7UtwMM/D5ktzduJchJlj17zsraEkno HRUZ6p5/ESE/JLVrMHwsSFQEcGgEB8CT2azvLyLJ7IZZNuU00wOFgKFFy i3NZTUkcxQ1BhZyFgsuJ5gIW7CfHFIAmfat1tO+KB1edsel0lTWro9CrS 9sPQQWueFZ1/RDJgR8vO3HRGEGEt1KvcUKrJ4El62gDO6RnDqzJ0EC0kq Yt4FA+PPU6lFc1kyf1EVV9E6xl5uMEg5028SdJTQW1xJFixBsxnpocsfG g==; X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="289424027" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="289424027" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 11:46:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="951650867" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="951650867" Received: from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245]) by fmsmga005.fm.intel.com with ESMTP; 30 Sep 2022 11:46:08 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, mingshan.zhang@intel.com, hemant.agrawal@nxp.com, Nicolas Chautru Subject: [PATCH v10 2/7] bbdev: add device status info Date: Fri, 30 Sep 2022 11:46:00 -0700 Message-Id: <20220930184605.47655-3-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220930184605.47655-1-nicolas.chautru@intel.com> References: <1655491040-183649-6-git-send-email-nicolas.chautru@intel.com> <20220930184605.47655-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added device status information, so that the PMD can expose information related to the underlying accelerator device status. Minor order change in structure to fit into padding hole. Signed-off-by: Nicolas Chautru Acked-by: Mingshan Zhang Acked-by: Hemant Agrawal --- drivers/baseband/acc100/rte_acc100_pmd.c | 1 + .../fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 1 + drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 1 + drivers/baseband/la12xx/bbdev_la12xx.c | 1 + drivers/baseband/null/bbdev_null.c | 1 + .../baseband/turbo_sw/bbdev_turbo_software.c | 1 + lib/bbdev/rte_bbdev.c | 22 ++++++++++++ lib/bbdev/rte_bbdev.h | 35 +++++++++++++++++-- lib/bbdev/version.map | 7 ++++ 9 files changed, 68 insertions(+), 2 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index de7e4bcef4..17ba7981a1 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -1060,6 +1060,7 @@ acc100_dev_info_get(struct rte_bbdev *dev, /* Read and save the populated config from ACC100 registers */ fetch_acc100_config(dev); + dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED; /* This isn't ideal because it reports the maximum number of queues but * does not provide info on how many can be uplink/downlink or different diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c index 82ae6ba678..57b12af93e 100644 --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c @@ -369,6 +369,7 @@ fpga_dev_info_get(struct rte_bbdev *dev, dev_info->capabilities = bbdev_capabilities; dev_info->cpu_flag_reqs = NULL; dev_info->data_endianness = RTE_LITTLE_ENDIAN; + dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED; /* Calculates number of queues assigned to device */ dev_info->max_num_queues = 0; diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c index 21d35292a3..2a330c4ae2 100644 --- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c +++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c @@ -645,6 +645,7 @@ fpga_dev_info_get(struct rte_bbdev *dev, dev_info->capabilities = bbdev_capabilities; dev_info->cpu_flag_reqs = NULL; dev_info->data_endianness = RTE_LITTLE_ENDIAN; + dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED; /* Calculates number of queues assigned to device */ dev_info->max_num_queues = 0; diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c b/drivers/baseband/la12xx/bbdev_la12xx.c index 4d1bd16751..c1f88c65b8 100644 --- a/drivers/baseband/la12xx/bbdev_la12xx.c +++ b/drivers/baseband/la12xx/bbdev_la12xx.c @@ -100,6 +100,7 @@ la12xx_info_get(struct rte_bbdev *dev __rte_unused, dev_info->capabilities = bbdev_capabilities; dev_info->cpu_flag_reqs = NULL; dev_info->min_alignment = 64; + dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED; rte_bbdev_log_debug("got device info from %u", dev->data->dev_id); } diff --git a/drivers/baseband/null/bbdev_null.c b/drivers/baseband/null/bbdev_null.c index 248e12987f..94a1976196 100644 --- a/drivers/baseband/null/bbdev_null.c +++ b/drivers/baseband/null/bbdev_null.c @@ -82,6 +82,7 @@ info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info) * here for code completeness. */ dev_info->data_endianness = RTE_LITTLE_ENDIAN; + dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED; rte_bbdev_log_debug("got device info from %u", dev->data->dev_id); } diff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c b/drivers/baseband/turbo_sw/bbdev_turbo_software.c index af7bc416f9..dbc5524f94 100644 --- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c +++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c @@ -254,6 +254,7 @@ info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info) dev_info->min_alignment = 64; dev_info->harq_buffer_size = 0; dev_info->data_endianness = RTE_LITTLE_ENDIAN; + dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED; rte_bbdev_log_debug("got device info from %u\n", dev->data->dev_id); } diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c index 4da80472a8..38630a23f8 100644 --- a/lib/bbdev/rte_bbdev.c +++ b/lib/bbdev/rte_bbdev.c @@ -1133,3 +1133,25 @@ rte_bbdev_op_type_str(enum rte_bbdev_op_type op_type) rte_bbdev_log(ERR, "Invalid operation type"); return NULL; } + +const char * +rte_bbdev_device_status_str(enum rte_bbdev_device_status status) +{ + static const char * const dev_sta_string[] = { + "RTE_BBDEV_DEV_NOSTATUS", + "RTE_BBDEV_DEV_NOT_SUPPORTED", + "RTE_BBDEV_DEV_RESET", + "RTE_BBDEV_DEV_CONFIGURED", + "RTE_BBDEV_DEV_ACTIVE", + "RTE_BBDEV_DEV_FATAL_ERR", + "RTE_BBDEV_DEV_RESTART_REQ", + "RTE_BBDEV_DEV_RECONFIG_REQ", + "RTE_BBDEV_DEV_CORRECT_ERR", + }; + + if (status < sizeof(dev_sta_string) / sizeof(char *)) + return dev_sta_string[status]; + + rte_bbdev_log(ERR, "Invalid device status"); + return NULL; +} diff --git a/lib/bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h index b88c88167e..5ba7a61ded 100644 --- a/lib/bbdev/rte_bbdev.h +++ b/lib/bbdev/rte_bbdev.h @@ -223,6 +223,21 @@ rte_bbdev_queue_start(uint16_t dev_id, uint16_t queue_id); int rte_bbdev_queue_stop(uint16_t dev_id, uint16_t queue_id); +/** + * Flags indicate the status of the device + */ +enum rte_bbdev_device_status { + RTE_BBDEV_DEV_NOSTATUS, /**< Nothing being reported */ + RTE_BBDEV_DEV_NOT_SUPPORTED, /**< Device status is not supported on the PMD */ + RTE_BBDEV_DEV_RESET, /**< Device in reset and un-configured state */ + RTE_BBDEV_DEV_CONFIGURED, /**< Device is configured and ready to use */ + RTE_BBDEV_DEV_ACTIVE, /**< Device is configured and VF is being used */ + RTE_BBDEV_DEV_FATAL_ERR, /**< Device has hit a fatal uncorrectable error */ + RTE_BBDEV_DEV_RESTART_REQ, /**< Device requires application to restart */ + RTE_BBDEV_DEV_RECONFIG_REQ, /**< Device requires application to reconfigure queues */ + RTE_BBDEV_DEV_CORRECT_ERR, /**< Warning of a correctable error event happened */ +}; + /** Device statistics. */ struct rte_bbdev_stats { uint64_t enqueued_count; /**< Count of all operations enqueued */ @@ -284,10 +299,12 @@ struct rte_bbdev_driver_info { uint8_t max_ul_queue_priority; /** Set if device supports per-queue interrupts */ bool queue_intr_supported; - /** Minimum alignment of buffers, in bytes */ - uint16_t min_alignment; + /** Device Status */ + enum rte_bbdev_device_status device_status; /** HARQ memory available in kB */ uint32_t harq_buffer_size; + /** Minimum alignment of buffers, in bytes */ + uint16_t min_alignment; /** Byte endianness (RTE_BIG_ENDIAN/RTE_LITTLE_ENDIAN) supported * for input/output data */ @@ -827,6 +844,20 @@ int rte_bbdev_queue_intr_ctl(uint16_t dev_id, uint16_t queue_id, int epfd, int op, void *data); +/** + * Converts device status from enum to string + * + * @param status + * Device status as enum + * + * @returns + * Operation type as string or NULL if op_type is invalid + * + */ +__rte_experimental +const char* +rte_bbdev_device_status_str(enum rte_bbdev_device_status status); + #ifdef __cplusplus } #endif diff --git a/lib/bbdev/version.map b/lib/bbdev/version.map index cce3f3c8f5..f0a072ea00 100644 --- a/lib/bbdev/version.map +++ b/lib/bbdev/version.map @@ -39,3 +39,10 @@ DPDK_22 { local: *; }; + +EXPERIMENTAL { + global: + + # added in 22.11 + rte_bbdev_device_status_str; +}; From patchwork Fri Sep 30 18:46:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 117231 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4FCAAA00C4; Fri, 30 Sep 2022 20:46:28 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3B8C84281E; Fri, 30 Sep 2022 20:46:14 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 348554003F for ; Fri, 30 Sep 2022 20:46:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664563571; x=1696099571; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=J84XvCMn8Pua3sjChG0QlXo7Of6L5cJVx0EThY2wtAQ=; b=c1C+Nv5C/cgDvWxixkWYwSZtwD0dI+HMlI3NRVKS6ucaLFQJFnJSZHLT sJ/rEbSVTXt423n4vm7HK/b0ByEOO4p+sy6o3mHAKXXURrx/9mf53XPDU iSdwYtshDNT361ML+8qGbKzWnluuuNuRb++uczlIPcGPoqZzr5gEP9gMb glverAEdCbwnc4e/fvJ0ZLBmlIzlHdEWiTsHHXV0t4UOepJf56tiM9pjQ HaFb1cc+7gDnO7FSWWf3SOrfaBtBJSA/NNCVgpA+jhW/jc3X2ehnQ2mcT nERuNgFUTyuzXMleS99ImB5XKBvzA7g3x3eB7UseV56G8P2bq6DsWstCC Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="289424031" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="289424031" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 11:46:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="951650870" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="951650870" Received: from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245]) by fmsmga005.fm.intel.com with ESMTP; 30 Sep 2022 11:46:08 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, mingshan.zhang@intel.com, hemant.agrawal@nxp.com, Nicolas Chautru Subject: [PATCH v10 3/7] bbdev: add device info on queue topology Date: Fri, 30 Sep 2022 11:46:01 -0700 Message-Id: <20220930184605.47655-4-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220930184605.47655-1-nicolas.chautru@intel.com> References: <1655491040-183649-6-git-send-email-nicolas.chautru@intel.com> <20220930184605.47655-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Adding more options in the API to expose the number of queues exposed and related priority. Signed-off-by: Nicolas Chautru Acked-by: Maxime Coquelin --- lib/bbdev/rte_bbdev.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h index 5ba7a61ded..d95049d44c 100644 --- a/lib/bbdev/rte_bbdev.h +++ b/lib/bbdev/rte_bbdev.h @@ -289,6 +289,10 @@ struct rte_bbdev_driver_info { /** Maximum number of queues supported by the device */ unsigned int max_num_queues; + /** Maximum number of queues supported per operation type */ + unsigned int num_queues[RTE_BBDEV_OP_TYPE_SIZE_MAX]; + /** Priority level supported per operation type */ + unsigned int queue_priority[RTE_BBDEV_OP_TYPE_SIZE_MAX]; /** Queue size limit (queue size must also be power of 2) */ uint32_t queue_size_lim; /** Set if device off-loads operation to hardware */ From patchwork Fri Sep 30 18:46:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 117232 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1E292A00C4; Fri, 30 Sep 2022 20:46:36 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 676C3427FF; Fri, 30 Sep 2022 20:46:17 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 5C44B410FA for ; Fri, 30 Sep 2022 20:46:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664563571; x=1696099571; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fpFr/S2uu9mFwu0mGqdtkNRYvKQZETfjutXgkS0fpZA=; b=Xg4oAr1sbRCcfyORZvLD/rgxiMVIvaIVOmnqJ3IyOeQleUqkY3bbZh0F KFPQDc3a8vimmWanG5IBiWIy9P1nkVDNkji3iBIzolLKHaxevu6P0dOmz uBfyZiX7rmvSDPmK3KzCSLQpWWNu3OiHmmXQ35IS3gzlncRB03GI0T4Vc oKqAFYCfG2p/5/rT7yh9NJ1UOLN38kiYuiqlFOMnJI5ZzYqDcu7ZsdSFc Hlxp8u8asqLH48uZCWKRWRwxMydD5l6k55U24FukLuFyE4cKyQErDV32p DGMxUMzvFds75dHjax1w9pvsNQiA9oK2FAxrz4Laz3J+lZiCAzN6SGeOV g==; X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="289424034" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="289424034" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 11:46:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="951650877" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="951650877" Received: from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245]) by fmsmga005.fm.intel.com with ESMTP; 30 Sep 2022 11:46:08 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, mingshan.zhang@intel.com, hemant.agrawal@nxp.com, Nicolas Chautru Subject: [PATCH v10 4/7] drivers/baseband: update PMDs to expose queue per operation Date: Fri, 30 Sep 2022 11:46:02 -0700 Message-Id: <20220930184605.47655-5-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220930184605.47655-1-nicolas.chautru@intel.com> References: <1655491040-183649-6-git-send-email-nicolas.chautru@intel.com> <20220930184605.47655-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support in existing bbdev PMDs for the explicit number of queues and priority for each operation type configured on the device. Signed-off-by: Nicolas Chautru Acked-by: Maxime Coquelin Acked-by: Hemant Agrawal --- drivers/baseband/acc100/rte_acc100_pmd.c | 29 +++++++++++-------- .../fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 8 +++++ drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 8 +++++ drivers/baseband/la12xx/bbdev_la12xx.c | 7 +++++ .../baseband/turbo_sw/bbdev_turbo_software.c | 12 ++++++++ 5 files changed, 52 insertions(+), 12 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index 17ba7981a1..f967e3f801 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -966,6 +966,7 @@ acc100_dev_info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info) { struct acc100_device *d = dev->data->dev_private; + int i; static const struct rte_bbdev_op_cap bbdev_capabilities[] = { { @@ -1062,19 +1063,23 @@ acc100_dev_info_get(struct rte_bbdev *dev, fetch_acc100_config(dev); dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED; - /* This isn't ideal because it reports the maximum number of queues but - * does not provide info on how many can be uplink/downlink or different - * priorities - */ - dev_info->max_num_queues = - d->acc100_conf.q_dl_5g.num_aqs_per_groups * - d->acc100_conf.q_dl_5g.num_qgroups + - d->acc100_conf.q_ul_5g.num_aqs_per_groups * - d->acc100_conf.q_ul_5g.num_qgroups + - d->acc100_conf.q_dl_4g.num_aqs_per_groups * - d->acc100_conf.q_dl_4g.num_qgroups + - d->acc100_conf.q_ul_4g.num_aqs_per_groups * + /* Expose number of queues */ + dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = d->acc100_conf.q_ul_4g.num_aqs_per_groups * d->acc100_conf.q_ul_4g.num_qgroups; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = d->acc100_conf.q_dl_4g.num_aqs_per_groups * + d->acc100_conf.q_dl_4g.num_qgroups; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = d->acc100_conf.q_ul_5g.num_aqs_per_groups * + d->acc100_conf.q_ul_5g.num_qgroups; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_aqs_per_groups * + d->acc100_conf.q_dl_5g.num_qgroups; + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = d->acc100_conf.q_ul_4g.num_qgroups; + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = d->acc100_conf.q_dl_4g.num_qgroups; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = d->acc100_conf.q_ul_5g.num_qgroups; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_qgroups; + dev_info->max_num_queues = 0; + for (i = RTE_BBDEV_OP_TURBO_DEC; i <= RTE_BBDEV_OP_LDPC_ENC; i++) + dev_info->max_num_queues += dev_info->num_queues[i]; dev_info->queue_size_lim = ACC100_MAX_QUEUE_DEPTH; dev_info->hardware_accelerated = true; dev_info->max_dl_queue_priority = diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c index 57b12af93e..b4982af7ee 100644 --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c @@ -379,6 +379,14 @@ fpga_dev_info_get(struct rte_bbdev *dev, if (hw_q_id != FPGA_INVALID_HW_QUEUE_ID) dev_info->max_num_queues++; } + /* Expose number of queue per operation type */ + dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = dev_info->max_num_queues / 2; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = dev_info->max_num_queues / 2; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 1; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 1; } /** diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c index 2a330c4ae2..dc7f479d6a 100644 --- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c +++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c @@ -655,6 +655,14 @@ fpga_dev_info_get(struct rte_bbdev *dev, if (hw_q_id != FPGA_INVALID_HW_QUEUE_ID) dev_info->max_num_queues++; } + /* Expose number of queue per operation type */ + dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = dev_info->max_num_queues / 2; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = dev_info->max_num_queues / 2; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = 0; + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = 1; + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = 1; } /** diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c b/drivers/baseband/la12xx/bbdev_la12xx.c index c1f88c65b8..e99ea9ad0f 100644 --- a/drivers/baseband/la12xx/bbdev_la12xx.c +++ b/drivers/baseband/la12xx/bbdev_la12xx.c @@ -102,6 +102,13 @@ la12xx_info_get(struct rte_bbdev *dev __rte_unused, dev_info->min_alignment = 64; dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED; + dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = LA12XX_MAX_QUEUES / 2; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = LA12XX_MAX_QUEUES / 2; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 1; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 1; rte_bbdev_log_debug("got device info from %u", dev->data->dev_id); } diff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c b/drivers/baseband/turbo_sw/bbdev_turbo_software.c index dbc5524f94..3609c13705 100644 --- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c +++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c @@ -157,6 +157,8 @@ static void info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info) { struct bbdev_private *internals = dev->data->dev_private; + const struct rte_bbdev_op_cap *op_cap; + int num_op_type = 0; static const struct rte_bbdev_op_cap bbdev_capabilities[] = { #ifdef RTE_BBDEV_SDK_AVX2 @@ -256,6 +258,16 @@ info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info) dev_info->data_endianness = RTE_LITTLE_ENDIAN; dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED; + op_cap = bbdev_capabilities; + for (; op_cap->type != RTE_BBDEV_OP_NONE; ++op_cap) + num_op_type++; + op_cap = bbdev_capabilities; + if (num_op_type > 0) { + int num_queue_per_type = dev_info->max_num_queues / num_op_type; + for (; op_cap->type != RTE_BBDEV_OP_NONE; ++op_cap) + dev_info->num_queues[op_cap->type] = num_queue_per_type; + } + rte_bbdev_log_debug("got device info from %u\n", dev->data->dev_id); } From patchwork Fri Sep 30 18:46:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 117233 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3D17AA00C4; Fri, 30 Sep 2022 20:46:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 48F4042B6E; Fri, 30 Sep 2022 20:46:18 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 83C1141109 for ; Fri, 30 Sep 2022 20:46:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664563571; x=1696099571; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4zfT6FhWDKvla3A5N+JBhPKW3U9Tw5AMRhvPLCmgfGY=; b=EizdDfi+x7AfFMts4wER2vFM7rUYKbAZ33uGnZNy0zsFV6nnrcOd6lhC dV5jnSmUlfv8XMqGmFMrJA3joCVPzH9g4CoNWIHsWt4jhXdLmqUdkahI8 gIldXwhOppjzAL8V+jNmDegO0RfoEqf1renrhGrs/QqVljpMpLw9ubUtC xa6UUYkZxf//4d2aiWsNourj3ItdGztOfUT09npXUV3LDk5gUvHQh2q/h +IrQ+ZLcwPZbuPiGQQ35Ljm0TESn2E5r5LUSJKPMTXIbH4Nck5G9rkl5k BqzabAZEfrdGXPe/dudXlsHJC8bIe9GfMvDoLjZaoSFhSxnBpwYoLpxVI g==; X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="289424036" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="289424036" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 11:46:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="951650884" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="951650884" Received: from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245]) by fmsmga005.fm.intel.com with ESMTP; 30 Sep 2022 11:46:09 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, mingshan.zhang@intel.com, hemant.agrawal@nxp.com, Nicolas Chautru Subject: [PATCH v10 5/7] bbdev: add new operation for FFT processing Date: Fri, 30 Sep 2022 11:46:03 -0700 Message-Id: <20220930184605.47655-6-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220930184605.47655-1-nicolas.chautru@intel.com> References: <1655491040-183649-6-git-send-email-nicolas.chautru@intel.com> <20220930184605.47655-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Extension of bbdev operation to support FFT based operations. Signed-off-by: Nicolas Chautru Acked-by: Hemant Agrawal Acked-by: Maxime Coquelin --- doc/guides/prog_guide/bbdev.rst | 103 ++++++++++++++++++++++ lib/bbdev/rte_bbdev.c | 10 ++- lib/bbdev/rte_bbdev.h | 76 ++++++++++++++++ lib/bbdev/rte_bbdev_op.h | 149 ++++++++++++++++++++++++++++++++ lib/bbdev/version.map | 4 + 5 files changed, 341 insertions(+), 1 deletion(-) diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst index 70fa01ada5..1c7eb24148 100644 --- a/doc/guides/prog_guide/bbdev.rst +++ b/doc/guides/prog_guide/bbdev.rst @@ -1118,6 +1118,109 @@ Figure :numref:`figure_turbo_tb_decode` above showing the Turbo decoding of CBs using BBDEV interface in TB-mode is also valid for LDPC decode. +BBDEV FFT Operation +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +This operation allows to run a combination of DFT and/or IDFT and/or time-domain windowing. +These can be used in a modular fashion (using bypass modes) or as a processing pipeline +which can be used for FFT-based baseband signal processing. +In more details it allows : +- to process the data first through an IDFT of adjustable size and padding; +- to perform the windowing as a programmable cyclic shift offset of the data followed by a +pointwise multiplication by a time domain window; +- to process the related data through a DFT of adjustable size and de-padding for each such cyclic +shift output. + +A flexible number of Rx antennas are being processed in parallel with the same configuration. +The API allows more generally for flexibility in what the PMD may support (capability flags) and +flexibility to adjust some of the parameters of the processing. + +The operation/capability flags that can be set for each FFT operation are given below. + + **NOTE:** The actual operation flags that may be used with a specific + BBDEV PMD are dependent on the driver capabilities as reported via + ``rte_bbdev_info_get()``, and may be a subset of those below. + ++--------------------------------------------------------------------+ +|Description of FFT capability flags | ++====================================================================+ +|RTE_BBDEV_FFT_WINDOWING | +| Set to enable/support windowing in time domain | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_CS_ADJUSTMENT | +| Set to enable/support the cyclic shift time offset adjustment | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_DFT_BYPASS | +| Set to bypass the DFT and use directly the IDFT as an option | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_IDFT_BYPASS | +| Set to bypass the IDFT and use directly the DFT as an option | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_WINDOWING_BYPASS | +| Set to bypass the time domain windowing as an option | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_POWER_MEAS | +| Set to provide an optional power measurement of the DFT output | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_FP16_INPUT | +| Set if the input data shall use FP16 format instead of INT16 | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_FP16_OUTPUT | +| Set if the output data shall use FP16 format instead of INT16 | ++--------------------------------------------------------------------+ + +The FFT parameters are set out in the table below. + ++-------------------------+--------------------------------------------------------------+ +|Parameter |Description | ++=========================+==============================================================+ +|base_input |input data | ++-------------------------+--------------------------------------------------------------+ +|base_output |output data | ++-------------------------+--------------------------------------------------------------+ +|power_meas_output |optional output data with power measurement on DFT output | ++-------------------------+--------------------------------------------------------------+ +|op_flags |bitmask of all active operation capabilities | ++-------------------------+--------------------------------------------------------------+ +|input_sequence_size |size of the input sequence in 32-bits points per antenna | ++-------------------------+--------------------------------------------------------------+ +|input_leading_padding |number of points padded at the start of input data | ++-------------------------+--------------------------------------------------------------+ +|output_sequence_size |size of the output sequence per antenna and cyclic shift | ++-------------------------+--------------------------------------------------------------+ +|output_leading_depadding |number of points de-padded at the start of output data | ++-------------------------+--------------------------------------------------------------+ +|window_index |optional windowing profile index used for each cyclic shift | ++-------------------------+--------------------------------------------------------------+ +|cs_bitmap |bitmap of the cyclic shift output requested (LSB for index 0) | ++-------------------------+--------------------------------------------------------------+ +|num_antennas_log2 |number of antennas as a log2 (10 maps to 1024...) | ++-------------------------+--------------------------------------------------------------+ +|idft_log2 |iDFT size as a log2 | ++-------------------------+--------------------------------------------------------------+ +|dft_log2 |DFT size as a log2 | ++-------------------------+--------------------------------------------------------------+ +|cs_time_adjustment |adjustment of time position of all the cyclic shift output | ++-------------------------+--------------------------------------------------------------+ +|idft_shift |shift down of signal level post iDFT | ++-------------------------+--------------------------------------------------------------+ +|dft_shift |shift down of signal level post DFT | ++-------------------------+--------------------------------------------------------------+ +|ncs_reciprocal |inverse of max number of CS normalized to 15b (ie. 231 for 12)| ++-------------------------+--------------------------------------------------------------+ +|power_shift |shift down of level of power measurement when enabled | ++-------------------------+--------------------------------------------------------------+ +|fp16_exp_adjust |value added to FP16 exponent at conversion from INT16 | ++-------------------------+--------------------------------------------------------------+ + +The mbuf input ``base_input`` is mandatory for all BBDEV PMDs and is the +incoming data for the processing. Its size may not fit into an actual mbuf, but the +structure is used to pass iova address. +The mbuf output ``output`` is mandatory and is output of the FFT processing chain. +Each point is a complex number of 32bits : either as 2 INT16 or as 2 FP16 based when the option +supported. +The data layout is based on contiguous concatenation of output data first by cyclic shift then +by antenna. Sample code ----------- diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c index 38630a23f8..9d65ba8cd3 100644 --- a/lib/bbdev/rte_bbdev.c +++ b/lib/bbdev/rte_bbdev.c @@ -24,7 +24,7 @@ #define DEV_NAME "BBDEV" /* Number of supported operation types */ -#define BBDEV_OP_TYPE_COUNT 5 +#define BBDEV_OP_TYPE_COUNT 6 /* BBDev library logging ID */ RTE_LOG_REGISTER_DEFAULT(bbdev_logtype, NOTICE); @@ -852,6 +852,9 @@ get_bbdev_op_size(enum rte_bbdev_op_type type) case RTE_BBDEV_OP_LDPC_ENC: result = sizeof(struct rte_bbdev_enc_op); break; + case RTE_BBDEV_OP_FFT: + result = sizeof(struct rte_bbdev_fft_op); + break; default: break; } @@ -875,6 +878,10 @@ bbdev_op_init(struct rte_mempool *mempool, void *arg, void *element, struct rte_bbdev_enc_op *op = element; memset(op, 0, mempool->elt_size); op->mempool = mempool; + } else if (type == RTE_BBDEV_OP_FFT) { + struct rte_bbdev_fft_op *op = element; + memset(op, 0, mempool->elt_size); + op->mempool = mempool; } } @@ -1125,6 +1132,7 @@ rte_bbdev_op_type_str(enum rte_bbdev_op_type op_type) "RTE_BBDEV_OP_TURBO_ENC", "RTE_BBDEV_OP_LDPC_DEC", "RTE_BBDEV_OP_LDPC_ENC", + "RTE_BBDEV_OP_FFT", }; if (op_type < BBDEV_OP_TYPE_COUNT) diff --git a/lib/bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h index d95049d44c..0ac863ce4d 100644 --- a/lib/bbdev/rte_bbdev.h +++ b/lib/bbdev/rte_bbdev.h @@ -401,6 +401,12 @@ typedef uint16_t (*rte_bbdev_enqueue_dec_ops_t)( struct rte_bbdev_dec_op **ops, uint16_t num); +/** @internal Enqueue FFT operations for processing on queue of a device. */ +typedef uint16_t (*rte_bbdev_enqueue_fft_ops_t)( + struct rte_bbdev_queue_data *q_data, + struct rte_bbdev_fft_op **ops, + uint16_t num); + /** @internal Dequeue encode operations from a queue of a device. */ typedef uint16_t (*rte_bbdev_dequeue_enc_ops_t)( struct rte_bbdev_queue_data *q_data, @@ -411,6 +417,11 @@ typedef uint16_t (*rte_bbdev_dequeue_dec_ops_t)( struct rte_bbdev_queue_data *q_data, struct rte_bbdev_dec_op **ops, uint16_t num); +/** @internal Dequeue FFT operations from a queue of a device. */ +typedef uint16_t (*rte_bbdev_dequeue_fft_ops_t)( + struct rte_bbdev_queue_data *q_data, + struct rte_bbdev_fft_op **ops, uint16_t num); + #define RTE_BBDEV_NAME_MAX_LEN 64 /**< Max length of device name */ /** @@ -459,6 +470,10 @@ struct __rte_cache_aligned rte_bbdev { rte_bbdev_dequeue_enc_ops_t dequeue_ldpc_enc_ops; /** Dequeue decode function */ rte_bbdev_dequeue_dec_ops_t dequeue_ldpc_dec_ops; + /** Enqueue FFT function */ + rte_bbdev_enqueue_fft_ops_t enqueue_fft_ops; + /** Dequeue FFT function */ + rte_bbdev_dequeue_fft_ops_t dequeue_fft_ops; const struct rte_bbdev_ops *dev_ops; /**< Functions exported by PMD */ struct rte_bbdev_data *data; /**< Pointer to device data */ enum rte_bbdev_state state; /**< If device is currently used or not */ @@ -591,6 +606,36 @@ rte_bbdev_enqueue_ldpc_dec_ops(uint16_t dev_id, uint16_t queue_id, return dev->enqueue_ldpc_dec_ops(q_data, ops, num_ops); } +/** + * Enqueue a burst of FFT operations to a queue of the device. + * This functions only enqueues as many operations as currently possible and + * does not block until @p num_ops entries in the queue are available. + * This function does not provide any error notification to avoid the + * corresponding overhead. + * + * @param dev_id + * The identifier of the device. + * @param queue_id + * The index of the queue. + * @param ops + * Pointer array containing operations to be enqueued Must have at least + * @p num_ops entries + * @param num_ops + * The maximum number of operations to enqueue. + * + * @return + * The number of operations actually enqueued (this is the number of processed + * entries in the @p ops array). + */ +__rte_experimental +static inline uint16_t +rte_bbdev_enqueue_fft_ops(uint16_t dev_id, uint16_t queue_id, + struct rte_bbdev_fft_op **ops, uint16_t num_ops) +{ + struct rte_bbdev *dev = &rte_bbdev_devices[dev_id]; + struct rte_bbdev_queue_data *q_data = &dev->data->queues[queue_id]; + return dev->enqueue_fft_ops(q_data, ops, num_ops); +} /** * Dequeue a burst of processed encode operations from a queue of the device. @@ -716,6 +761,37 @@ rte_bbdev_dequeue_ldpc_dec_ops(uint16_t dev_id, uint16_t queue_id, return dev->dequeue_ldpc_dec_ops(q_data, ops, num_ops); } +/** + * Dequeue a burst of FFT operations from a queue of the device. + * This functions returns only the current contents of the queue, and does not + * block until @ num_ops is available. + * This function does not provide any error notification to avoid the + * corresponding overhead. + * + * @param dev_id + * The identifier of the device. + * @param queue_id + * The index of the queue. + * @param ops + * Pointer array where operations will be dequeued to. Must have at least + * @p num_ops entries + * @param num_ops + * The maximum number of operations to dequeue. + * + * @return + * The number of operations actually dequeued (this is the number of entries + * copied into the @p ops array). + */ +__rte_experimental +static inline uint16_t +rte_bbdev_dequeue_fft_ops(uint16_t dev_id, uint16_t queue_id, + struct rte_bbdev_fft_op **ops, uint16_t num_ops) +{ + struct rte_bbdev *dev = &rte_bbdev_devices[dev_id]; + struct rte_bbdev_queue_data *q_data = &dev->data->queues[queue_id]; + return dev->dequeue_fft_ops(q_data, ops, num_ops); +} + /** Definitions of device event types */ enum rte_bbdev_event_type { RTE_BBDEV_EVENT_UNKNOWN, /**< unknown event type */ diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h index 4f1cff8412..73677188ab 100644 --- a/lib/bbdev/rte_bbdev_op.h +++ b/lib/bbdev/rte_bbdev_op.h @@ -47,6 +47,8 @@ extern "C" { #define RTE_BBDEV_TURBO_MAX_CODE_BLOCKS (64) /* LDPC: Maximum number of Code Blocks in Transport Block.*/ #define RTE_BBDEV_LDPC_MAX_CODE_BLOCKS (256) +/* 12 CS maximum */ +#define RTE_BBDEV_MAX_CS_2 (6) /* * Maximum size to be used to manage the enum rte_bbdev_op_type including padding for future @@ -217,6 +219,26 @@ enum rte_bbdev_op_ldpcenc_flag_bitmasks { RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7) }; +/** Flags for DFT operation and capability structure */ +enum rte_bbdev_op_fft_flag_bitmasks { + /** Flexible windowing capability */ + RTE_BBDEV_FFT_WINDOWING = (1ULL << 0), + /** Flexible adjustment of Cyclic Shift time offset */ + RTE_BBDEV_FFT_CS_ADJUSTMENT = (1ULL << 1), + /** Set for bypass the DFT and get directly into iDFT input */ + RTE_BBDEV_FFT_DFT_BYPASS = (1ULL << 2), + /** Set for bypass the IDFT and get directly the DFT output */ + RTE_BBDEV_FFT_IDFT_BYPASS = (1ULL << 3), + /** Set for bypass time domain windowing */ + RTE_BBDEV_FFT_WINDOWING_BYPASS = (1ULL << 4), + /** Set for optional power measurement on DFT output */ + RTE_BBDEV_FFT_POWER_MEAS = (1ULL << 5), + /** Set if the input data used FP16 format */ + RTE_BBDEV_FFT_FP16_INPUT = (1ULL << 6), + /** Set if the output data uses FP16 format */ + RTE_BBDEV_FFT_FP16_OUTPUT = (1ULL << 7) +}; + /** Flags for the Code Block/Transport block mode */ enum rte_bbdev_op_cb_mode { /** One operation is one or fraction of one transport block */ @@ -695,6 +717,55 @@ struct rte_bbdev_op_ldpc_enc { }; }; +/** Operation structure for FFT processing. + * + * The operation processes the data for multiple antennas in a single call + * (.i.e for all the REs belonging to a given SRS sequence for instance) + * + * The output mbuf data structure is expected to be allocated by the + * application with enough room for the output data. + */ +struct rte_bbdev_op_fft { + /** Input data starting from first antenna */ + struct rte_bbdev_op_data base_input; + /** Output data starting from first antenna and first cyclic shift */ + struct rte_bbdev_op_data base_output; + /** Optional power measurement output data */ + struct rte_bbdev_op_data power_meas_output; + /** Flags from rte_bbdev_op_fft_flag_bitmasks */ + uint32_t op_flags; + /** Input sequence size in 32-bits points */ + uint16_t input_sequence_size; + /** Padding at the start of the sequence */ + uint16_t input_leading_padding; + /** Output sequence size in 32-bits points */ + uint16_t output_sequence_size; + /** Depadding at the start of the DFT output */ + uint16_t output_leading_depadding; + /** Window index being used for each cyclic shift output */ + uint8_t window_index[RTE_BBDEV_MAX_CS_2]; + /** Bitmap of the cyclic shift output requested */ + uint16_t cs_bitmap; + /** Number of antennas as a log2 – 8 to 128 */ + uint8_t num_antennas_log2; + /** iDFT size as a log2 - 32 to 2048 */ + uint8_t idft_log2; + /** DFT size as a log2 - 8 to 2048 */ + uint8_t dft_log2; + /** Adjustment of position of the cyclic shifts - -31 to 31 */ + int8_t cs_time_adjustment; + /** iDFT shift down */ + int8_t idft_shift; + /** DFT shift down */ + int8_t dft_shift; + /** NCS reciprocal factor */ + uint16_t ncs_reciprocal; + /** power measurement out shift down */ + uint16_t power_shift; + /** Adjust the FP6 exponent for INT<->FP16 conversion */ + uint16_t fp16_exp_adjust; +}; + /** List of the capabilities for the Turbo Decoder */ struct rte_bbdev_op_cap_turbo_dec { /** Flags from rte_bbdev_op_td_flag_bitmasks */ @@ -747,6 +818,16 @@ struct rte_bbdev_op_cap_ldpc_enc { uint16_t num_buffers_dst; }; +/** List of the capabilities for the FFT */ +struct rte_bbdev_op_cap_fft { + /** Flags from rte_bbdev_op_fft_flag_bitmasks */ + uint32_t capability_flags; + /** Num input code block buffers */ + uint16_t num_buffers_src; + /** Num output code block buffers */ + uint16_t num_buffers_dst; +}; + /** Different operation types supported by the device * The related macro RTE_BBDEV_OP_TYPE_SIZE_MAX can be used as an absolute maximum for * notably sizing array while allowing for future enumeration insertion. @@ -757,6 +838,7 @@ enum rte_bbdev_op_type { RTE_BBDEV_OP_TURBO_ENC, /**< Turbo encode */ RTE_BBDEV_OP_LDPC_DEC, /**< LDPC decode */ RTE_BBDEV_OP_LDPC_ENC, /**< LDPC encode */ + RTE_BBDEV_OP_FFT, /**< FFT */ }; /** Bit indexes of possible errors reported through status field */ @@ -799,6 +881,18 @@ struct rte_bbdev_dec_op { }; }; +/** Structure specifying a single FFT operation */ +struct rte_bbdev_fft_op { + /** Status of operation that was performed */ + int status; + /** Mempool which op instance is in */ + struct rte_mempool *mempool; + /** Opaque pointer for user data */ + void *opaque_data; + /** Contains turbo decoder specific parameters */ + struct rte_bbdev_op_fft fft; +}; + /** Operation capabilities supported by a device */ struct rte_bbdev_op_cap { enum rte_bbdev_op_type type; /**< Type of operation */ @@ -807,6 +901,7 @@ struct rte_bbdev_op_cap { struct rte_bbdev_op_cap_turbo_enc turbo_enc; struct rte_bbdev_op_cap_ldpc_dec ldpc_dec; struct rte_bbdev_op_cap_ldpc_enc ldpc_enc; + struct rte_bbdev_op_cap_fft fft; } cap; /**< Operation-type specific capabilities */ }; @@ -925,6 +1020,42 @@ rte_bbdev_dec_op_alloc_bulk(struct rte_mempool *mempool, return 0; } +/** + * Bulk allocate FFT operations from a mempool with parameter defaults reset. + * + * @param mempool + * Operation mempool, created by rte_bbdev_op_pool_create(). + * @param ops + * Output array to place allocated operations + * @param num_ops + * Number of operations to allocate + * + * @returns + * - 0 on success + * - EINVAL if invalid mempool is provided + */ +__rte_experimental +static inline int +rte_bbdev_fft_op_alloc_bulk(struct rte_mempool *mempool, + struct rte_bbdev_fft_op **ops, uint16_t num_ops) +{ + struct rte_bbdev_op_pool_private *priv; + int ret; + + /* Check type */ + priv = (struct rte_bbdev_op_pool_private *) + rte_mempool_get_priv(mempool); + if (unlikely(priv->type != RTE_BBDEV_OP_FFT)) + return -EINVAL; + + /* Get elements */ + ret = rte_mempool_get_bulk(mempool, (void **)ops, num_ops); + if (unlikely(ret < 0)) + return ret; + + return 0; +} + /** * Free decode operation structures that were allocated by * rte_bbdev_dec_op_alloc_bulk(). @@ -959,6 +1090,24 @@ rte_bbdev_enc_op_free_bulk(struct rte_bbdev_enc_op **ops, unsigned int num_ops) rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); } +/** + * Free encode operation structures that were allocated by + * *rte_bbdev_fft_op_alloc_bulk*. + * All structures must belong to the same mempool. + * + * @param ops + * Operation structures + * @param num_ops + * Number of structures + */ +__rte_experimental +static inline void +rte_bbdev_fft_op_free_bulk(struct rte_bbdev_fft_op **ops, unsigned int num_ops) +{ + if (num_ops > 0) + rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); +} + #ifdef __cplusplus } #endif diff --git a/lib/bbdev/version.map b/lib/bbdev/version.map index f0a072ea00..0cbeab3d47 100644 --- a/lib/bbdev/version.map +++ b/lib/bbdev/version.map @@ -45,4 +45,8 @@ EXPERIMENTAL { # added in 22.11 rte_bbdev_device_status_str; + rte_bbdev_enqueue_fft_ops; + rte_bbdev_dequeue_fft_ops; + rte_bbdev_fft_op_alloc_bulk; + rte_bbdev_fft_op_free_bulk; }; From patchwork Fri Sep 30 18:46:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 117234 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B67DCA00C4; Fri, 30 Sep 2022 20:46:48 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1F32442B72; Fri, 30 Sep 2022 20:46:19 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 5CF2D410FA for ; Fri, 30 Sep 2022 20:46:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664563572; x=1696099572; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HlIecZAwbUrdLhHP6VUi593Gtn04nSXl4MbTvDU0Yz8=; b=cBviqbPpdzY+odKWjNqoj1JWVhkoB7Oy5FIjygpJMjPPrG7lQgPF4fXq qNalMRBG3U6C/IUV1CACCzzTJqQ+PuhZsQY/4J1kBm74YBbS/pz0r3Q3j CAglcznOWbIywtmSTeNqBMQiJpD9nei87uJVruY8wGwDzlDGXqpat1mp+ v2MaWM/c2Pi0Vw2xRsb1OeqOVNNfo/UpwPseajxeqMfcXhyBdiBzpd4qS WXBmGqoMJdcBFhuIi8UXreFl0Mj3v8NijkOYljxxWCugGfG8+HmhJ+r0w 7KWKShgcsFili49+8t8cWzoSOmR5QY5vd3wyEcxhxEaaT3RFfIv5cS4e1 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="289424039" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="289424039" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 11:46:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="951650889" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="951650889" Received: from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245]) by fmsmga005.fm.intel.com with ESMTP; 30 Sep 2022 11:46:09 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, mingshan.zhang@intel.com, hemant.agrawal@nxp.com, Nicolas Chautru Subject: [PATCH v10 6/7] bbdev: add queue related warning and status information Date: Fri, 30 Sep 2022 11:46:04 -0700 Message-Id: <20220930184605.47655-7-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220930184605.47655-1-nicolas.chautru@intel.com> References: <1655491040-183649-6-git-send-email-nicolas.chautru@intel.com> <20220930184605.47655-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This allows to expose more information with regards to any queue related failure and warning which cannot be supported in existing API. Signed-off-by: Nicolas Chautru Acked-by: Maxime Coquelin --- app/test-bbdev/test_bbdev_perf.c | 2 ++ lib/bbdev/rte_bbdev.c | 19 +++++++++++++++ lib/bbdev/rte_bbdev.h | 41 ++++++++++++++++++++++++++++++++ lib/bbdev/version.map | 1 + 4 files changed, 63 insertions(+) diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c index 1abda2d995..653b21fcde 100644 --- a/app/test-bbdev/test_bbdev_perf.c +++ b/app/test-bbdev/test_bbdev_perf.c @@ -4360,6 +4360,8 @@ get_bbdev_queue_stats(uint16_t dev_id, uint16_t queue_id, stats->dequeued_count = q_stats->dequeued_count; stats->enqueue_err_count = q_stats->enqueue_err_count; stats->dequeue_err_count = q_stats->dequeue_err_count; + stats->enqueue_warning_count = q_stats->enqueue_warning_count; + stats->dequeue_warning_count = q_stats->dequeue_warning_count; stats->acc_offload_cycles = q_stats->acc_offload_cycles; return 0; diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c index 9d65ba8cd3..bdd7c2f00d 100644 --- a/lib/bbdev/rte_bbdev.c +++ b/lib/bbdev/rte_bbdev.c @@ -721,6 +721,8 @@ get_stats_from_queues(struct rte_bbdev *dev, struct rte_bbdev_stats *stats) stats->dequeued_count += q_stats->dequeued_count; stats->enqueue_err_count += q_stats->enqueue_err_count; stats->dequeue_err_count += q_stats->dequeue_err_count; + stats->enqueue_warn_count += q_stats->enqueue_warn_count; + stats->dequeue_warn_count += q_stats->dequeue_warn_count; } rte_bbdev_log_debug("Got stats on %u", dev->data->dev_id); } @@ -1163,3 +1165,20 @@ rte_bbdev_device_status_str(enum rte_bbdev_device_status status) rte_bbdev_log(ERR, "Invalid device status"); return NULL; } + +const char * +rte_bbdev_enqueue_status_str(enum rte_bbdev_enqueue_status status) +{ + static const char * const enq_sta_string[] = { + "RTE_BBDEV_ENQ_STATUS_NONE", + "RTE_BBDEV_ENQ_STATUS_QUEUE_FULL", + "RTE_BBDEV_ENQ_STATUS_RING_FULL", + "RTE_BBDEV_ENQ_STATUS_INVALID_OP", + }; + + if (status < sizeof(enq_sta_string) / sizeof(char *)) + return enq_sta_string[status]; + + rte_bbdev_log(ERR, "Invalid enqueue status"); + return NULL; +} diff --git a/lib/bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h index 0ac863ce4d..dcac4c220c 100644 --- a/lib/bbdev/rte_bbdev.h +++ b/lib/bbdev/rte_bbdev.h @@ -35,6 +35,12 @@ extern "C" { #define RTE_BBDEV_MAX_DEVS 128 /**< Max number of devices */ #endif +/* + * Maximum size to be used to manage the enum rte_bbdev_enqueue_status including padding for future + * enum insertion + */ +#define RTE_BBDEV_ENQ_STATUS_SIZE_MAX 6 + /** Flags indicate current state of BBDEV device */ enum rte_bbdev_state { RTE_BBDEV_UNUSED, @@ -223,6 +229,20 @@ rte_bbdev_queue_start(uint16_t dev_id, uint16_t queue_id); int rte_bbdev_queue_stop(uint16_t dev_id, uint16_t queue_id); +/** + * Flags indicate the reason why a previous enqueue may not have + * consumed all requested operations + * In case of multiple reasons the latter supersedes a previous one. + * The related macro RTE_BBDEV_ENQ_STATUS_SIZE_MAX can be used as an absolute maximum for + * notably sizing array while allowing for future enumeration insertion. + */ +enum rte_bbdev_enqueue_status { + RTE_BBDEV_ENQ_STATUS_NONE, /**< Nothing to report */ + RTE_BBDEV_ENQ_STATUS_QUEUE_FULL, /**< Not enough room in queue */ + RTE_BBDEV_ENQ_STATUS_RING_FULL, /**< Not enough room in ring */ + RTE_BBDEV_ENQ_STATUS_INVALID_OP, /**< Operation was rejected as invalid */ +}; + /** * Flags indicate the status of the device */ @@ -246,6 +266,12 @@ struct rte_bbdev_stats { uint64_t enqueue_err_count; /** Total error count on operations dequeued */ uint64_t dequeue_err_count; + /** Total warning count on operations enqueued */ + uint64_t enqueue_warn_count; + /** Total warning count on operations dequeued */ + uint64_t dequeue_warn_count; + /** Total enqueue status count based on rte_bbdev_enqueue_status enum */ + uint64_t enqueue_status_count[RTE_BBDEV_ENQ_STATUS_SIZE_MAX]; /** CPU cycles consumed by the (HW/SW) accelerator device to offload * the enqueue request to its internal queues. * - For a HW device this is the cycles consumed in MMIO write @@ -386,6 +412,7 @@ struct rte_bbdev_queue_data { void *queue_private; /**< Driver-specific per-queue data */ struct rte_bbdev_queue_conf conf; /**< Current configuration */ struct rte_bbdev_stats queue_stats; /**< Queue statistics */ + enum rte_bbdev_enqueue_status enqueue_status; /**< Enqueue status when op is rejected */ bool started; /**< Queue state */ }; @@ -938,6 +965,20 @@ __rte_experimental const char* rte_bbdev_device_status_str(enum rte_bbdev_device_status status); +/** + * Converts queue status from enum to string + * + * @param status + * Queue status as enum + * + * @returns + * Queue status as string or NULL if op_type is invalid + * + */ +__rte_experimental +const char* +rte_bbdev_enqueue_status_str(enum rte_bbdev_enqueue_status status); + #ifdef __cplusplus } #endif diff --git a/lib/bbdev/version.map b/lib/bbdev/version.map index 0cbeab3d47..f5e2dd742e 100644 --- a/lib/bbdev/version.map +++ b/lib/bbdev/version.map @@ -45,6 +45,7 @@ EXPERIMENTAL { # added in 22.11 rte_bbdev_device_status_str; + rte_bbdev_enqueue_status_str; rte_bbdev_enqueue_fft_ops; rte_bbdev_dequeue_fft_ops; rte_bbdev_fft_op_alloc_bulk; From patchwork Fri Sep 30 18:46:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 117235 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DA65CA00C4; Fri, 30 Sep 2022 20:46:54 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E724642B77; Fri, 30 Sep 2022 20:46:19 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id A5BC4427F7 for ; Fri, 30 Sep 2022 20:46:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664563572; x=1696099572; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mEXpfvWkLzhGbHtodfHg9ulZAD0Gp9YqPAfIHBRK6JQ=; b=atS7mpk3LvYfe7YrJ5xUe31X6u0URh2kDGLwHIHw9QfWlbGvkHboocTl ox0Oo9QvcH+E4hHWnyxqLTan8c03fW9XqxYInkjBVdBkHNLrpbHydvTwz QqICpZbimqw3GNDRQ5/qnzBk+3YxthP0kZdNEq7vMh7rpEoJpgq89KnTo /JhYDRyg32cJWTeVkkbBj0pN5IZdEVEFJQse2n/EWSTSLv76Ey+pSlsi5 iQn+bP9F8cbqhZM3+AUNh77D4EIoHWMG6P6/SrXzaLF6ZFUby1EZxdppT PTScSo8t9KT35dZ7dJjQdEpV2GwyEzw2Grx1u1bq8GAPjRZQC2u+65AH5 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="289424042" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="289424042" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 11:46:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10486"; a="951650895" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="951650895" Received: from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245]) by fmsmga005.fm.intel.com with ESMTP; 30 Sep 2022 11:46:10 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, mingshan.zhang@intel.com, hemant.agrawal@nxp.com, Nicolas Chautru Subject: [PATCH v10 7/7] bbdev: remove unnecessary if-check Date: Fri, 30 Sep 2022 11:46:05 -0700 Message-Id: <20220930184605.47655-8-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220930184605.47655-1-nicolas.chautru@intel.com> References: <1655491040-183649-6-git-send-email-nicolas.chautru@intel.com> <20220930184605.47655-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Code clean up due to if-check not required Signed-off-by: Nicolas Chautru Acked-by: Maxime Coquelin --- lib/bbdev/rte_bbdev_op.h | 24 ++++-------------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h index 73677188ab..c0940ce085 100644 --- a/lib/bbdev/rte_bbdev_op.h +++ b/lib/bbdev/rte_bbdev_op.h @@ -967,7 +967,6 @@ rte_bbdev_enc_op_alloc_bulk(struct rte_mempool *mempool, struct rte_bbdev_enc_op **ops, uint16_t num_ops) { struct rte_bbdev_op_pool_private *priv; - int ret; /* Check type */ priv = (struct rte_bbdev_op_pool_private *) @@ -977,11 +976,7 @@ rte_bbdev_enc_op_alloc_bulk(struct rte_mempool *mempool, return -EINVAL; /* Get elements */ - ret = rte_mempool_get_bulk(mempool, (void **)ops, num_ops); - if (unlikely(ret < 0)) - return ret; - - return 0; + return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); } /** @@ -1003,7 +998,6 @@ rte_bbdev_dec_op_alloc_bulk(struct rte_mempool *mempool, struct rte_bbdev_dec_op **ops, uint16_t num_ops) { struct rte_bbdev_op_pool_private *priv; - int ret; /* Check type */ priv = (struct rte_bbdev_op_pool_private *) @@ -1013,11 +1007,7 @@ rte_bbdev_dec_op_alloc_bulk(struct rte_mempool *mempool, return -EINVAL; /* Get elements */ - ret = rte_mempool_get_bulk(mempool, (void **)ops, num_ops); - if (unlikely(ret < 0)) - return ret; - - return 0; + return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); } /** @@ -1040,20 +1030,14 @@ rte_bbdev_fft_op_alloc_bulk(struct rte_mempool *mempool, struct rte_bbdev_fft_op **ops, uint16_t num_ops) { struct rte_bbdev_op_pool_private *priv; - int ret; /* Check type */ - priv = (struct rte_bbdev_op_pool_private *) - rte_mempool_get_priv(mempool); + priv = (struct rte_bbdev_op_pool_private *) rte_mempool_get_priv(mempool); if (unlikely(priv->type != RTE_BBDEV_OP_FFT)) return -EINVAL; /* Get elements */ - ret = rte_mempool_get_bulk(mempool, (void **)ops, num_ops); - if (unlikely(ret < 0)) - return ret; - - return 0; + return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); } /**