From patchwork Fri Sep 23 11:25:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Bhansali X-Patchwork-Id: 116734 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1305CA0544; Fri, 23 Sep 2022 13:25:41 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BF73840156; Fri, 23 Sep 2022 13:25:40 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 867B84003C for ; Fri, 23 Sep 2022 13:25:38 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28N678Nw026417; Fri, 23 Sep 2022 04:25:37 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=0MgUNAj5OuSn7ZJWRG3H5f7uouokEmuYlloIE7iI20U=; b=B2sv7ScMj/jJk2oUzkicI5Wt+UwR+fzPFgjBZWISmPLuuts9Cngrrlvd4yyfCNZA7Uw2 JlEgtBxoogR5GFlTxQ3R/dtFpReB4lL3UOQJ3eu2QYlFJcwzo+7syo0xlUimXsEWNho5 KiLM86oR6BXHRhZslTklwDIrvO6agKTz0X4dxZoQUo8BL6La7egtZPfrBS2L7taEH9JD TJJlVOc/SEFNGIYAsvFbN5WNaW266POvaiaDf6cbVbyjGeMoiZgAqvWxlH4AE+opZJoH HQ4fboaYF2BbNS70ZXmcXUOm+OcwQDA2Je2H0mw+5coJuKJZIZEBl/5qcYLdg4ANmzgf CQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3jrmx5d17k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 23 Sep 2022 04:25:37 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 23 Sep 2022 04:25:35 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 23 Sep 2022 04:25:35 -0700 Received: from localhost.localdomain (unknown [10.28.36.158]) by maili.marvell.com (Postfix) with ESMTP id 2DCE43F7078; Fri, 23 Sep 2022 04:25:33 -0700 (PDT) From: Rahul Bhansali To: , Radu Nicolau , Akhil Goyal CC: Rahul Bhansali Subject: [PATCH v2] examples/ipsec-secgw: free event vector mbufs Date: Fri, 23 Sep 2022 16:55:31 +0530 Message-ID: <20220923112531.347229-1-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-GUID: EDUEUS71stKu2TvzA_QoXF4xhtN89aYS X-Proofpoint-ORIG-GUID: EDUEUS71stKu2TvzA_QoXF4xhtN89aYS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-23_04,2022-09-22_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Free mbufs from event vector list when enqueue operation fails and during event port flush for cleanup. Signed-off-by: Rahul Bhansali --- v2: Added dependent series info. Depends-on: series-24761 ("[v2,1/3] eventdev: add element offset to event vector") examples/ipsec-secgw/ipsec_worker.c | 34 +++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 9 deletions(-) -- 2.25.1 diff --git a/examples/ipsec-secgw/ipsec_worker.c b/examples/ipsec-secgw/ipsec_worker.c index 5e69450d27..105326ddd3 100644 --- a/examples/ipsec-secgw/ipsec_worker.c +++ b/examples/ipsec-secgw/ipsec_worker.c @@ -699,6 +699,14 @@ process_ipsec_ev_drv_mode_outbound_vector(struct rte_event_vector *vec, return j; } +static void +ipsec_event_vector_free(struct rte_event *ev) +{ + struct rte_event_vector *vec = ev->vec; + rte_pktmbuf_free_bulk(vec->mbufs + vec->elem_offset, vec->nb_elem - vec->elem_offset); + rte_mempool_put(rte_mempool_from_obj(vec), vec); +} + static inline void ipsec_ev_vector_process(struct lcore_conf_ev_tx_int_port_wrkr *lconf, struct eh_event_link_info *links, @@ -720,9 +728,10 @@ ipsec_ev_vector_process(struct lcore_conf_ev_tx_int_port_wrkr *lconf, if (likely(ret > 0)) { vec->nb_elem = ret; - rte_event_eth_tx_adapter_enqueue(links[0].eventdev_id, - links[0].event_port_id, - ev, 1, 0); + ret = rte_event_eth_tx_adapter_enqueue(links[0].eventdev_id, + links[0].event_port_id, ev, 1, 0); + if (unlikely(ret == 0)) + ipsec_event_vector_free(ev); } else { rte_mempool_put(rte_mempool_from_obj(vec), vec); } @@ -735,17 +744,21 @@ ipsec_ev_vector_drv_mode_process(struct eh_event_link_info *links, { struct rte_event_vector *vec = ev->vec; struct rte_mbuf *pkt; + uint16_t ret; pkt = vec->mbufs[0]; + vec->attr_valid = 1; + vec->port = pkt->port; if (!is_unprotected_port(pkt->port)) vec->nb_elem = process_ipsec_ev_drv_mode_outbound_vector(vec, data); - if (vec->nb_elem > 0) - rte_event_eth_tx_adapter_enqueue(links[0].eventdev_id, - links[0].event_port_id, - ev, 1, 0); - else + if (likely(vec->nb_elem > 0)) { + ret = rte_event_eth_tx_adapter_enqueue(links[0].eventdev_id, + links[0].event_port_id, ev, 1, 0); + if (unlikely(ret == 0)) + ipsec_event_vector_free(ev); + } else rte_mempool_put(rte_mempool_from_obj(vec), vec); } @@ -759,7 +772,10 @@ static void ipsec_event_port_flush(uint8_t eventdev_id __rte_unused, struct rte_event ev, void *args __rte_unused) { - rte_pktmbuf_free(ev.mbuf); + if (ev.event_type & RTE_EVENT_TYPE_VECTOR) + ipsec_event_vector_free(&ev); + else + rte_pktmbuf_free(ev.mbuf); } /* Workers registered */