From patchwork Tue Nov 2 01:49:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xu, Ting" X-Patchwork-Id: 103381 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5A666A0C4D; Tue, 2 Nov 2021 02:47:46 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8970F410FE; Tue, 2 Nov 2021 02:47:41 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id E7886410FE for ; Tue, 2 Nov 2021 02:47:39 +0100 (CET) X-IronPort-AV: E=McAfee;i="6200,9189,10155"; a="231018572" X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="231018572" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2021 18:47:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="488888108" Received: from dpdk-xuting-second.sh.intel.com ([10.67.116.150]) by orsmga007.jf.intel.com with ESMTP; 01 Nov 2021 18:47:37 -0700 From: Ting Xu To: dev@dpdk.org Cc: qi.z.zhang@intel.com, qiming.yang@intel.com, junfeng.guo@intel.com, Ting Xu Date: Tue, 2 Nov 2021 09:49:41 +0800 Message-Id: <20211102014943.19726-2-ting.xu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211102014943.19726-1-ting.xu@intel.com> References: <20211008070934.6956-1-ting.xu@intel.com> <20211102014943.19726-1-ting.xu@intel.com> Subject: [dpdk-dev] [PATCH v3 1/3] net/ice/base: support add HW profile for RSS raw flow X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Based on the parser library, we can directly set HW profile and associate VSI for RSS raw flows. Add symmetric hash configuration for raw flow. Signed-off-by: Ting Xu --- drivers/net/ice/base/ice_flow.c | 109 ++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 16 +++++ 2 files changed, 125 insertions(+) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index f699dbbc74..da27d157c0 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -4071,6 +4071,115 @@ ice_rss_update_symm(struct ice_hw *hw, } } +/** + * ice_rss_cfg_raw_symm - configure symmetric hash parameters + * for raw pattern + * @hw: pointer to the hardware structure + * @prof: pointer to parser profile + * @prof_id: profile ID + * + * Calculate symmetric hash parameters based on input protocol type. + */ +static void +ice_rss_cfg_raw_symm(struct ice_hw *hw, + struct ice_parser_profile *prof, u64 prof_id) +{ + u8 src_idx, dst_idx, proto_id; + int len, i = 0; + + while (i < prof->fv_num) { + proto_id = prof->fv[i].proto_id; + + switch (proto_id) { + case ICE_PROT_IPV4_OF_OR_S: + len = ICE_FLOW_FLD_SZ_IPV4_ADDR / + ICE_FLOW_FV_EXTRACT_SZ; + if (prof->fv[i].offset == + ICE_FLOW_FIELD_IPV4_SRC_OFFSET && + prof->fv[i + len].proto_id == proto_id && + prof->fv[i + len].offset == + ICE_FLOW_FIELD_IPV4_DST_OFFSET) { + src_idx = i; + dst_idx = i + len; + i += 2 * len; + break; + } + i++; + continue; + case ICE_PROT_IPV6_OF_OR_S: + len = ICE_FLOW_FLD_SZ_IPV6_ADDR / + ICE_FLOW_FV_EXTRACT_SZ; + if (prof->fv[i].offset == + ICE_FLOW_FIELD_IPV6_SRC_OFFSET && + prof->fv[i + len].proto_id == proto_id && + prof->fv[i + len].offset == + ICE_FLOW_FIELD_IPV6_DST_OFFSET) { + src_idx = i; + dst_idx = i + len; + i += 2 * len; + break; + } + i++; + continue; + case ICE_PROT_TCP_IL: + case ICE_PROT_UDP_IL_OR_S: + case ICE_PROT_SCTP_IL: + len = ICE_FLOW_FLD_SZ_PORT / + ICE_FLOW_FV_EXTRACT_SZ; + if (prof->fv[i].offset == + ICE_FLOW_FIELD_SRC_PORT_OFFSET && + prof->fv[i + len].proto_id == proto_id && + prof->fv[i + len].offset == + ICE_FLOW_FIELD_DST_PORT_OFFSET) { + src_idx = i; + dst_idx = i + len; + i += 2 * len; + break; + } + i++; + continue; + default: + i++; + continue; + } + ice_rss_config_xor(hw, prof_id, src_idx, dst_idx, len); + } +} + +/* Max registers index per packet profile */ +#define ICE_SYMM_REG_INDEX_MAX 6 + +/** + * ice_rss_update_raw_symm - update symmetric hash configuration + * for raw pattern + * @hw: pointer to the hardware structure + * @cfg: configure parameters for raw pattern + * @id: profile tracking ID + * + * Update symmetric hash configuration for raw pattern if required. + * Otherwise only clear to default. + */ +void +ice_rss_update_raw_symm(struct ice_hw *hw, + struct ice_rss_raw_cfg *cfg, u64 id) +{ + struct ice_prof_map *map; + u8 prof_id, m; + + ice_acquire_lock(&hw->blk[ICE_BLK_RSS].es.prof_map_lock); + map = ice_search_prof_id(hw, ICE_BLK_RSS, id); + if (map) + prof_id = map->prof_id; + ice_release_lock(&hw->blk[ICE_BLK_RSS].es.prof_map_lock); + if (!map) + return; + /* clear to default */ + for (m = 0; m < ICE_SYMM_REG_INDEX_MAX; m++) + wr32(hw, GLQF_HSYMM(prof_id, m), 0); + if (cfg->symm) + ice_rss_cfg_raw_symm(hw, &cfg->prof, prof_id); +} + /** * ice_add_rss_cfg_sync - add an RSS configuration * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index dea7b3c0e8..f941ce4333 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -149,6 +149,13 @@ #define ICE_FLOW_HASH_NAT_T_ESP_IPV6_SPI \ (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_NAT_T_ESP_SPI) +#define ICE_FLOW_FIELD_IPV4_SRC_OFFSET 12 +#define ICE_FLOW_FIELD_IPV4_DST_OFFSET 16 +#define ICE_FLOW_FIELD_IPV6_SRC_OFFSET 8 +#define ICE_FLOW_FIELD_IPV6_DST_OFFSET 24 +#define ICE_FLOW_FIELD_SRC_PORT_OFFSET 0 +#define ICE_FLOW_FIELD_DST_PORT_OFFSET 2 + /* Protocol header fields within a packet segment. A segment consists of one or * more protocol headers that make up a logical group of protocol headers. Each * logical group of protocol headers encapsulates or is encapsulated using/by @@ -493,11 +500,18 @@ struct ice_flow_prof { struct ice_flow_action *acts; }; +struct ice_rss_raw_cfg { + struct ice_parser_profile prof; + bool raw_ena; + bool symm; +}; + struct ice_rss_cfg { struct LIST_ENTRY_TYPE l_entry; /* bitmap of VSIs added to the RSS entry */ ice_declare_bitmap(vsis, ICE_MAX_VSI); struct ice_rss_hash_cfg hash; + struct ice_rss_raw_cfg raw; }; enum ice_flow_action_type { @@ -585,5 +599,7 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, enum ice_status ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, const struct ice_rss_hash_cfg *cfg); +void ice_rss_update_raw_symm(struct ice_hw *hw, + struct ice_rss_raw_cfg *cfg, u64 id); u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs); #endif /* _ICE_FLOW_H_ */ From patchwork Tue Nov 2 01:49:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xu, Ting" X-Patchwork-Id: 103382 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A05A1A0C4D; Tue, 2 Nov 2021 02:47:51 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8AB3C41102; Tue, 2 Nov 2021 02:47:45 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id A2D7C41102 for ; Tue, 2 Nov 2021 02:47:43 +0100 (CET) X-IronPort-AV: E=McAfee;i="6200,9189,10155"; a="231018577" X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="231018577" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2021 18:47:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="488888117" Received: from dpdk-xuting-second.sh.intel.com ([10.67.116.150]) by orsmga007.jf.intel.com with ESMTP; 01 Nov 2021 18:47:39 -0700 From: Ting Xu To: dev@dpdk.org Cc: qi.z.zhang@intel.com, qiming.yang@intel.com, junfeng.guo@intel.com, Ting Xu Date: Tue, 2 Nov 2021 09:49:42 +0800 Message-Id: <20211102014943.19726-3-ting.xu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211102014943.19726-1-ting.xu@intel.com> References: <20211008070934.6956-1-ting.xu@intel.com> <20211102014943.19726-1-ting.xu@intel.com> Subject: [dpdk-dev] [PATCH v3 2/3] net/ice: enable protocol agnostic flow offloading in RSS X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Enable protocol agnostic flow offloading to support raw pattern input for RSS hash flow rule creation. It is based on Parser Library feature. Current rte_flow raw API is utilized. Signed-off-by: Ting Xu --- drivers/net/ice/ice_ethdev.h | 9 ++ drivers/net/ice/ice_hash.c | 286 ++++++++++++++++++++++++++++++++--- 2 files changed, 273 insertions(+), 22 deletions(-) diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h index bbfeb0cc23..76dc3c99e5 100644 --- a/drivers/net/ice/ice_ethdev.h +++ b/drivers/net/ice/ice_ethdev.h @@ -500,6 +500,14 @@ struct ice_fdir_prof_info { u64 fdir_actived_cnt; }; +/** + * Structure to store rss fv entry. + */ +struct ice_rss_prof_info { + struct ice_parser_profile prof; + bool symm; +}; + /** * Structure to store private data for each PF/VF instance. */ @@ -524,6 +532,7 @@ struct ice_adapter { bool ptp_ena; uint64_t time_hw; struct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS]; + struct ice_rss_prof_info rss_prof_info[ICE_MAX_PTGS]; #ifdef RTE_ARCH_X86 bool rx_use_avx2; bool rx_use_avx512; diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c index 35eff8b17d..14e25a0383 100644 --- a/drivers/net/ice/ice_hash.c +++ b/drivers/net/ice/ice_hash.c @@ -32,6 +32,7 @@ #define ICE_PHINT_GTPU_EH BIT_ULL(3) #define ICE_PHINT_GTPU_EH_DWN BIT_ULL(4) #define ICE_PHINT_GTPU_EH_UP BIT_ULL(5) +#define ICE_PHINT_RAW BIT_ULL(6) #define ICE_GTPU_EH_DWNLINK 0 #define ICE_GTPU_EH_UPLINK 1 @@ -71,6 +72,7 @@ struct ice_rss_meta { uint8_t hash_function; struct ice_rss_hash_cfg cfg; + struct ice_rss_raw_cfg raw; }; struct ice_hash_flow_cfg { @@ -492,6 +494,7 @@ struct ice_rss_hash_cfg eth_tmplt = { */ static struct ice_pattern_match_item ice_hash_pattern_list[] = { /* IPV4 */ + {pattern_raw, ICE_INSET_NONE, ICE_INSET_NONE, NULL}, {pattern_eth_ipv4, ICE_RSS_TYPE_ETH_IPV4, ICE_INSET_NONE, &ipv4_tmplt}, {pattern_eth_ipv4_udp, ICE_RSS_TYPE_ETH_IPV4_UDP, ICE_INSET_NONE, &ipv4_udp_tmplt}, {pattern_eth_ipv4_tcp, ICE_RSS_TYPE_ETH_IPV4_TCP, ICE_INSET_NONE, &ipv4_tcp_tmplt}, @@ -612,6 +615,9 @@ ice_hash_parse_pattern(const struct rte_flow_item pattern[], uint64_t *phint, } switch (item->type) { + case RTE_FLOW_ITEM_TYPE_RAW: + *phint |= ICE_PHINT_RAW; + break; case RTE_FLOW_ITEM_TYPE_VLAN: *phint |= ICE_PHINT_VLAN; break; @@ -639,6 +645,91 @@ ice_hash_parse_pattern(const struct rte_flow_item pattern[], uint64_t *phint, return 0; } +static int +ice_hash_parse_raw_pattern(struct ice_adapter *ad, + const struct rte_flow_item *item, + struct ice_rss_meta *meta) +{ + const struct rte_flow_item_raw *raw_spec, *raw_mask; + struct ice_parser_profile prof; + struct ice_parser_result rslt; + struct ice_parser *psr; + uint8_t *pkt_buf, *msk_buf; + uint8_t spec_len, pkt_len; + uint8_t tmp_val = 0; + uint8_t tmp_c = 0; + int i, j; + + raw_spec = item->spec; + raw_mask = item->mask; + + spec_len = strlen((char *)(uintptr_t)raw_spec->pattern); + if (strlen((char *)(uintptr_t)raw_mask->pattern) != + spec_len) + return -rte_errno; + + pkt_len = spec_len / 2; + + pkt_buf = rte_zmalloc(NULL, pkt_len, 0); + if (!pkt_buf) + return -ENOMEM; + + msk_buf = rte_zmalloc(NULL, pkt_len, 0); + if (!msk_buf) + return -ENOMEM; + + /* convert string to int array */ + for (i = 0, j = 0; i < spec_len; i += 2, j++) { + tmp_c = raw_spec->pattern[i]; + if (tmp_c >= 'a' && tmp_c <= 'f') + tmp_val = tmp_c - 'a' + 10; + if (tmp_c >= 'A' && tmp_c <= 'F') + tmp_val = tmp_c - 'A' + 10; + if (tmp_c >= '0' && tmp_c <= '9') + tmp_val = tmp_c - '0'; + + tmp_c = raw_spec->pattern[i + 1]; + if (tmp_c >= 'a' && tmp_c <= 'f') + pkt_buf[j] = tmp_val * 16 + tmp_c - 'a' + 10; + if (tmp_c >= 'A' && tmp_c <= 'F') + pkt_buf[j] = tmp_val * 16 + tmp_c - 'A' + 10; + if (tmp_c >= '0' && tmp_c <= '9') + pkt_buf[j] = tmp_val * 16 + tmp_c - '0'; + + tmp_c = raw_mask->pattern[i]; + if (tmp_c >= 'a' && tmp_c <= 'f') + tmp_val = tmp_c - 0x57; + if (tmp_c >= 'A' && tmp_c <= 'F') + tmp_val = tmp_c - 0x37; + if (tmp_c >= '0' && tmp_c <= '9') + tmp_val = tmp_c - '0'; + + tmp_c = raw_mask->pattern[i + 1]; + if (tmp_c >= 'a' && tmp_c <= 'f') + msk_buf[j] = tmp_val * 16 + tmp_c - 'a' + 10; + if (tmp_c >= 'A' && tmp_c <= 'F') + msk_buf[j] = tmp_val * 16 + tmp_c - 'A' + 10; + if (tmp_c >= '0' && tmp_c <= '9') + msk_buf[j] = tmp_val * 16 + tmp_c - '0'; + } + + if (ice_parser_create(&ad->hw, &psr)) + return -rte_errno; + if (ice_parser_run(psr, pkt_buf, pkt_len, &rslt)) + return -rte_errno; + ice_parser_destroy(psr); + + if (ice_parser_profile_init(&rslt, pkt_buf, msk_buf, + pkt_len, ICE_BLK_RSS, true, &prof)) + return -rte_errno; + + rte_memcpy(&meta->raw.prof, &prof, sizeof(prof)); + + rte_free(pkt_buf); + rte_free(msk_buf); + return 0; +} + static void ice_refine_hash_cfg_l234(struct ice_rss_hash_cfg *hash_cfg, uint64_t rss_type) @@ -999,7 +1090,10 @@ ice_hash_parse_action(struct ice_pattern_match_item *pattern_match_item, RTE_ETH_HASH_FUNCTION_SYMMETRIC_TOEPLITZ) { rss_meta->hash_function = RTE_ETH_HASH_FUNCTION_SYMMETRIC_TOEPLITZ; - cfg->symm = true; + if (pattern_hint == ICE_PHINT_RAW) + rss_meta->raw.symm = true; + else + cfg->symm = true; } if (rss->level) @@ -1017,6 +1111,10 @@ ice_hash_parse_action(struct ice_pattern_match_item *pattern_match_item, RTE_FLOW_ERROR_TYPE_ACTION, action, "a non-NULL RSS queue is not supported"); + /* If pattern type is raw, no need to refine rss type */ + if (pattern_hint == ICE_PHINT_RAW) + break; + /** * Check simultaneous use of SRC_ONLY and DST_ONLY * of the same level. @@ -1085,6 +1183,17 @@ ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad, if (ret) goto error; + if (phint == ICE_PHINT_RAW) { + rss_meta_ptr->raw.raw_ena = true; + ret = ice_hash_parse_raw_pattern(ad, pattern, rss_meta_ptr); + if (ret) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, NULL, + "Parse raw pattern failed"); + goto error; + } + } + /* Check rss action. */ ret = ice_hash_parse_action(pattern_match_item, actions, phint, (void **)&rss_meta_ptr, error); @@ -1099,6 +1208,71 @@ ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad, return ret; } +static int +ice_hash_add_raw_cfg(struct ice_adapter *ad, + struct ice_rss_raw_cfg *cfg, u16 vsi_handle) +{ + struct ice_parser_profile *prof = &cfg->prof; + struct ice_rss_prof_info *rss_prof; + struct ice_hw *hw = &ad->hw; + int i, ptg, ret; + u64 id; + + id = (u64)ice_find_first_bit(prof->ptypes, UINT16_MAX); + + ptg = hw->blk[ICE_BLK_RSS].xlt1.t[id]; + rss_prof = &ad->rss_prof_info[ptg]; + /* check if ptg already has profile */ + if (rss_prof->prof.fv_num) { + for (i = 0; i < ICE_MAX_FV_WORDS; i++) { + if (rss_prof->prof.fv[i].proto_id != + prof->fv[i].proto_id || + rss_prof->prof.fv[i].offset != + prof->fv[i].offset) + break; + } + + /* current profile is matched, check symmetric hash */ + if (i == ICE_MAX_FV_WORDS) { + if (rss_prof->symm != cfg->symm) + goto update_symm; + + return 0; + } + + /* current profile is not matched, remove it */ + ret = ice_rem_prof_id_flow(hw, ICE_BLK_RSS, + ice_get_hw_vsi_num(hw, vsi_handle), + id); + if (ret) { + PMD_DRV_LOG(ERR, "remove RSS flow failed\n"); + return ret; + } + + ret = ice_rem_prof(hw, ICE_BLK_RSS, id); + if (ret) { + PMD_DRV_LOG(ERR, "remove RSS profile failed\n"); + return ret; + } + } + + /* add new profile */ + ret = ice_flow_set_hw_prof(hw, vsi_handle, 0, prof, ICE_BLK_RSS); + if (ret) { + PMD_DRV_LOG(ERR, "HW profile add failed\n"); + return ret; + } + + rss_prof->symm = cfg->symm; + ice_memcpy(&rss_prof->prof, prof, + sizeof(struct ice_parser_profile), + ICE_NONDMA_TO_NONDMA); + +update_symm: + ice_rss_update_raw_symm(hw, cfg, id); + return 0; +} + static int ice_hash_create(struct ice_adapter *ad, struct rte_flow *flow, @@ -1134,15 +1308,30 @@ ice_hash_create(struct ice_adapter *ad, goto out; } else { - memcpy(&filter_ptr->rss_cfg.hash, &rss_meta->cfg, - sizeof(struct ice_rss_hash_cfg)); - ret = ice_add_rss_cfg_wrap(pf, vsi->idx, - &filter_ptr->rss_cfg.hash); - if (ret) { - rte_flow_error_set(error, EINVAL, - RTE_FLOW_ERROR_TYPE_HANDLE, NULL, - "rss flow create fail"); - goto error; + if (rss_meta->raw.raw_ena) { + memcpy(&filter_ptr->rss_cfg.raw, &rss_meta->raw, + sizeof(struct ice_rss_raw_cfg)); + ret = ice_hash_add_raw_cfg(ad, &rss_meta->raw, + pf->main_vsi->idx); + if (ret) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_HANDLE, + NULL, + "rss flow create fail"); + goto error; + } + } else { + memcpy(&filter_ptr->rss_cfg.hash, &rss_meta->cfg, + sizeof(struct ice_rss_hash_cfg)); + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, + &filter_ptr->rss_cfg.hash); + if (ret) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_HANDLE, + NULL, + "rss flow create fail"); + goto error; + } } } @@ -1157,6 +1346,45 @@ ice_hash_create(struct ice_adapter *ad, return -rte_errno; } +static int +ice_hash_rem_raw_cfg(struct ice_adapter *ad, + struct ice_parser_profile *prof, + u16 vsi_handle) +{ + struct ice_hw *hw = &ad->hw; + int ptg, ret; + u16 vsig; + u64 id; + + id = (u64)ice_find_first_bit(prof->ptypes, 0xFFFF); + + ptg = hw->blk[ICE_BLK_RSS].xlt1.t[id]; + + memset(&ad->rss_prof_info[ptg], 0, + sizeof(struct ice_rss_prof_info)); + + /* check if vsig is already removed */ + ret = ice_vsig_find_vsi(hw, ICE_BLK_RSS, + ice_get_hw_vsi_num(hw, vsi_handle), &vsig); + if (!ret && vsig) { + ret = ice_rem_prof_id_flow(hw, ICE_BLK_RSS, + ice_get_hw_vsi_num(hw, vsi__handle), + id); + if (ret) + goto err; + + ret = ice_rem_prof(hw, ICE_BLK_RSS, id); + if (ret) + goto err; + } + + return 0; + +err: + PMD_DRV_LOG(ERR, "HW profile remove failed\n"); + return ret; +} + static int ice_hash_destroy(struct ice_adapter *ad, struct rte_flow *flow, @@ -1178,18 +1406,32 @@ ice_hash_destroy(struct ice_adapter *ad, (1 << VSIQF_HASH_CTL_HASH_SCHEME_S); ICE_WRITE_REG(hw, VSIQF_HASH_CTL(vsi->vsi_id), reg); } else { - ret = ice_rem_rss_cfg_wrap(pf, vsi->idx, - &filter_ptr->rss_cfg.hash); - /* Fixme: Ignore the error if a rule does not exist. - * Currently a rule for inputset change or symm turn on/off - * will overwrite an exist rule, while application still - * have 2 rte_flow handles. - **/ - if (ret && ret != ICE_ERR_DOES_NOT_EXIST) { - rte_flow_error_set(error, EINVAL, - RTE_FLOW_ERROR_TYPE_HANDLE, NULL, - "rss flow destroy fail"); - goto error; + if (filter_ptr->rss_cfg.raw.raw_ena) { + ret = + ice_hash_rem_raw_cfg(ad, &filter_ptr->rss_cfg.raw.prof, + pf->main_vsi->idx); + if (ret) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_HANDLE, + NULL, + "rss flow destroy fail"); + goto error; + } + } else { + ret = ice_rem_rss_cfg_wrap(pf, vsi->idx, + &filter_ptr->rss_cfg.hash); + /* Fixme: Ignore the error if a rule does not exist. + * Currently a rule for inputset change or symm turn + * on/off will overwrite an exist rule, while + * application still have 2 rte_flow handles. + **/ + if (ret && ret != ICE_ERR_DOES_NOT_EXIST) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_HANDLE, + NULL, + "rss flow destroy fail"); + goto error; + } } } From patchwork Tue Nov 2 01:49:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xu, Ting" X-Patchwork-Id: 103383 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7FEE3A0C4D; Tue, 2 Nov 2021 02:47:56 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 95B1941120; Tue, 2 Nov 2021 02:47:47 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 77FF74111F for ; Tue, 2 Nov 2021 02:47:46 +0100 (CET) X-IronPort-AV: E=McAfee;i="6200,9189,10155"; a="231018583" X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="231018583" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2021 18:47:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="488888124" Received: from dpdk-xuting-second.sh.intel.com ([10.67.116.150]) by orsmga007.jf.intel.com with ESMTP; 01 Nov 2021 18:47:43 -0700 From: Ting Xu To: dev@dpdk.org Cc: qi.z.zhang@intel.com, qiming.yang@intel.com, junfeng.guo@intel.com, Ting Xu Date: Tue, 2 Nov 2021 09:49:43 +0800 Message-Id: <20211102014943.19726-4-ting.xu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211102014943.19726-1-ting.xu@intel.com> References: <20211008070934.6956-1-ting.xu@intel.com> <20211102014943.19726-1-ting.xu@intel.com> Subject: [dpdk-dev] [PATCH v3 3/3] doc: add protocol agnostic flow offloading for RSS X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Protocol agnostic flow offloading for RSS hash is supported. Raw pattern input can be used to create RSS hash flow rules, using current rte_flow raw API. Signed-off-by: Ting Xu --- doc/guides/rel_notes/release_21_11.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst index 36fdee0a98..0582717628 100644 --- a/doc/guides/rel_notes/release_21_11.rst +++ b/doc/guides/rel_notes/release_21_11.rst @@ -168,6 +168,7 @@ New Features * **Updated Intel ice driver.** * Added protocol agnostic flow offloading support in Flow Director. + * Added protocol agnostic flow offloading support in RSS hash. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.