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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.35 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.35; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.35) by CO1NAM11FT061.mail.protection.outlook.com (10.13.175.200) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4415.16 via Frontend Transport; Wed, 18 Aug 2021 09:08:17 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 18 Aug 2021 09:08:17 +0000 Received: from nvidia.com (172.20.187.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 18 Aug 2021 09:08:14 +0000 From: Dmitry Kozlyuk To: CC: Matan Azrad , Olivier Matz , Andrew Rybchenko , Ray Kinsella , Anatoly Burakov Date: Wed, 18 Aug 2021 12:07:52 +0300 Message-ID: <20210818090755.2419483-2-dkozlyuk@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210818090755.2419483-1-dkozlyuk@nvidia.com> References: <20210818090755.2419483-1-dkozlyuk@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5940ae01-d6d3-42e2-034e-08d96227b7e5 X-MS-TrafficTypeDiagnostic: MN2PR12MB4784: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; 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CAT:NONE; SFS:(4636009)(396003)(376002)(346002)(136003)(39860400002)(46966006)(36840700001)(83380400001)(1076003)(7636003)(316002)(55016002)(478600001)(2906002)(86362001)(6916009)(356005)(54906003)(16526019)(82740400003)(36756003)(6666004)(4326008)(47076005)(8676002)(70206006)(7696005)(70586007)(26005)(186003)(2616005)(6286002)(8936002)(82310400003)(336012)(5660300002)(426003)(36860700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2021 09:08:17.7022 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5940ae01-d6d3-42e2-034e-08d96227b7e5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.35]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT061.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4784 Subject: [dpdk-dev] [PATCH 1/4] mempool: add event callbacks X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Performance of MLX5 PMD of different classes can benefit if PMD knows which memory it will need to handle in advance, before the first mbuf is sent to the PMD. It is impractical, however, to consider all allocated memory for this purpose. Most often mbuf memory comes from mempools that can come and go. PMD can enumerate existing mempools on device start, but it also needs to track mempool creation and destruction after the forwarding starts but before an mbuf from the new mempool is sent to the device. Add an internal API to register callback for mempool lify cycle events, currently RTE_MEMPOOL_EVENT_CREATE and RTE_MEMPOOL_EVENT_DESTROY: * rte_mempool_event_callback_register() * rte_mempool_event_callback_unregister() Signed-off-by: Dmitry Kozlyuk Acked-by: Matan Azrad Acked-by: Jerin Jacob --- lib/mempool/rte_mempool.c | 153 ++++++++++++++++++++++++++++++++++++-- lib/mempool/rte_mempool.h | 56 ++++++++++++++ lib/mempool/version.map | 8 ++ 3 files changed, 212 insertions(+), 5 deletions(-) diff --git a/lib/mempool/rte_mempool.c b/lib/mempool/rte_mempool.c index 59a588425b..0ec56ad278 100644 --- a/lib/mempool/rte_mempool.c +++ b/lib/mempool/rte_mempool.c @@ -42,6 +42,18 @@ static struct rte_tailq_elem rte_mempool_tailq = { }; EAL_REGISTER_TAILQ(rte_mempool_tailq) +TAILQ_HEAD(mempool_callback_list, rte_tailq_entry); + +static struct rte_tailq_elem callback_tailq = { + .name = "RTE_MEMPOOL_CALLBACK", +}; +EAL_REGISTER_TAILQ(callback_tailq) + +/* Invoke all registered mempool event callbacks. */ +static void +mempool_event_callback_invoke(enum rte_mempool_event event, + struct rte_mempool *mp); + #define CACHE_FLUSHTHRESH_MULTIPLIER 1.5 #define CALC_CACHE_FLUSHTHRESH(c) \ ((typeof(c))((c) * CACHE_FLUSHTHRESH_MULTIPLIER)) @@ -722,6 +734,7 @@ rte_mempool_free(struct rte_mempool *mp) } rte_mcfg_tailq_write_unlock(); + mempool_event_callback_invoke(RTE_MEMPOOL_EVENT_DESTROY, mp); rte_mempool_trace_free(mp); rte_mempool_free_memchunks(mp); rte_mempool_ops_free(mp); @@ -778,10 +791,10 @@ rte_mempool_cache_free(struct rte_mempool_cache *cache) } /* create an empty mempool */ -struct rte_mempool * -rte_mempool_create_empty(const char *name, unsigned n, unsigned elt_size, - unsigned cache_size, unsigned private_data_size, - int socket_id, unsigned flags) +static struct rte_mempool * +mempool_create_empty(const char *name, unsigned int n, + unsigned int elt_size, unsigned int cache_size, + unsigned int private_data_size, int socket_id, unsigned int flags) { char mz_name[RTE_MEMZONE_NAMESIZE]; struct rte_mempool_list *mempool_list; @@ -915,6 +928,19 @@ rte_mempool_create_empty(const char *name, unsigned n, unsigned elt_size, return NULL; } +struct rte_mempool * +rte_mempool_create_empty(const char *name, unsigned int n, + unsigned int elt_size, unsigned int cache_size, + unsigned int private_data_size, int socket_id, unsigned int flags) +{ + struct rte_mempool *mp; + + mp = mempool_create_empty(name, n, elt_size, cache_size, + private_data_size, socket_id, flags); + mempool_event_callback_invoke(RTE_MEMPOOL_EVENT_CREATE, mp); + return mp; +} + /* create the mempool */ struct rte_mempool * rte_mempool_create(const char *name, unsigned n, unsigned elt_size, @@ -926,7 +952,7 @@ rte_mempool_create(const char *name, unsigned n, unsigned elt_size, int ret; struct rte_mempool *mp; - mp = rte_mempool_create_empty(name, n, elt_size, cache_size, + mp = mempool_create_empty(name, n, elt_size, cache_size, private_data_size, socket_id, flags); if (mp == NULL) return NULL; @@ -958,6 +984,8 @@ rte_mempool_create(const char *name, unsigned n, unsigned elt_size, if (obj_init) rte_mempool_obj_iter(mp, obj_init, obj_init_arg); + mempool_event_callback_invoke(RTE_MEMPOOL_EVENT_CREATE, mp); + rte_mempool_trace_create(name, n, elt_size, cache_size, private_data_size, mp_init, mp_init_arg, obj_init, obj_init_arg, flags, mp); @@ -1343,3 +1371,118 @@ void rte_mempool_walk(void (*func)(struct rte_mempool *, void *), rte_mcfg_mempool_read_unlock(); } + +struct mempool_callback { + rte_mempool_event_callback *func; + void *arg; +}; + +static void +mempool_event_callback_invoke(enum rte_mempool_event event, + struct rte_mempool *mp) +{ + struct mempool_callback_list *list; + struct rte_tailq_entry *te; + void *tmp_te; + + rte_mcfg_tailq_read_lock(); + list = RTE_TAILQ_CAST(callback_tailq.head, mempool_callback_list); + TAILQ_FOREACH_SAFE(te, list, next, tmp_te) { + struct mempool_callback *cb = te->data; + rte_mcfg_tailq_read_unlock(); + cb->func(event, mp, cb->arg); + rte_mcfg_tailq_read_lock(); + } + rte_mcfg_tailq_read_unlock(); +} + +int +rte_mempool_event_callback_register(rte_mempool_event_callback *func, + void *arg) +{ + struct mempool_callback_list *list; + struct rte_tailq_entry *te = NULL; + struct mempool_callback *cb; + void *tmp_te; + int ret; + + rte_mcfg_mempool_read_lock(); + rte_mcfg_tailq_write_lock(); + + list = RTE_TAILQ_CAST(callback_tailq.head, mempool_callback_list); + TAILQ_FOREACH_SAFE(te, list, next, tmp_te) { + struct mempool_callback *cb = + (struct mempool_callback *)te->data; + if (cb->func == func && cb->arg == arg) { + ret = -EEXIST; + goto exit; + } + } + + te = rte_zmalloc("MEMPOOL_TAILQ_ENTRY", sizeof(*te), 0); + if (te == NULL) { + RTE_LOG(ERR, MEMPOOL, + "Cannot allocate event callback tailq entry!\n"); + ret = -ENOMEM; + goto exit; + } + + cb = rte_malloc("MEMPOOL_EVENT_CALLBACK", sizeof(*cb), 0); + if (cb == NULL) { + RTE_LOG(ERR, MEMPOOL, + "Cannot allocate event callback!\n"); + rte_free(te); + ret = -ENOMEM; + goto exit; + } + + cb->func = func; + cb->arg = arg; + te->data = cb; + TAILQ_INSERT_TAIL(list, te, next); + ret = 0; + +exit: + rte_mcfg_tailq_write_unlock(); + rte_mcfg_mempool_read_unlock(); + rte_errno = -ret; + return ret; +} + +int +rte_mempool_event_callback_unregister(rte_mempool_event_callback *func, + void *arg) +{ + struct mempool_callback_list *list; + struct rte_tailq_entry *te = NULL; + struct mempool_callback *cb; + int ret; + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) { + rte_errno = EPERM; + return -1; + } + + rte_mcfg_mempool_read_lock(); + rte_mcfg_tailq_write_lock(); + ret = -ENOENT; + list = RTE_TAILQ_CAST(callback_tailq.head, mempool_callback_list); + TAILQ_FOREACH(te, list, next) { + cb = (struct mempool_callback *)te->data; + if (cb->func == func && cb->arg == arg) + break; + } + if (te != NULL) { + TAILQ_REMOVE(list, te, next); + ret = 0; + } + rte_mcfg_tailq_write_unlock(); + rte_mcfg_mempool_read_unlock(); + + if (ret == 0) { + rte_free(te); + rte_free(cb); + } + rte_errno = -ret; + return ret; +} diff --git a/lib/mempool/rte_mempool.h b/lib/mempool/rte_mempool.h index 4235d6f0bf..1e9b8f0229 100644 --- a/lib/mempool/rte_mempool.h +++ b/lib/mempool/rte_mempool.h @@ -1775,6 +1775,62 @@ void rte_mempool_walk(void (*func)(struct rte_mempool *, void *arg), int rte_mempool_get_page_size(struct rte_mempool *mp, size_t *pg_sz); +/** + * Mempool event type. + * @internal + */ +enum rte_mempool_event { + /** Occurs after a successful mempool creation. */ + RTE_MEMPOOL_EVENT_CREATE = 0, + /** Occurs before destruction of a mempool begins. */ + RTE_MEMPOOL_EVENT_DESTROY = 1, +}; + +/** + * @internal + * Mempool event callback. + */ +typedef void (rte_mempool_event_callback)( + enum rte_mempool_event event, + struct rte_mempool *mp, + void *arg); + +/** + * @internal + * Register a callback invoked on mempool life cycle event. + * Callbacks will be invoked in the process that creates the mempool. + * + * @param cb + * Callback function. + * @param cb_arg + * User data. + * + * @return + * 0 on success, negative on failure and rte_errno is set. + */ +__rte_internal +int +rte_mempool_event_callback_register(rte_mempool_event_callback *cb, + void *cb_arg); + +/** + * @internal + * Unregister a callback added with rte_mempool_event_callback_register(). + * @p cb and @p arg must exactly match registration parameters. + * + * @param cb + * Callback function. + * @param cb_arg + * User data. + * + * @return + * 0 on success, negative on failure and rte_errno is set. + */ +__rte_internal +int +rte_mempool_event_callback_unregister(rte_mempool_event_callback *cb, + void *cb_arg); + #ifdef __cplusplus } #endif diff --git a/lib/mempool/version.map b/lib/mempool/version.map index 9f77da6fff..1b7d7c5456 100644 --- a/lib/mempool/version.map +++ b/lib/mempool/version.map @@ -64,3 +64,11 @@ EXPERIMENTAL { __rte_mempool_trace_ops_free; __rte_mempool_trace_set_ops_byname; }; + +INTERNAL { + global: + + # added in 21.11 + rte_mempool_event_callback_register; + rte_mempool_event_callback_unregister; +}; From patchwork Wed Aug 18 09:07:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Kozlyuk X-Patchwork-Id: 97040 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EC596A0C47; Wed, 18 Aug 2021 11:08:47 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D43E7411EA; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid01.nvidia.com; CAT:NONE; SFS:(4636009)(396003)(376002)(136003)(39860400002)(346002)(36840700001)(46966006)(36756003)(316002)(5660300002)(82740400003)(36860700001)(1076003)(26005)(86362001)(16526019)(186003)(2616005)(8676002)(478600001)(47076005)(54906003)(70586007)(8936002)(55016002)(2906002)(7696005)(336012)(426003)(6666004)(70206006)(356005)(6916009)(6286002)(4326008)(7636003)(82310400003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2021 09:08:19.5879 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d91fad1d-c827-4f56-3801-08d96227b91e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.32]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT036.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3281 Subject: [dpdk-dev] [PATCH 2/4] mempool: add non-IO flag X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Mempool is a generic allocator that is not necessarily used for device IO operations and its memory for DMA. Add MEMPOOL_F_NON_IO flag to mark such mempools. Signed-off-by: Dmitry Kozlyuk Acked-by: Matan Azrad --- doc/guides/rel_notes/release_21_11.rst | 3 +++ lib/mempool/rte_mempool.h | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst index d707a554ef..dc9b98b862 100644 --- a/doc/guides/rel_notes/release_21_11.rst +++ b/doc/guides/rel_notes/release_21_11.rst @@ -84,6 +84,9 @@ API Changes Also, make sure to start the actual text at the margin. ======================================================= +* mempool: Added ``MEMPOOL_F_NON_IO`` flag to give a hint to DPDK components + that objects from this pool will not be used for device IO (e.g. DMA). + ABI Changes ----------- diff --git a/lib/mempool/rte_mempool.h b/lib/mempool/rte_mempool.h index 1e9b8f0229..7f0657ab16 100644 --- a/lib/mempool/rte_mempool.h +++ b/lib/mempool/rte_mempool.h @@ -263,6 +263,7 @@ struct rte_mempool { #define MEMPOOL_F_SC_GET 0x0008 /**< Default get is "single-consumer".*/ #define MEMPOOL_F_POOL_CREATED 0x0010 /**< Internal: pool is created. */ #define MEMPOOL_F_NO_IOVA_CONTIG 0x0020 /**< Don't need IOVA contiguous objs. */ +#define MEMPOOL_F_NON_IO 0x0040 /**< Not used for device IO (DMA). */ /** * @internal When debug is enabled, store some statistics. @@ -992,6 +993,9 @@ typedef void (rte_mempool_ctor_t)(struct rte_mempool *, void *); * "single-consumer". Otherwise, it is "multi-consumers". * - MEMPOOL_F_NO_IOVA_CONTIG: If set, allocated objects won't * necessarily be contiguous in IO memory. + * - MEMPOOL_F_NO_IO: If set, the mempool is considered to be + * never used for device IO, i.e. DMA operations, + * which may affect some PMD behavior. * @return * The pointer to the new allocated mempool, on success. NULL on error * with rte_errno set appropriately. Possible rte_errno values include: From patchwork Wed Aug 18 09:07:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Kozlyuk X-Patchwork-Id: 97038 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8DB87A0C47; Wed, 18 Aug 2021 11:08:33 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1782B411D3; Wed, 18 Aug 2021 11:08:25 +0200 (CEST) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2042.outbound.protection.outlook.com [40.107.94.42]) by mails.dpdk.org (Postfix) with ESMTP id 48A4C411CE for ; Wed, 18 Aug 2021 11:08:23 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=amI/o4t7m7xlXBXRGYcFNe/m3gsVRME4CjicLKcDpVVizPWfGeQr2Ls6ciBQ38BLLF9wpdo8sreT27f32NMmwhOYIelLfI8AkSEeKF3CkhqYChRxp8/9PReWj/w7gQZFsEdSPioMtSSWRJq6W0yvmm9nwfPrkTpkwKMRGZVZYpAIO5CTCIQFjxufBmCO3B06d/tQBPEtmq3/xA3NvnkznIOIybltmjqVXQ2yo9jyZt0reiQ405pVUey9CCg/A1g0SNy5k73dEN9bWzw0nucqnKQoqnJ7uMNo3IL6BWi1WmKIUqMiHc1je6lfqlUMy/m8yO2k6m2iIJNyvLGM5Wvi+g== ARC-Message-Signature: i=1; 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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT035.mail.protection.outlook.com (10.13.172.100) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4415.16 via Frontend Transport; Wed, 18 Aug 2021 09:08:21 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 18 Aug 2021 09:08:20 +0000 Received: from nvidia.com (172.20.187.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 18 Aug 2021 09:08:18 +0000 From: Dmitry Kozlyuk To: CC: Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko , Ray Kinsella , Anatoly Burakov Date: Wed, 18 Aug 2021 12:07:54 +0300 Message-ID: <20210818090755.2419483-4-dkozlyuk@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210818090755.2419483-1-dkozlyuk@nvidia.com> References: <20210818090755.2419483-1-dkozlyuk@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: dae57321-08e8-4a56-ceec-08d96227b9fc X-MS-TrafficTypeDiagnostic: DM5PR12MB1450: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:34; 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CAT:NONE; SFS:(4636009)(39860400002)(136003)(376002)(346002)(396003)(46966006)(36840700001)(1076003)(55016002)(36906005)(36860700001)(86362001)(82310400003)(7696005)(82740400003)(356005)(5660300002)(30864003)(7636003)(83380400001)(2906002)(26005)(426003)(2616005)(47076005)(186003)(6286002)(6916009)(8936002)(70206006)(54906003)(6666004)(316002)(8676002)(4326008)(478600001)(36756003)(16526019)(70586007)(336012); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2021 09:08:21.1486 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dae57321-08e8-4a56-ceec-08d96227b9fc X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT035.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1450 Subject: [dpdk-dev] [PATCH 3/4] common/mlx5: add mempool registration facilities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add internal API to register mempools, that is, to create memory regions (MR) for their memory and store them in a separate database. Implementation deals with multi-process, so that class drivers don't need to. Each protection domain has its own database. Memory regions can be shared within a database if they represent a single hugepage covering one or more mempools entirely. Add internal API to lookup an MR key for an address that belongs to a known mempool. It is a responsibility of a class driver to extract the mempool from an mbuf. Signed-off-by: Dmitry Kozlyuk Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_common_mp.c | 50 +++ drivers/common/mlx5/mlx5_common_mp.h | 14 + drivers/common/mlx5/mlx5_common_mr.c | 564 +++++++++++++++++++++++++++ drivers/common/mlx5/mlx5_common_mr.h | 17 + drivers/common/mlx5/version.map | 5 + 5 files changed, 650 insertions(+) diff --git a/drivers/common/mlx5/mlx5_common_mp.c b/drivers/common/mlx5/mlx5_common_mp.c index 673a7c31de..6dfc5535e0 100644 --- a/drivers/common/mlx5/mlx5_common_mp.c +++ b/drivers/common/mlx5/mlx5_common_mp.c @@ -54,6 +54,56 @@ mlx5_mp_req_mr_create(struct mlx5_mp_id *mp_id, uintptr_t addr) return ret; } +/** + * @param mp_id + * ID of the MP process. + * @param share_cache + * Shared MR cache. + * @param pd + * Protection domain. + * @param mempool + * Mempool to register or unregister. + * @param reg + * True to register the mempool, False to unregister. + */ +int +mlx5_mp_req_mempool_reg(struct mlx5_mp_id *mp_id, + struct mlx5_mr_share_cache *share_cache, void *pd, + struct rte_mempool *mempool, bool reg) +{ + struct rte_mp_msg mp_req; + struct rte_mp_msg *mp_res; + struct rte_mp_reply mp_rep; + struct mlx5_mp_param *req = (struct mlx5_mp_param *)mp_req.param; + struct mlx5_mp_arg_mempool_reg *arg = &req->args.mempool_reg; + struct mlx5_mp_param *res; + struct timespec ts = {.tv_sec = MLX5_MP_REQ_TIMEOUT_SEC, .tv_nsec = 0}; + enum mlx5_mp_req_type type; + int ret; + + MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY); + type = reg ? MLX5_MP_REQ_MEMPOOL_REGISTER : + MLX5_MP_REQ_MEMPOOL_UNREGISTER; + mp_init_msg(mp_id, &mp_req, type); + arg->share_cache = share_cache; + arg->pd = pd; + arg->mempool = mempool; + ret = rte_mp_request_sync(&mp_req, &mp_rep, &ts); + if (ret) { + DRV_LOG(ERR, "port %u request to primary process failed", + mp_id->port_id); + return -rte_errno; + } + MLX5_ASSERT(mp_rep.nb_received == 1); + mp_res = &mp_rep.msgs[0]; + res = (struct mlx5_mp_param *)mp_res->param; + ret = res->result; + if (ret) + rte_errno = -ret; + mlx5_free(mp_rep.msgs); + return ret; +} + /** * Request Verbs queue state modification to the primary process. * diff --git a/drivers/common/mlx5/mlx5_common_mp.h b/drivers/common/mlx5/mlx5_common_mp.h index 6829141fc7..527bf3cad8 100644 --- a/drivers/common/mlx5/mlx5_common_mp.h +++ b/drivers/common/mlx5/mlx5_common_mp.h @@ -14,6 +14,8 @@ enum mlx5_mp_req_type { MLX5_MP_REQ_VERBS_CMD_FD = 1, MLX5_MP_REQ_CREATE_MR, + MLX5_MP_REQ_MEMPOOL_REGISTER, + MLX5_MP_REQ_MEMPOOL_UNREGISTER, MLX5_MP_REQ_START_RXTX, MLX5_MP_REQ_STOP_RXTX, MLX5_MP_REQ_QUEUE_STATE_MODIFY, @@ -33,6 +35,12 @@ struct mlx5_mp_arg_queue_id { uint16_t queue_id; /* DPDK queue ID. */ }; +struct mlx5_mp_arg_mempool_reg { + struct mlx5_mr_share_cache *share_cache; + void *pd; /* NULL for MLX5_MP_REQ_MEMPOOL_UNREGISTER */ + struct rte_mempool *mempool; +}; + /* Pameters for IPC. */ struct mlx5_mp_param { enum mlx5_mp_req_type type; @@ -41,6 +49,8 @@ struct mlx5_mp_param { RTE_STD_C11 union { uintptr_t addr; /* MLX5_MP_REQ_CREATE_MR */ + struct mlx5_mp_arg_mempool_reg mempool_reg; + /* MLX5_MP_REQ_MEMPOOL_(UN)REGISTER */ struct mlx5_mp_arg_queue_state_modify state_modify; /* MLX5_MP_REQ_QUEUE_STATE_MODIFY */ struct mlx5_mp_arg_queue_id queue_id; @@ -91,6 +101,10 @@ void mlx5_mp_uninit_secondary(const char *name); __rte_internal int mlx5_mp_req_mr_create(struct mlx5_mp_id *mp_id, uintptr_t addr); __rte_internal +int mlx5_mp_req_mempool_reg(struct mlx5_mp_id *mp_id, + struct mlx5_mr_share_cache *share_cache, void *pd, + struct rte_mempool *mempool, bool reg); +__rte_internal int mlx5_mp_req_queue_state_modify(struct mlx5_mp_id *mp_id, struct mlx5_mp_arg_queue_state_modify *sm); __rte_internal diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c index 98fe8698e2..21a83d6e1b 100644 --- a/drivers/common/mlx5/mlx5_common_mr.c +++ b/drivers/common/mlx5/mlx5_common_mr.c @@ -2,7 +2,10 @@ * Copyright 2016 6WIND S.A. * Copyright 2020 Mellanox Technologies, Ltd */ +#include + #include +#include #include #include #include @@ -21,6 +24,29 @@ struct mr_find_contig_memsegs_data { const struct rte_memseg_list *msl; }; +/* Virtual memory range. */ +struct mlx5_range { + uintptr_t start; + uintptr_t end; +}; + +/** Memory region for a mempool. */ +struct mlx5_mempool_mr { + struct mlx5_pmd_mr pmd_mr; + uint32_t refcnt; /**< Number of mempools sharing this MR. */ +}; + +/* Mempool registration. */ +struct mlx5_mempool_reg { + LIST_ENTRY(mlx5_mempool_reg) next; + /** Registered mempool, used to designate registrations. */ + struct rte_mempool *mp; + /** Memory regions for the address ranges of the mempool. */ + struct mlx5_mempool_mr *mrs; + /** Number of memory regions. */ + unsigned int mrs_n; +}; + /** * Expand B-tree table to a given size. Can't be called with holding * memory_hotplug_lock or share_cache.rwlock due to rte_realloc(). @@ -1191,3 +1217,541 @@ mlx5_mr_dump_cache(struct mlx5_mr_share_cache *share_cache __rte_unused) rte_rwlock_read_unlock(&share_cache->rwlock); #endif } + +static int +mlx5_range_compare_start(const void *lhs, const void *rhs) +{ + const struct mlx5_range *r1 = lhs, *r2 = rhs; + + if (r1->start > r2->start) + return 1; + else if (r1->start < r2->start) + return -1; + return 0; +} + +static void +mlx5_range_from_mempool_chunk(struct rte_mempool *mp, void *opaque, + struct rte_mempool_memhdr *memhdr, + unsigned int idx) +{ + struct mlx5_range *ranges = opaque, *range = &ranges[idx]; + uint64_t page_size = rte_mem_page_size(); + + RTE_SET_USED(mp); + range->start = RTE_ALIGN_FLOOR((uintptr_t)memhdr->addr, page_size); + range->end = RTE_ALIGN_CEIL(range->start + memhdr->len, page_size); +} + +/** + * Get VA-contiguous ranges of the mempool memory. + * Each range start and end is aligned to the system page size. + * + * @param[in] mp + * Analyzed mempool. + * @param[out] out + * Receives the ranges, caller must release it with free(). + * @param[out] ount_n + * Receives the number of @p out elements. + * + * @return + * 0 on success, (-1) on failure. + */ +static int +mlx5_get_mempool_ranges(struct rte_mempool *mp, struct mlx5_range **out, + unsigned int *out_n) +{ + struct mlx5_range *chunks; + unsigned int chunks_n = mp->nb_mem_chunks, contig_n, i; + + /* Collect page-aligned memory ranges of the mempool. */ + chunks = calloc(sizeof(chunks[0]), chunks_n); + if (chunks == NULL) + return -1; + rte_mempool_mem_iter(mp, mlx5_range_from_mempool_chunk, chunks); + /* Merge adjacent chunks and place them at the beginning. */ + qsort(chunks, chunks_n, sizeof(chunks[0]), mlx5_range_compare_start); + contig_n = 1; + for (i = 1; i < chunks_n; i++) + if (chunks[i - 1].end != chunks[i].start) { + chunks[contig_n - 1].end = chunks[i - 1].end; + chunks[contig_n] = chunks[i]; + contig_n++; + } + /* Extend the last contiguous chunk to the end of the mempool. */ + chunks[contig_n - 1].end = chunks[i - 1].end; + *out = chunks; + *out_n = contig_n; + return 0; +} + +/** + * Analyze mempool memory to select memory ranges to register. + * + * @param[in] mp + * Mempool to analyze. + * @param[out] out + * Receives memory ranges to register, aligned to the system page size. + * The caller must release them with free(). + * @param[out] out_n + * Receives the number of @p out items. + * @param[out] share_hugepage + * Receives True if the entire pool resides within a single hugepage. + * + * @return + * 0 on success, (-1) on failure. + */ +static int +mlx5_mempool_reg_analyze(struct rte_mempool *mp, struct mlx5_range **out, + unsigned int *out_n, bool *share_hugepage) +{ + struct mlx5_range *ranges = NULL; + unsigned int i, ranges_n = 0; + struct rte_memseg_list *msl; + + if (mlx5_get_mempool_ranges(mp, &ranges, &ranges_n) < 0) { + DRV_LOG(ERR, "Cannot get address ranges for mempool %s", + mp->name); + return -1; + } + /* Check if the hugepage of the pool can be shared. */ + *share_hugepage = false; + msl = rte_mem_virt2memseg_list((void *)ranges[0].start); + if (msl != NULL) { + uint64_t hugepage_sz = 0; + + /* Check that all ranges are on pages of the same size. */ + for (i = 0; i < ranges_n; i++) { + if (hugepage_sz != 0 && hugepage_sz != msl->page_sz) + break; + hugepage_sz = msl->page_sz; + } + if (i == ranges_n) { + /* + * If the entire pool is within one hugepage, + * combine all ranges into one of the hugepage size. + */ + uintptr_t reg_start = ranges[0].start; + uintptr_t reg_end = ranges[ranges_n - 1].end; + uintptr_t hugepage_start = + RTE_ALIGN_FLOOR(reg_start, hugepage_sz); + uintptr_t hugepage_end = hugepage_start + hugepage_sz; + if (reg_end < hugepage_end) { + ranges[0].start = hugepage_start; + ranges[0].end = hugepage_end; + ranges_n = 1; + *share_hugepage = true; + } + } + } + *out = ranges; + *out_n = ranges_n; + return 0; +} + +/** Create a registration object for the mempool. */ +static struct mlx5_mempool_reg * +mlx5_mempool_reg_create(struct rte_mempool *mp, unsigned int mrs_n) +{ + struct mlx5_mempool_reg *mpr = NULL; + + mpr = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, + sizeof(*mpr) + mrs_n * sizeof(mpr->mrs[0]), + RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); + if (mpr == NULL) { + DRV_LOG(ERR, "Cannot allocate mempool %s registration object", + mp->name); + return NULL; + } + mpr->mp = mp; + mpr->mrs = (struct mlx5_mempool_mr *)(mpr + 1); + mpr->mrs_n = mrs_n; + return mpr; +} + +/** + * Destroy a mempool registration object. + * + * @param standalone + * Whether @p mpr owns its MRs excludively, i.e. they are not shared. + */ +static void +mlx5_mempool_reg_destroy(struct mlx5_mr_share_cache *share_cache, + struct mlx5_mempool_reg *mpr, bool standalone) +{ + if (standalone) { + unsigned int i; + + for (i = 0; i < mpr->mrs_n; i++) + share_cache->dereg_mr_cb(&mpr->mrs[i].pmd_mr); + } + mlx5_free(mpr); +} + +/** Find registration object of a mempool. */ +static struct mlx5_mempool_reg * +mlx5_mempool_reg_lookup(struct mlx5_mr_share_cache *share_cache, + struct rte_mempool *mp) +{ + struct mlx5_mempool_reg *mpr; + + LIST_FOREACH(mpr, &share_cache->mempool_reg_list, next) + if (mpr->mp == mp) + break; + return mpr; +} + +/** Increment reference counters of MRs used in the registration. */ +static void +mlx5_mempool_reg_attach(struct mlx5_mempool_reg *mpr) +{ + unsigned int i; + + for (i = 0; i < mpr->mrs_n; i++) + __atomic_add_fetch(&mpr->mrs[i].refcnt, 1, __ATOMIC_RELAXED); +} + +/** + * Decrement reference counters of MRs used in the registration. + * + * @return True if no more references to @p mpr MRs exist, False otherwise. + */ +static bool +mlx5_mempool_reg_detach(struct mlx5_mempool_reg *mpr) +{ + unsigned int i; + bool ret = false; + + for (i = 0; i < mpr->mrs_n; i++) + ret |= __atomic_sub_fetch(&mpr->mrs[i].refcnt, 1, + __ATOMIC_RELAXED) == 0; + return ret; +} + +static int +mlx5_mr_mempool_register_primary(struct mlx5_mr_share_cache *share_cache, + void *pd, struct rte_mempool *mp) +{ + struct mlx5_range *ranges = NULL; + struct mlx5_mempool_reg *mpr, *new_mpr; + unsigned int i, ranges_n; + bool share_hugepage; + int ret = -1; + + if (mlx5_mempool_reg_analyze(mp, &ranges, &ranges_n, + &share_hugepage) < 0) { + DRV_LOG(ERR, "Cannot get mempool %s memory ranges", mp->name); + rte_errno = ENOMEM; + goto exit; + } + new_mpr = mlx5_mempool_reg_create(mp, ranges_n); + if (new_mpr == NULL) { + DRV_LOG(ERR, + "Cannot create a registration object for mempool %s in PD %p", + mp->name, pd); + rte_errno = ENOMEM; + goto exit; + } + /* + * If the entire mempool fits in a single hugepage, the MR for this + * hugepage can be shared across mempools that also fit in it. + */ + if (share_hugepage) { + rte_rwlock_write_lock(&share_cache->rwlock); + LIST_FOREACH(mpr, &share_cache->mempool_reg_list, next) { + if (mpr->mrs[0].pmd_mr.addr == (void *)ranges[0].start) + break; + } + if (mpr != NULL) { + new_mpr->mrs = mpr->mrs; + mlx5_mempool_reg_attach(new_mpr); + LIST_INSERT_HEAD(&share_cache->mempool_reg_list, + new_mpr, next); + } + rte_rwlock_write_unlock(&share_cache->rwlock); + if (mpr != NULL) { + DRV_LOG(DEBUG, "Shared MR %#x in PD %p for mempool %s with mempool %s", + mpr->mrs[0].pmd_mr.lkey, pd, mp->name, + mpr->mp->name); + ret = 0; + goto exit; + } + } + for (i = 0; i < ranges_n; i++) { + struct mlx5_mempool_mr *mr = &new_mpr->mrs[i]; + const struct mlx5_range *range = &ranges[i]; + size_t len = range->end - range->start; + + if (share_cache->reg_mr_cb(pd, (void *)range->start, len, + &mr->pmd_mr) < 0) { + DRV_LOG(ERR, + "Failed to create an MR in PD %p for address range " + "[0x%" PRIxPTR ", 0x%" PRIxPTR "] (%zu bytes) for mempool %s", + pd, range->start, range->end, len, mp->name); + break; + } + DRV_LOG(DEBUG, + "Created a new MR %#x in PD %p for address range " + "[0x%" PRIxPTR ", 0x%" PRIxPTR "] (%zu bytes) for mempool %s", + mr->pmd_mr.lkey, pd, range->start, range->end, len, + mp->name); + } + if (i != ranges_n) { + mlx5_mempool_reg_destroy(share_cache, new_mpr, true); + rte_errno = EINVAL; + goto exit; + } + /* Concurrent registration is not supposed to happen. */ + rte_rwlock_write_lock(&share_cache->rwlock); + mpr = mlx5_mempool_reg_lookup(share_cache, mp); + if (mpr == NULL) { + mlx5_mempool_reg_attach(new_mpr); + LIST_INSERT_HEAD(&share_cache->mempool_reg_list, + new_mpr, next); + ret = 0; + } + rte_rwlock_write_unlock(&share_cache->rwlock); + if (mpr != NULL) { + DRV_LOG(ERR, "Mempool %s is already registered for PD %p", + mp->name, pd); + mlx5_mempool_reg_destroy(share_cache, new_mpr, true); + rte_errno = EEXIST; + goto exit; + } +exit: + free(ranges); + return ret; +} + +static int +mlx5_mr_mempool_register_secondary(struct mlx5_mr_share_cache *share_cache, + void *pd, struct rte_mempool *mp, + struct mlx5_mp_id *mp_id) +{ + if (mp_id == NULL) { + rte_errno = EINVAL; + return -1; + } + return mlx5_mp_req_mempool_reg(mp_id, share_cache, pd, mp, true); +} + +/** + * Register the memory of a mempool in the protection domain. + * + * @param share_cache + * Shared MR cache of the protection domain. + * @param pd + * Protection domain object. + * @param mp + * Mempool to register. + * @param mp_id + * Multi-process identifier, may be NULL for the primary process. + * + * @return + * 0 on success, (-1) on failure and rte_errno is set. + */ +int +mlx5_mr_mempool_register(struct mlx5_mr_share_cache *share_cache, void *pd, + struct rte_mempool *mp, struct mlx5_mp_id *mp_id) +{ + if (mp->flags & MEMPOOL_F_NON_IO) + return 0; + switch (rte_eal_process_type()) { + case RTE_PROC_PRIMARY: + return mlx5_mr_mempool_register_primary(share_cache, pd, mp); + case RTE_PROC_SECONDARY: + return mlx5_mr_mempool_register_secondary(share_cache, pd, mp, + mp_id); + default: + return -1; + } +} + +static int +mlx5_mr_mempool_unregister_primary(struct mlx5_mr_share_cache *share_cache, + struct rte_mempool *mp) +{ + struct mlx5_mempool_reg *mpr; + bool standalone = false; + + rte_rwlock_write_lock(&share_cache->rwlock); + LIST_FOREACH(mpr, &share_cache->mempool_reg_list, next) + if (mpr->mp == mp) { + standalone = mlx5_mempool_reg_detach(mpr); + LIST_REMOVE(mpr, next); + break; + } + rte_rwlock_write_unlock(&share_cache->rwlock); + if (mpr == NULL) { + rte_errno = ENOENT; + return -1; + } + mlx5_mempool_reg_destroy(share_cache, mpr, standalone); + return 0; +} + +static int +mlx5_mr_mempool_unregister_secondary(struct mlx5_mr_share_cache *share_cache, + struct rte_mempool *mp, + struct mlx5_mp_id *mp_id) +{ + if (mp_id == NULL) { + rte_errno = EINVAL; + return -1; + } + return mlx5_mp_req_mempool_reg(mp_id, share_cache, NULL, mp, false); +} + +/** + * Unregister the memory of a mempool from the protection domain. + * + * @param share_cache + * Shared MR cache of the protection domain. + * @param mp + * Mempool to unregister. + * @param mp_id + * Multi-process identifier, may be NULL for the primary process. + * + * @return + * 0 on success, (-1) on failure and rte_errno is set. + */ +int +mlx5_mr_mempool_unregister(struct mlx5_mr_share_cache *share_cache, + struct rte_mempool *mp, struct mlx5_mp_id *mp_id) +{ + if (mp->flags & MEMPOOL_F_NON_IO) + return 0; + switch (rte_eal_process_type()) { + case RTE_PROC_PRIMARY: + return mlx5_mr_mempool_unregister_primary(share_cache, mp); + case RTE_PROC_SECONDARY: + return mlx5_mr_mempool_unregister_secondary(share_cache, mp, + mp_id); + default: + return -1; + } +} + +/** + * Lookup a MR key by and address in a registered mempool. + * + * @param mpr + * Mempool registration object. + * @param addr + * Address within the mempool. + * @param entry + * Bottom-half cache entry to fill. + * + * @return + * MR key or UINT32_MAX on failure, which can only happen + * if the address is not from within the mempool. + */ +static uint32_t +mlx5_mempool_reg_addr2mr(struct mlx5_mempool_reg *mpr, uintptr_t addr, + struct mr_cache_entry *entry) +{ + uint32_t lkey = UINT32_MAX; + unsigned int i; + + for (i = 0; i < mpr->mrs_n; i++) { + const struct mlx5_pmd_mr *mr = &mpr->mrs[i].pmd_mr; + uintptr_t mr_addr = (uintptr_t)mr->addr; + + if (mr_addr <= addr) { + lkey = rte_cpu_to_be_32(mr->lkey); + entry->start = mr_addr; + entry->end = mr_addr + mr->len; + entry->lkey = lkey; + break; + } + } + return lkey; +} + +/** + * Update bottom-half cache from the list of mempool registrations. + * + * @param share_cache + * Pointer to a global shared MR cache. + * @param mr_ctrl + * Per-queue MR control handle. + * @param entry + * Pointer to an entry in the bottom-half cache to update + * with the MR lkey looked up. + * @param mp + * Mempool containing the address. + * @param addr + * Address to lookup. + * @return + * MR lkey on success, UINT32_MAX on failure. + */ +static uint32_t +mlx5_lookup_mempool_regs(struct mlx5_mr_share_cache *share_cache, + struct mlx5_mr_ctrl *mr_ctrl, + struct mr_cache_entry *entry, + struct rte_mempool *mp, uintptr_t addr) +{ + struct mlx5_mr_btree *bt = &mr_ctrl->cache_bh; + struct mlx5_mempool_reg *mpr; + uint32_t lkey = UINT32_MAX; + + /* If local cache table is full, try to double it. */ + if (unlikely(bt->len == bt->size)) + mr_btree_expand(bt, bt->size << 1); + /* Look up in mempool registrations. */ + rte_rwlock_read_lock(&share_cache->rwlock); + mpr = mlx5_mempool_reg_lookup(share_cache, mp); + if (mpr != NULL) + lkey = mlx5_mempool_reg_addr2mr(mpr, addr, entry); + rte_rwlock_read_unlock(&share_cache->rwlock); + /* + * Update local cache. Even if it fails, return the found entry + * to update top-half cache. Next time, this entry will be found + * in the global cache. + */ + if (lkey != UINT32_MAX) + mr_btree_insert(bt, entry); + return lkey; +} + +/** + * Bottom-half lookup for the address from the mempool. + * + * @param share_cache + * Pointer to a global shared MR cache. + * @param mr_ctrl + * Per-queue MR control handle. + * @param mp + * Mempool containing the address. + * @param addr + * Address to lookup. + * @return + * MR lkey on success, UINT32_MAX on failure. + */ +uint32_t +mlx5_mr_mempool2mr_bh(struct mlx5_mr_share_cache *share_cache, + struct mlx5_mr_ctrl *mr_ctrl, + struct rte_mempool *mp, uintptr_t addr) +{ + struct mr_cache_entry *repl = &mr_ctrl->cache[mr_ctrl->head]; + uint32_t lkey; + uint16_t bh_idx = 0; + + /* Binary-search MR translation table. */ + lkey = mr_btree_lookup(&mr_ctrl->cache_bh, &bh_idx, addr); + /* Update top-half cache. */ + if (likely(lkey != UINT32_MAX)) { + *repl = (*mr_ctrl->cache_bh.table)[bh_idx]; + } else { + lkey = mlx5_lookup_mempool_regs(share_cache, mr_ctrl, repl, + mp, addr); + /* Can only fail if the address is not from the mempool. */ + if (unlikely(lkey == UINT32_MAX)) + return UINT32_MAX; + } + /* Update the most recently used entry. */ + mr_ctrl->mru = mr_ctrl->head; + /* Point to the next victim, the oldest. */ + mr_ctrl->head = (mr_ctrl->head + 1) % MLX5_MR_CACHE_N; + return lkey; +} diff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h index 6e465a05e9..685ac98e08 100644 --- a/drivers/common/mlx5/mlx5_common_mr.h +++ b/drivers/common/mlx5/mlx5_common_mr.h @@ -13,6 +13,7 @@ #include #include +#include #include #include "mlx5_glue.h" @@ -75,6 +76,7 @@ struct mlx5_mr_ctrl { } __rte_packed; LIST_HEAD(mlx5_mr_list, mlx5_mr); +LIST_HEAD(mlx5_mempool_reg_list, mlx5_mempool_reg); /* Global per-device MR cache. */ struct mlx5_mr_share_cache { @@ -83,6 +85,7 @@ struct mlx5_mr_share_cache { struct mlx5_mr_btree cache; /* Global MR cache table. */ struct mlx5_mr_list mr_list; /* Registered MR list. */ struct mlx5_mr_list mr_free_list; /* Freed MR list. */ + struct mlx5_mempool_reg_list mempool_reg_list; /* Mempool database. */ mlx5_reg_mr_t reg_mr_cb; /* Callback to reg_mr func */ mlx5_dereg_mr_t dereg_mr_cb; /* Callback to dereg_mr func */ } __rte_packed; @@ -136,6 +139,10 @@ uint32_t mlx5_mr_addr2mr_bh(void *pd, struct mlx5_mp_id *mp_id, struct mlx5_mr_ctrl *mr_ctrl, uintptr_t addr, unsigned int mr_ext_memseg_en); __rte_internal +uint32_t mlx5_mr_mempool2mr_bh(struct mlx5_mr_share_cache *share_cache, + struct mlx5_mr_ctrl *mr_ctrl, + struct rte_mempool *mp, uintptr_t addr); +__rte_internal void mlx5_mr_release_cache(struct mlx5_mr_share_cache *mr_cache); __rte_internal void mlx5_mr_dump_cache(struct mlx5_mr_share_cache *share_cache __rte_unused); @@ -179,4 +186,14 @@ mlx5_common_verbs_dereg_mr(struct mlx5_pmd_mr *pmd_mr); __rte_internal void mlx5_mr_free(struct mlx5_mr *mr, mlx5_dereg_mr_t dereg_mr_cb); + +__rte_internal +int +mlx5_mr_mempool_register(struct mlx5_mr_share_cache *share_cache, void *pd, + struct rte_mempool *mp, struct mlx5_mp_id *mp_id); +__rte_internal +int +mlx5_mr_mempool_unregister(struct mlx5_mr_share_cache *share_cache, + struct rte_mempool *mp, struct mlx5_mp_id *mp_id); + #endif /* RTE_PMD_MLX5_COMMON_MR_H_ */ diff --git a/drivers/common/mlx5/version.map b/drivers/common/mlx5/version.map index e5cb6b7060..d5e9635a14 100644 --- a/drivers/common/mlx5/version.map +++ b/drivers/common/mlx5/version.map @@ -149,4 +149,9 @@ INTERNAL { mlx5_realloc; mlx5_translate_port_name; # WINDOWS_NO_EXPORT + + mlx5_mr_mempool_register; + mlx5_mr_mempool_unregister; + mlx5_mp_req_mempool_reg; + mlx5_mr_mempool2mr_bh; }; From patchwork Wed Aug 18 09:07:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Kozlyuk X-Patchwork-Id: 97039 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8B7D6A0C47; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2021 09:08:22.9816 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f2459000-9623-4e38-8431-08d96227bb12 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.36]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT014.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3512 Subject: [dpdk-dev] [PATCH 4/4] net/mlx5: support mempool registration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When the first port in a given protection domain (PD) starts, install a mempool event callback for this PD and register all existing memory regions (MR) for it. When the last port in a PD closes, remove the callback and unregister all mempools for this PD. On TX slow path, i.e. when an MR key for the address of the buffer to send is not in the local cache, first try to retrieve it from the database of registered mempools. Supported are direct and indirect mbufs, as well as externally-attached ones from MLX5 MPRQ feature. Lookup in the database of non-mempool memory is used as the last resort. Signed-off-by: Dmitry Kozlyuk Acked-by: Matan Azrad --- doc/guides/nics/mlx5.rst | 11 +++ doc/guides/rel_notes/release_21_11.rst | 6 ++ drivers/net/mlx5/linux/mlx5_mp_os.c | 44 +++++++++ drivers/net/mlx5/linux/mlx5_os.c | 4 +- drivers/net/mlx5/linux/mlx5_os.h | 2 + drivers/net/mlx5/mlx5.c | 128 +++++++++++++++++++++++++ drivers/net/mlx5/mlx5.h | 13 +++ drivers/net/mlx5/mlx5_mr.c | 27 ++++++ drivers/net/mlx5/mlx5_trigger.c | 10 +- 9 files changed, 241 insertions(+), 4 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index bae73f42d8..58d1c5b65c 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -1001,6 +1001,17 @@ Driver options Enabled by default. +- ``mr_mempool_reg_en`` parameter [int] + + A nonzero value enables implicit registration of DMA memory of all mempools + except those having ``MEMPOOL_F_NON_IO``. The effect is that when a packet + from a mempool is transmitted, its memory is already registered for DMA + in the PMD and no registration will happen on the data path. The tradeoff is + extra work on the creation of each mempool and increased HW resource use + if some mempools are not used with MLX5 devices. + + Enabled by default. + - ``representor`` parameter [list] This parameter can be used to instantiate DPDK Ethernet devices from diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst index dc9b98b862..0a2f80aa1b 100644 --- a/doc/guides/rel_notes/release_21_11.rst +++ b/doc/guides/rel_notes/release_21_11.rst @@ -55,6 +55,12 @@ New Features Also, make sure to start the actual text at the margin. ======================================================= +* **Updated Mellanox mlx5 driver.** + + Updated the Mellanox mlx5 driver with new features and improvements, including: + + * Added implicit mempool registration to avoid data path hiccups (opt-out). + Removed Items ------------- diff --git a/drivers/net/mlx5/linux/mlx5_mp_os.c b/drivers/net/mlx5/linux/mlx5_mp_os.c index 3a4aa766f8..d2ac375a47 100644 --- a/drivers/net/mlx5/linux/mlx5_mp_os.c +++ b/drivers/net/mlx5/linux/mlx5_mp_os.c @@ -20,6 +20,45 @@ #include "mlx5_tx.h" #include "mlx5_utils.h" +/** + * Handle a port-agnostic message. + * + * @return + * 0 on success, 1 when message is not port-agnostic, (-1) on error. + */ +static int +mlx5_mp_os_handle_port_agnostic(const struct rte_mp_msg *mp_msg, + const void *peer) +{ + struct rte_mp_msg mp_res; + struct mlx5_mp_param *res = (struct mlx5_mp_param *)mp_res.param; + const struct mlx5_mp_param *param = + (const struct mlx5_mp_param *)mp_msg->param; + const struct mlx5_mp_arg_mempool_reg *mpr; + struct mlx5_mp_id mp_id; + + switch (param->type) { + case MLX5_MP_REQ_MEMPOOL_REGISTER: + mlx5_mp_id_init(&mp_id, param->port_id); + mp_init_msg(&mp_id, &mp_res, param->type); + mpr = ¶m->args.mempool_reg; + res->result = mlx5_mr_mempool_register(mpr->share_cache, + mpr->pd, mpr->mempool, + NULL); + return rte_mp_reply(&mp_res, peer); + case MLX5_MP_REQ_MEMPOOL_UNREGISTER: + mlx5_mp_id_init(&mp_id, param->port_id); + mp_init_msg(&mp_id, &mp_res, param->type); + mpr = ¶m->args.mempool_reg; + res->result = mlx5_mr_mempool_unregister(mpr->share_cache, + mpr->mempool, NULL); + return rte_mp_reply(&mp_res, peer); + default: + return 1; + } + return -1; +} + int mlx5_mp_os_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer) { @@ -34,6 +73,11 @@ mlx5_mp_os_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer) int ret; MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); + /* Port-agnostic messages. */ + ret = mlx5_mp_os_handle_port_agnostic(mp_msg, peer); + if (ret <= 0) + return ret; + /* Port-specific messages. */ if (!rte_eth_dev_is_valid_port(param->port_id)) { rte_errno = ENODEV; DRV_LOG(ERR, "port %u invalid port ID", param->port_id); diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 5f8766aa48..7dceadb6cc 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -1034,8 +1034,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, err = mlx5_proc_priv_init(eth_dev); if (err) return NULL; - mp_id.port_id = eth_dev->data->port_id; - strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); + mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); /* Receive command fd from primary process */ err = mlx5_mp_req_verbs_cmd_fd(&mp_id); if (err < 0) @@ -2136,6 +2135,7 @@ mlx5_os_config_default(struct mlx5_dev_config *config) config->txqs_inline = MLX5_ARG_UNSET; config->vf_nl_en = 1; config->mr_ext_memseg_en = 1; + config->mr_mempool_reg_en = 1; config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; config->dv_esw_en = 1; diff --git a/drivers/net/mlx5/linux/mlx5_os.h b/drivers/net/mlx5/linux/mlx5_os.h index 2991d37df2..eb7e1dd3c6 100644 --- a/drivers/net/mlx5/linux/mlx5_os.h +++ b/drivers/net/mlx5/linux/mlx5_os.h @@ -20,5 +20,7 @@ enum { #define MLX5_NAMESIZE IF_NAMESIZE int mlx5_auxiliary_get_ifindex(const char *sf_name); +void mlx5_mempool_event_cb(enum rte_mempool_event event, + struct rte_mempool *mp, void *arg); #endif /* RTE_PMD_MLX5_OS_H_ */ diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index f84e061fe7..d0bc7c7007 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -178,6 +178,9 @@ /* Device parameter to configure allow or prevent duplicate rules pattern. */ #define MLX5_ALLOW_DUPLICATE_PATTERN "allow_duplicate_pattern" +/* Device parameter to configure implicit registration of mempool memory. */ +#define MLX5_MR_MEMPOOL_REG_EN "mr_mempool_reg_en" + /* Shared memory between primary and secondary processes. */ struct mlx5_shared_data *mlx5_shared_data; @@ -1085,6 +1088,120 @@ mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh, return err; } +/** + * Register the mempool for the protection domain. + * + * @param sh + * Pointer to the device shared context. + * @param mp + * Mempool being registered. + */ +static void +mlx5_dev_ctx_shared_mempool_register(struct mlx5_dev_ctx_shared *sh, + struct rte_mempool *mp) +{ + struct mlx5_mp_id mp_id; + + mlx5_mp_id_init(&mp_id, 0); + if (mlx5_mr_mempool_register(&sh->share_cache, sh->pd, mp, &mp_id) < 0) + DRV_LOG(ERR, "Failed to register mempool %s for PD %p: %s", + mp->name, sh->pd, rte_strerror(rte_errno)); +} + +/** + * Unregister the mempool from the protection domain. + * + * @param sh + * Pointer to the device shared context. + * @param mp + * Mempool being unregistered. + */ +static void +mlx5_dev_ctx_shared_mempool_unregister(struct mlx5_dev_ctx_shared *sh, + struct rte_mempool *mp) +{ + struct mlx5_mp_id mp_id; + + mlx5_mp_id_init(&mp_id, 0); + if (mlx5_mr_mempool_unregister(&sh->share_cache, mp, &mp_id) < 0) + DRV_LOG(WARNING, "Failed to unregister mempool %s for PD %p: %s", + mp->name, sh->pd, rte_strerror(rte_errno)); +} + +/** + * rte_mempool_walk() callback to register mempools + * for the protection domain. + * + * @param mp + * The mempool being walked. + * @param arg + * Pointer to the device shared context. + */ +static void +mlx5_dev_ctx_shared_mempool_register_cb(struct rte_mempool *mp, void *arg) +{ + mlx5_dev_ctx_shared_mempool_register + ((struct mlx5_dev_ctx_shared *)arg, mp); +} + +/** + * rte_mempool_walk() callback to unregister mempools + * from the protection domain. + * + * @param mp + * The mempool being walked. + * @param arg + * Pointer to the device shared context. + */ +static void +mlx5_dev_ctx_shared_mempool_unregister_cb(struct rte_mempool *mp, void *arg) +{ + mlx5_dev_ctx_shared_mempool_unregister + ((struct mlx5_dev_ctx_shared *)arg, mp); +} + +/** + * Mempool life cycle callback for Ethernet devices. + * + * @param event + * Mempool life cycle event. + * @param mp + * Associated mempool. + * @param arg + * Pointer to a device shared context. + */ +static void +mlx5_dev_ctx_shared_mempool_event_cb(enum rte_mempool_event event, + struct rte_mempool *mp, void *arg) +{ + struct mlx5_dev_ctx_shared *sh = arg; + + switch (event) { + case RTE_MEMPOOL_EVENT_CREATE: + mlx5_dev_ctx_shared_mempool_register(sh, mp); + break; + case RTE_MEMPOOL_EVENT_DESTROY: + mlx5_dev_ctx_shared_mempool_unregister(sh, mp); + break; + } +} + +int +mlx5_dev_ctx_shared_mempool_subscribe(struct mlx5_dev_ctx_shared *sh) +{ + int ret; + + /* Callback for this shared context may be already registered. */ + ret = rte_mempool_event_callback_register + (mlx5_dev_ctx_shared_mempool_event_cb, sh); + if (ret != 0 && rte_errno != EEXIST) + return ret; + /* Register mempools only once for this shared context. */ + if (ret == 0) + rte_mempool_walk(mlx5_dev_ctx_shared_mempool_register_cb, sh); + return 0; +} + /** * Allocate shared device context. If there is multiport device the * master and representors will share this context, if there is single @@ -1282,6 +1399,8 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn, void mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh) { + int ret; + pthread_mutex_lock(&mlx5_dev_ctx_list_mutex); #ifdef RTE_LIBRTE_MLX5_DEBUG /* Check the object presence in the list. */ @@ -1302,6 +1421,12 @@ mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh) MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); if (--sh->refcnt) goto exit; + /* Stop watching for mempool events and unregister all mempools. */ + ret = rte_mempool_event_callback_unregister + (mlx5_dev_ctx_shared_mempool_event_cb, sh); + if (ret == 0 || rte_errno != ENOENT) + rte_mempool_walk(mlx5_dev_ctx_shared_mempool_unregister_cb, + sh); /* Remove from memory callback device list. */ rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock); LIST_REMOVE(sh, mem_event_cb); @@ -1991,6 +2116,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque) config->decap_en = !!tmp; } else if (strcmp(MLX5_ALLOW_DUPLICATE_PATTERN, key) == 0) { config->allow_duplicate_pattern = !!tmp; + } else if (strcmp(MLX5_MR_MEMPOOL_REG_EN, key) == 0) { + config->mr_mempool_reg_en = !!tmp; } else { DRV_LOG(WARNING, "%s: unknown parameter", key); rte_errno = EINVAL; @@ -2051,6 +2178,7 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs) MLX5_SYS_MEM_EN, MLX5_DECAP_EN, MLX5_ALLOW_DUPLICATE_PATTERN, + MLX5_MR_MEMPOOL_REG_EN, NULL, }; struct rte_kvargs *kvlist; diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index e02714e231..1f6944ba9a 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -155,6 +155,13 @@ struct mlx5_flow_dump_ack { /** Key string for IPC. */ #define MLX5_MP_NAME "net_mlx5_mp" +/** Initialize a multi-process ID. */ +static inline void +mlx5_mp_id_init(struct mlx5_mp_id *mp_id, uint16_t port_id) +{ + mp_id->port_id = port_id; + strlcpy(mp_id->name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); +} LIST_HEAD(mlx5_dev_list, mlx5_dev_ctx_shared); @@ -175,6 +182,9 @@ struct mlx5_local_data { extern struct mlx5_shared_data *mlx5_shared_data; +/* Exposed to copy into the shared data in OS-specific module. */ +extern int mlx5_net_mempool_slot; + /* Dev ops structs */ extern const struct eth_dev_ops mlx5_dev_ops; extern const struct eth_dev_ops mlx5_dev_sec_ops; @@ -270,6 +280,8 @@ struct mlx5_dev_config { unsigned int dv_miss_info:1; /* restore packet after partial hw miss */ unsigned int allow_duplicate_pattern:1; /* Allow/Prevent the duplicate rules pattern. */ + unsigned int mr_mempool_reg_en:1; + /* Allow/prevent implicit mempool memory registration. */ struct { unsigned int enabled:1; /* Whether MPRQ is enabled. */ unsigned int stride_num_n; /* Number of strides. */ @@ -1497,6 +1509,7 @@ struct mlx5_dev_ctx_shared * mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn, const struct mlx5_dev_config *config); void mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh); +int mlx5_dev_ctx_shared_mempool_subscribe(struct mlx5_dev_ctx_shared *sh); void mlx5_free_table_hash_list(struct mlx5_priv *priv); int mlx5_alloc_table_hash_list(struct mlx5_priv *priv); void mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn, diff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c index 44afda731f..1cd7d4ced0 100644 --- a/drivers/net/mlx5/mlx5_mr.c +++ b/drivers/net/mlx5/mlx5_mr.c @@ -128,9 +128,36 @@ mlx5_tx_addr2mr_bh(struct mlx5_txq_data *txq, uintptr_t addr) uint32_t mlx5_tx_mb2mr_bh(struct mlx5_txq_data *txq, struct rte_mbuf *mb) { + struct mlx5_txq_ctrl *txq_ctrl = + container_of(txq, struct mlx5_txq_ctrl, txq); + struct mlx5_mr_ctrl *mr_ctrl = &txq->mr_ctrl; + struct mlx5_priv *priv = txq_ctrl->priv; uintptr_t addr = (uintptr_t)mb->buf_addr; uint32_t lkey; + if (priv->config.mr_mempool_reg_en) { + struct rte_mempool *mp = NULL; + struct mlx5_mprq_buf *buf; + + if (!RTE_MBUF_HAS_EXTBUF(mb)) { + mp = mlx5_mb2mp(mb); + } else if (mb->shinfo->free_cb == mlx5_mprq_buf_free_cb) { + /* Recover MPRQ mempool. */ + buf = mb->shinfo->fcb_opaque; + mp = buf->mp; + } + if (mp != NULL) { + lkey = mlx5_mr_mempool2mr_bh(&priv->sh->share_cache, + mr_ctrl, mp, addr); + /* + * Lookup can only fail on invalid input, e.g. "addr" + * is not from "mp" or "mp" has MEMPOOL_F_NON_IO set. + */ + if (lkey != UINT32_MAX) + return lkey; + } + /* Fallback for generic mechanism in corner cases. */ + } lkey = mlx5_tx_addr2mr_bh(txq, addr); if (lkey == UINT32_MAX && rte_errno == ENXIO) { /* Mempool may have externally allocated memory. */ diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c index 54173bfacb..6a027f87bf 100644 --- a/drivers/net/mlx5/mlx5_trigger.c +++ b/drivers/net/mlx5/mlx5_trigger.c @@ -1124,6 +1124,13 @@ mlx5_dev_start(struct rte_eth_dev *dev) dev->data->port_id, strerror(rte_errno)); goto error; } + if (priv->config.mr_mempool_reg_en) { + if (mlx5_dev_ctx_shared_mempool_subscribe(priv->sh) != 0) { + DRV_LOG(ERR, "port %u failed to subscribe for mempool life cycle: %s", + dev->data->port_id, rte_strerror(rte_errno)); + goto error; + } + } rte_wmb(); dev->tx_pkt_burst = mlx5_select_tx_function(dev); dev->rx_pkt_burst = mlx5_select_rx_function(dev); @@ -1193,11 +1200,10 @@ mlx5_dev_stop(struct rte_eth_dev *dev) if (priv->obj_ops.lb_dummy_queue_release) priv->obj_ops.lb_dummy_queue_release(dev); mlx5_txpp_stop(dev); - return 0; } -/** +/* * Enable traffic flows configured by control plane * * @param dev