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intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT020.mail.protection.outlook.com (10.13.174.149) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4352.24 via Frontend Transport; Tue, 27 Jul 2021 03:42:32 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 27 Jul 2021 03:42:30 +0000 From: Xueming Li To: CC: , Viacheslav Ovsiienko , , Thomas Monjalon , Ferruh Yigit , Andrew Rybchenko Date: Tue, 27 Jul 2021 11:42:04 +0800 Message-ID: <20210727034204.20649-1-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e9a8f810-eded-47bc-7ef0-08d950b09111 X-MS-TrafficTypeDiagnostic: BL0PR12MB4753: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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CAT:NONE; SFS:(4636009)(376002)(39860400002)(136003)(346002)(396003)(36840700001)(46966006)(4326008)(8936002)(7696005)(478600001)(70586007)(7636003)(36860700001)(83380400001)(82310400003)(426003)(6666004)(109986005)(1076003)(2906002)(186003)(8676002)(54906003)(336012)(16526019)(70206006)(86362001)(2616005)(82740400003)(5660300002)(36906005)(55016002)(26005)(316002)(36756003)(356005)(6286002)(47076005)(266003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 03:42:32.6925 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e9a8f810-eded-47bc-7ef0-08d950b09111 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT020.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4753 Subject: [dpdk-dev] [RFC] ethdev: introduce shared Rx queue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In eth PMD driver model, each RX queue was pre-loaded with mbufs for saving incoming packets. When number of SF or VF scale out in a switch domain, the memory consumption became significant. Most important, polling all ports leads to high cache miss, high latency and low throughput. To save memory and speed up, this patch introduces shared RX queue. Ports with same configuration in a switch domain could share RX queue set by specifying offloading flag RTE_ETH_RX_OFFLOAD_SHARED_RXQ. Polling a member port in shared RX queue receives packets for all member ports. Source port is identified by mbuf->port. Queue number of ports in shared group should be identical. Queue index is 1:1 mapped in shared group. Shared RX queue is supposed to be polled on same thread. Multiple groups is supported by group ID. Signed-off-by: Xueming Li --- lib/ethdev/rte_ethdev.c | 1 + lib/ethdev/rte_ethdev.h | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c index a1106f5896..632a0e890b 100644 --- a/lib/ethdev/rte_ethdev.c +++ b/lib/ethdev/rte_ethdev.c @@ -127,6 +127,7 @@ static const struct { RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM), RTE_RX_OFFLOAD_BIT2STR(RSS_HASH), RTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT), + RTE_ETH_RX_OFFLOAD_BIT2STR(SHARED_RXQ), }; #undef RTE_RX_OFFLOAD_BIT2STR diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index d2b27c351f..5c63751be0 100644 --- a/lib/ethdev/rte_ethdev.h +++ b/lib/ethdev/rte_ethdev.h @@ -1047,6 +1047,7 @@ struct rte_eth_rxconf { uint8_t rx_drop_en; /**< Drop packets if no descriptors are available. */ uint8_t rx_deferred_start; /**< Do not start queue with rte_eth_dev_start(). */ uint16_t rx_nseg; /**< Number of descriptions in rx_seg array. */ + uint32_t shared_group; /**< Shared port group index in switch domain. */ /** * Per-queue Rx offloads to be set using DEV_RX_OFFLOAD_* flags. * Only offloads set on rx_queue_offload_capa or rx_offload_capa @@ -1373,6 +1374,12 @@ struct rte_eth_conf { #define DEV_RX_OFFLOAD_OUTER_UDP_CKSUM 0x00040000 #define DEV_RX_OFFLOAD_RSS_HASH 0x00080000 #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT 0x00100000 +/** + * RXQ is shared within ports in switch domain to save memory and avoid + * polling every port. Any port in group could be used to receive packets. + * Real source port number saved in mbuf->port field. + */ +#define RTE_ETH_RX_OFFLOAD_SHARED_RXQ 0x00200000 #define DEV_RX_OFFLOAD_CHECKSUM (DEV_RX_OFFLOAD_IPV4_CKSUM | \ DEV_RX_OFFLOAD_UDP_CKSUM | \