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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT040.mail.protection.outlook.com (10.13.174.140) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4287.22 via Frontend Transport; Tue, 6 Jul 2021 06:22:42 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 6 Jul 2021 06:22:39 +0000 From: Jiawei Wang To: , , , , Shahaf Shuler CC: , Date: Tue, 6 Jul 2021 11:12:27 +0300 Message-ID: <20210706081228.32672-2-jiaweiw@nvidia.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20210706081228.32672-1-jiaweiw@nvidia.com> References: <20210528132524.32451-1-jiaweiw@nvidia.com> <20210706081228.32672-1-jiaweiw@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5b4fc75c-7d9b-4af5-5591-08d94046761b X-MS-TrafficTypeDiagnostic: MWHPR12MB1614: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:308; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jul 2021 06:22:42.0858 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5b4fc75c-7d9b-4af5-5591-08d94046761b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT040.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1614 Subject: [dpdk-dev] [PATCH v2 1/2] common/mlx5: add glue function for duplicate rule ability X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add glue function to update the duplicate rule allow/disallow through rdma-core DV API. Signed-off-by: Jiawei Wang Acked-by: Matan Azrad --- drivers/common/mlx5/linux/meson.build | 2 ++ drivers/common/mlx5/linux/mlx5_glue.c | 12 ++++++++++++ drivers/common/mlx5/linux/mlx5_glue.h | 1 + 3 files changed, 15 insertions(+) diff --git a/drivers/common/mlx5/linux/meson.build b/drivers/common/mlx5/linux/meson.build index 5cea1b44d7..d3e95f83bb 100644 --- a/drivers/common/mlx5/linux/meson.build +++ b/drivers/common/mlx5/linux/meson.build @@ -195,6 +195,8 @@ has_sym_args = [ 'mlx5dv_dump_dr_rule' ], [ 'HAVE_MLX5_DR_ACTION_ASO_CT', 'infiniband/mlx5dv.h', 'MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR' ], + [ 'HAVE_MLX5_DR_ALLOW_DUPLICATE', 'infiniband/mlx5dv.h', + 'mlx5dv_dr_domain_allow_duplicate_rules' ], ] config = configuration_data() foreach arg:has_sym_args diff --git a/drivers/common/mlx5/linux/mlx5_glue.c b/drivers/common/mlx5/linux/mlx5_glue.c index 00be8114be..037ca961a0 100644 --- a/drivers/common/mlx5/linux/mlx5_glue.c +++ b/drivers/common/mlx5/linux/mlx5_glue.c @@ -1358,6 +1358,17 @@ mlx5_glue_dv_alloc_pp(struct ibv_context *context, #endif } +static void +mlx5_glue_dr_allow_duplicate_rules(void *domain, uint32_t allow) +{ +#ifdef HAVE_MLX5_DR_ALLOW_DUPLICATE + mlx5dv_dr_domain_allow_duplicate_rules(domain, allow); +#else + (void)(allow); + (void)(domain); +#endif +} + static void mlx5_glue_dv_free_pp(struct mlx5dv_pp *pp) { @@ -1478,6 +1489,7 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) { mlx5_glue_dr_create_flow_action_sampler, .dr_create_flow_action_dest_array = mlx5_glue_dr_action_create_dest_array, + .dr_allow_duplicate_rules = mlx5_glue_dr_allow_duplicate_rules, .devx_query_eqn = mlx5_glue_devx_query_eqn, .devx_create_event_channel = mlx5_glue_devx_create_event_channel, .devx_destroy_event_channel = mlx5_glue_devx_destroy_event_channel, diff --git a/drivers/common/mlx5/linux/mlx5_glue.h b/drivers/common/mlx5/linux/mlx5_glue.h index 840d8cf57f..61f40d5478 100644 --- a/drivers/common/mlx5/linux/mlx5_glue.h +++ b/drivers/common/mlx5/linux/mlx5_glue.h @@ -350,6 +350,7 @@ struct mlx5_glue { struct mlx5dv_devx_async_event_hdr *event_data, size_t event_resp_len); void (*dr_reclaim_domain_memory)(void *domain, uint32_t enable); + void (*dr_allow_duplicate_rules)(void *domain, uint32_t allow); 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Tue, 6 Jul 2021 06:22:43 +0000 From: Jiawei Wang To: , , , , Shahaf Shuler CC: , Date: Tue, 6 Jul 2021 11:12:28 +0300 Message-ID: <20210706081228.32672-3-jiaweiw@nvidia.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20210706081228.32672-1-jiaweiw@nvidia.com> References: <20210528132524.32451-1-jiaweiw@nvidia.com> <20210706081228.32672-1-jiaweiw@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8e6c9691-4643-48d3-598d-08d940467856 X-MS-TrafficTypeDiagnostic: BYAPR12MB3640: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: kWs9yJehqVNwoh7esn3RYihhYhYdespmOsqW5DfsLPkXys1+TR8tba/oCudQGjYEeMB1CzDg0pmKy4pwDj1CGzJYjxNdUNQGyjYygIBMgqI0e7rAbrUf6fTbvNDWAu1L2e8jXu12+0FGE8M4xdhXFUtAuwqlRLsq6p6igG7hBVDzKP04pY/JRl6eV019mj3G831v0CO2Br1/3emyWmuXuIDUbcwpMem+I0vaP6vhhPVs3lw6ubeeKEX3mbvBE4IufqEtcMOSL2C4a/JAJJo2HTeSxCYyzoDcb474XXegilXP1VLIM4ZP4Jjbsbx3ehGWHvXDfN7ImZSiJiA2WxthW7pq/UzzaipQAAkThUug4U131YdjMxbr+UgnLsNPZ+ilI9bvs/LbYMRr0xsYIcNbLVBfBQy6+pipUSTWM+z90BMexLL8qZaeCb1j0RLjWyPHwO8Pr54Ou2gZYlZ3lS0VFHoGRUsAb3xSprIhOgrzjE1Oxmp95mGrsxVgMZTFYQuaqTMafEJwvmM2OtZ/tiu4LrjaX8eeqGxzjLTX6VBJwqWlpz43q9neYj7vVp2n0tSGmXLtNgKPcgwkXF54t0b3Pi/qV0eJPONpoifdfTEQ53OQF5DcKjNt2GeUjNulAREAfV1C3YS66pqrEh3G+BmNLb4AQnKbgvaR1LFfIHBY1zCErWNPjT0DyaD77Rq8ocVP091Ss+d23My7vaigGKMddeXmWfKYDrwsAynlcHSB6mM= X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(376002)(346002)(396003)(136003)(39860400002)(36840700001)(46966006)(26005)(86362001)(478600001)(36860700001)(36906005)(6666004)(6636002)(356005)(82310400003)(336012)(70586007)(7636003)(6286002)(110136005)(426003)(70206006)(186003)(2616005)(316002)(54906003)(16526019)(8936002)(1076003)(2906002)(8676002)(107886003)(36756003)(4326008)(7696005)(5660300002)(82740400003)(47076005)(55016002)(83380400001)(309714004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jul 2021 06:22:45.9469 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8e6c9691-4643-48d3-598d-08d940467856 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT026.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3640 Subject: [dpdk-dev] [PATCH v2 2/2] net/mlx5: control rules with identical pattern behavior X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In order to allow\disallow configuring rules with identical patterns, the new device argument 'allow_duplicate_pattern' is introduced. If allow, these rules be inserted successfully and only the first rule take affect. If disallow, the first rule will be inserted and other rules be rejected. The default is to allow. Set it to 0 if disallow, for example: -a ,allow_duplicate_pattern=0 Signed-off-by: Jiawei Wang Acked-by: Matan Azrad --- doc/guides/nics/mlx5.rst | 14 ++++++++++++++ doc/guides/rel_notes/release_21_08.rst | 6 ++++++ drivers/net/mlx5/linux/mlx5_os.c | 10 ++++++++++ drivers/net/mlx5/mlx5.c | 6 ++++++ drivers/net/mlx5/mlx5.h | 2 ++ drivers/net/mlx5/mlx5_flow_dv.c | 12 ++++++++---- 6 files changed, 46 insertions(+), 4 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index eb44a070b1..233834958b 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -1061,6 +1061,20 @@ Driver options By default, the PMD will set this value to 1. +- ``allow_duplicate_pattern`` parameter [int] + + There are two options to choose: + + - 0. Prevent insertion of rules with the same pattern items on non-root table. + In this case, only the first rule be inserted and the following rules be + rejected and error code EEXIST be returned. + + - 1. Allow insertion of rules with the same pattern items. + In this case, all rules be inserted but only the first rule will take + affect, this rule will take affect only if the previous rules be deleted. + + By default, the PMD will set this value to 1. + .. _mlx5_firmware_config: Firmware configuration diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst index a6ecfdf3ce..299fdbbe93 100644 --- a/doc/guides/rel_notes/release_21_08.rst +++ b/doc/guides/rel_notes/release_21_08.rst @@ -55,6 +55,12 @@ New Features Also, make sure to start the actual text at the margin. ======================================================= +* **Updated Mellanox mlx5 driver.** + + Updated the Mellanox mlx5 driver with new features and improvements, including: + + * Added devargs options ``allow_duplicate_pattern``. + Removed Items ------------- diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 92b3009786..06f5233da1 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -355,6 +355,15 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv) mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); } sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); + if (!priv->config.allow_duplicate_pattern) { +#ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE + DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); +#endif + mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); + mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); + if (sh->fdb_domain) + mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); + } #endif /* HAVE_MLX5DV_DR */ sh->default_miss_action = mlx5_glue->dr_create_flow_action_default_miss(); @@ -2363,6 +2372,7 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, dev_config.dv_flow_en = 1; dev_config.decap_en = 1; dev_config.log_hp_size = MLX5_ARG_UNSET; + dev_config.allow_duplicate_pattern = 1; list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, &list[i], &dev_config, diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index cf1815cb74..ef15b115d8 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -175,6 +175,9 @@ /* Decap will be used or not. */ #define MLX5_DECAP_EN "decap_en" +/* Device parameter to configure allow or prevent duplicate rules pattern. */ +#define MLX5_ALLOW_DUPLICATE_PATTERN "allow_duplicate_pattern" + /* Shared memory between primary and secondary processes. */ struct mlx5_shared_data *mlx5_shared_data; @@ -1948,6 +1951,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque) config->sys_mem_en = !!tmp; } else if (strcmp(MLX5_DECAP_EN, key) == 0) { config->decap_en = !!tmp; + } else if (strcmp(MLX5_ALLOW_DUPLICATE_PATTERN, key) == 0) { + config->allow_duplicate_pattern = !!tmp; } else { DRV_LOG(WARNING, "%s: unknown parameter", key); rte_errno = EINVAL; @@ -2007,6 +2012,7 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs) MLX5_RECLAIM_MEM, MLX5_SYS_MEM_EN, MLX5_DECAP_EN, + MLX5_ALLOW_DUPLICATE_PATTERN, NULL, }; struct rte_kvargs *kvlist; diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 1b2dc8f815..b0f36eb668 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -244,6 +244,8 @@ struct mlx5_dev_config { unsigned int sys_mem_en:1; /* The default memory allocator. */ unsigned int decap_en:1; /* Whether decap will be used or not. */ unsigned int dv_miss_info:1; /* restore packet after partial hw miss */ + unsigned int allow_duplicate_pattern:1; + /* Allow/Prevent the duplicate rules pattern. */ struct { unsigned int enabled:1; /* Whether MPRQ is enabled. */ unsigned int stride_num_n; /* Number of strides. */ diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index a04a3c2bb8..30b347c671 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -13309,10 +13309,14 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, (void *)&dv->value, n, dv->actions, &dh->drv_flow); if (err) { - rte_flow_error_set(error, errno, - RTE_FLOW_ERROR_TYPE_UNSPECIFIED, - NULL, - "hardware refuses to create flow"); + rte_flow_error_set + (error, errno, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + (!priv->config.allow_duplicate_pattern && + errno == EEXIST) ? + "duplicating pattern is not allowed" : + "hardware refuses to create flow"); goto error; } if (priv->vmwa_context &&