From patchwork Tue Jun 29 16:40:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Haiyue" X-Patchwork-Id: 94996 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 83CC5A0A0C; Tue, 29 Jun 2021 19:02:46 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7E65E411A5; Tue, 29 Jun 2021 19:02:45 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 236C440E01 for ; Tue, 29 Jun 2021 19:02:43 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10030"; a="272047407" X-IronPort-AV: E=Sophos;i="5.83,309,1616482800"; d="scan'208";a="272047407" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2021 10:02:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,309,1616482800"; d="scan'208";a="447115661" Received: from npg-dpdk-haiyue-1.sh.intel.com ([10.67.118.197]) by orsmga007.jf.intel.com with ESMTP; 29 Jun 2021 10:02:39 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: david.marchand@redhat.com, Haiyue Wang , Qiming Yang , Qi Zhang Date: Wed, 30 Jun 2021 00:40:33 +0800 Message-Id: <20210629164033.228210-1-haiyue.wang@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210629133332.226897-1-haiyue.wang@intel.com> References: <20210629133332.226897-1-haiyue.wang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2] net/ice: enable to set HW debug mask X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The HW debug mask is always zero, so user can't enable the related debug function like ICE_DBG_XXX etc, add the devarg 'hw_debug_mask' to set the debug mask log output at runtime. Signed-off-by: Haiyue Wang Acked-by: Qi Zhang --- v2: Add the doc in ice.rst --- doc/guides/nics/ice.rst | 8 ++++++++ drivers/net/ice/ice_ethdev.c | 27 +++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst index b691008add..22a19b8bba 100644 --- a/doc/guides/nics/ice.rst +++ b/doc/guides/nics/ice.rst @@ -209,6 +209,14 @@ Runtime Config Options The ``rte_net_ice_dump_proto_xtr_metadata`` routine shows how to access the protocol extraction result in ``struct rte_mbuf``. +- ``Hardware debug mask log support`` (default ``0``) + + User can enable the related hardware debug mask such as ICE_DBG_NVM:: + + -a 0000:88:00.0,hw_debug_mask=0x80 --log-level=pmd.net.ice.driver:8 + + These ICE_DBG_XXX are defined in ``drivers/net/ice/base/ice_type.h``. + Driver compilation and testing ------------------------------ diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 09e38590e5..5a18663430 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -26,11 +26,13 @@ #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support" #define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support" #define ICE_PROTO_XTR_ARG "proto_xtr" +#define ICE_HW_DEBUG_MASK_ARG "hw_debug_mask" static const char * const ice_valid_args[] = { ICE_SAFE_MODE_SUPPORT_ARG, ICE_PIPELINE_MODE_SUPPORT_ARG, ICE_PROTO_XTR_ARG, + ICE_HW_DEBUG_MASK_ARG, NULL }; @@ -1836,6 +1838,25 @@ parse_bool(const char *key, const char *value, void *args) return 0; } +static int +parse_u64(const char *key, const char *value, void *args) +{ + u64 *num = (u64 *)args; + u64 tmp; + + errno = 0; + tmp = strtoull(value, NULL, 16); + if (errno) { + PMD_DRV_LOG(WARNING, "%s: \"%s\" is not a valid u64", + key, value); + return -1; + } + + *num = tmp; + + return 0; +} + static int ice_parse_devargs(struct rte_eth_dev *dev) { struct ice_adapter *ad = @@ -1872,6 +1893,11 @@ static int ice_parse_devargs(struct rte_eth_dev *dev) if (ret) goto bail; + ret = rte_kvargs_process(kvlist, ICE_HW_DEBUG_MASK_ARG, + &parse_u64, &ad->hw.debug_mask); + if (ret) + goto bail; + bail: rte_kvargs_free(kvlist); return ret; @@ -5306,6 +5332,7 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map); RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ice, + ICE_HW_DEBUG_MASK_ARG "=0xXXX" ICE_PROTO_XTR_ARG "=[queue:]" ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>" ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>");