From patchwork Tue Jun 29 15:19:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ji, Kai" X-Patchwork-Id: 94978 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1BA7AA0A0C; Tue, 29 Jun 2021 17:19:14 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A0F4C4117E; Tue, 29 Jun 2021 17:19:13 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 5F2E240E01 for ; Tue, 29 Jun 2021 17:19:12 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10030"; a="208113592" X-IronPort-AV: E=Sophos;i="5.83,309,1616482800"; d="scan'208";a="208113592" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2021 08:19:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,309,1616482800"; d="scan'208";a="447076269" Received: from silpixa00400272.ir.intel.com (HELO silpixa00400272.ger.corp.intel.com) ([10.237.223.111]) by orsmga007.jf.intel.com with ESMTP; 29 Jun 2021 08:19:09 -0700 From: Kai Ji To: dev@dpdk.org Cc: roy.fan.zhang@intel.com, Kai Ji , pablo.de.lara.guarch@intel.com Date: Tue, 29 Jun 2021 16:19:07 +0100 Message-Id: <20210629151907.28734-1-kai.ji@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210629123602.27702-1-kai.ji@intel.com> References: <20210629123602.27702-1-kai.ji@intel.com> Subject: [dpdk-dev] [dpdk-dev v2] crypto/aesni_gcm: fix performance issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch fixes the aesni_gcm performance issue on systems with AVX512 CPU flag presented but with VAES CPU flag missing, such as Skylake. Fixes: 81fe96a0cece ("crypto/aesni_gcm: use architecture independent API") Cc: pablo.de.lara.guarch@intel.com Signed-off-by: Kai Ji Acked-by: Fan Zhang --- v2: Checkpatch fix drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c index bc87e44a9d..886e2a5aaa 100644 --- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c +++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c @@ -842,8 +842,14 @@ aesni_gcm_create(const char *name, init_mb_mgr_avx2(mb_mgr); break; case RTE_AESNI_GCM_AVX512: - dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX512; - init_mb_mgr_avx512(mb_mgr); + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_VAES)) { + dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX512; + init_mb_mgr_avx512(mb_mgr); + } else { + dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2; + init_mb_mgr_avx2(mb_mgr); + vector_mode = RTE_AESNI_GCM_AVX2; + } break; default: AESNI_GCM_LOG(ERR, "Unsupported vector mode %u\n", vector_mode);