From patchwork Sun Jun 13 03:05:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 94157 X-Patchwork-Delegate: andrew.rybchenko@oktetlabs.ru Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AC49BA0C40; Sun, 13 Jun 2021 05:05:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8CE534111C; Sun, 13 Jun 2021 05:05:39 +0200 (CEST) Received: from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255]) by mails.dpdk.org (Postfix) with ESMTP id 56A5840E03 for ; Sun, 13 Jun 2021 05:05:33 +0200 (CEST) Received: from dggeme756-chm.china.huawei.com (unknown [172.30.72.54]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4G2fTZ2VW2z1BFRc for ; Sun, 13 Jun 2021 11:00:34 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by dggeme756-chm.china.huawei.com (10.3.19.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Sun, 13 Jun 2021 11:05:30 +0800 From: "Min Hu (Connor)" To: CC: Date: Sun, 13 Jun 2021 11:05:05 +0800 Message-ID: <1623553508-5478-2-git-send-email-humin29@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1623553508-5478-1-git-send-email-humin29@huawei.com> References: <1623553508-5478-1-git-send-email-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggeme756-chm.china.huawei.com (10.3.19.102) X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH 1/4] net/hns3: add query basic info support for VF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chengchang Tang There are some feautres of VF depend on PF, so it's necessary for VF to know whether current PF supports. Therefore, the final capability set of VF will be composed of the capability set of hardware and the capability set of PF. For comatibility reasons, the mailbox HNS3_MBX_GET_TCINFO has been modified to obatin more basic information about the current PF, including the communication interface version and current PF capabilities set. Signed-off-by: Chengchang Tang Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_ethdev.h | 1 + drivers/net/hns3/hns3_ethdev_vf.c | 48 ++++++++++++++++++++++++--------------- drivers/net/hns3/hns3_mbx.h | 10 +++++++- 3 files changed, 40 insertions(+), 19 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index 575bacd..ee84519 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -488,6 +488,7 @@ struct hns3_hw { struct hns3_rx_missed_stats imissed_stats; uint64_t oerror_stats; uint32_t fw_version; + uint16_t pf_vf_if_version; /* version of communication interface */ uint16_t num_msi; uint16_t total_tqps_num; /* total task queue pairs of this PF */ diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index e582503..dc95e71 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -1409,26 +1409,38 @@ hns3vf_get_queue_depth(struct hns3_hw *hw) } static int -hns3vf_get_tc_info(struct hns3_hw *hw) +hns3vf_get_num_tc(struct hns3_hw *hw) { - uint8_t resp_msg; - int ret; + uint8_t num_tc = 0; uint32_t i; - ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_TCINFO, 0, NULL, 0, - true, &resp_msg, sizeof(resp_msg)); + for (i = 0; i < HNS3_MAX_TC_NUM; i++) { + if (hw->hw_tc_map & BIT(i)) + num_tc++; + } + return num_tc; +} + +static int +hns3vf_get_basic_info(struct hns3_hw *hw) +{ + uint8_t resp_msg[HNS3_MBX_MAX_RESP_DATA_SIZE]; + struct hns3_basic_info *basic_info; + int ret; + + ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_BASIC_INFO, 0, NULL, 0, + true, resp_msg, sizeof(resp_msg)); if (ret) { - hns3_err(hw, "VF request to get TC info from PF failed %d", - ret); + hns3_err(hw, "failed to get basic info from PF, ret = %d.", + ret); return ret; } - hw->hw_tc_map = resp_msg; + basic_info = (struct hns3_basic_info *)resp_msg; + hw->hw_tc_map = basic_info->hw_tc_map; + hw->num_tc = hns3vf_get_num_tc(hw); + hw->pf_vf_if_version = basic_info->pf_vf_if_version; - for (i = 0; i < HNS3_MAX_TC_NUM; i++) { - if (hw->hw_tc_map & BIT(i)) - hw->num_tc++; - } return 0; } @@ -1468,6 +1480,11 @@ hns3vf_get_configuration(struct hns3_hw *hw) hns3vf_get_push_lsc_cap(hw); + /* Get basic info from PF */ + ret = hns3vf_get_basic_info(hw); + if (ret) + return ret; + /* Get queue configuration from PF */ ret = hns3vf_get_queue_info(hw); if (ret) @@ -1483,12 +1500,7 @@ hns3vf_get_configuration(struct hns3_hw *hw) if (ret) return ret; - ret = hns3vf_get_port_base_vlan_filter_state(hw); - if (ret) - return ret; - - /* Get tc configuration from PF */ - return hns3vf_get_tc_info(hw); + return hns3vf_get_port_base_vlan_filter_state(hw); } static int diff --git a/drivers/net/hns3/hns3_mbx.h b/drivers/net/hns3/hns3_mbx.h index 86d32e6..f07dbe3 100644 --- a/drivers/net/hns3/hns3_mbx.h +++ b/drivers/net/hns3/hns3_mbx.h @@ -18,7 +18,7 @@ enum HNS3_MBX_OPCODE { HNS3_MBX_API_NEGOTIATE, /* (VF -> PF) negotiate API version */ HNS3_MBX_GET_QINFO, /* (VF -> PF) get queue config */ HNS3_MBX_GET_QDEPTH, /* (VF -> PF) get queue depth */ - HNS3_MBX_GET_TCINFO, /* (VF -> PF) get TC config */ + HNS3_MBX_GET_BASIC_INFO, /* (VF -> PF) get basic info */ HNS3_MBX_GET_RETA, /* (VF -> PF) get RETA */ HNS3_MBX_GET_RSS_KEY, /* (VF -> PF) get RSS key */ HNS3_MBX_GET_MAC_ADDR, /* (VF -> PF) get MAC addr */ @@ -47,6 +47,14 @@ enum HNS3_MBX_OPCODE { HNS3_MBX_PUSH_LINK_STATUS = 201, /* (IMP -> PF) get port link status */ }; +struct hns3_basic_info { + uint8_t hw_tc_map; + uint8_t rsv; + uint16_t pf_vf_if_version; + /* capabilities of VF dependent on PF */ + uint32_t caps; +}; + /* below are per-VF mac-vlan subcodes */ enum hns3_mbx_mac_vlan_subcode { HNS3_MBX_MAC_VLAN_UC_MODIFY = 0, /* modify UC mac addr */ From patchwork Sun Jun 13 03:05:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 94155 X-Patchwork-Delegate: andrew.rybchenko@oktetlabs.ru Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BE598A0C40; Sun, 13 Jun 2021 05:05:47 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3C2A3410FC; Sun, 13 Jun 2021 05:05:37 +0200 (CEST) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id 409B34003E for ; Sun, 13 Jun 2021 05:05:33 +0200 (CEST) Received: from dggeme756-chm.china.huawei.com (unknown [172.30.72.57]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4G2fWy3cwLzZcDQ for ; Sun, 13 Jun 2021 11:02:38 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by dggeme756-chm.china.huawei.com (10.3.19.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Sun, 13 Jun 2021 11:05:31 +0800 From: "Min Hu (Connor)" To: CC: Date: Sun, 13 Jun 2021 11:05:06 +0800 Message-ID: <1623553508-5478-3-git-send-email-humin29@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1623553508-5478-1-git-send-email-humin29@huawei.com> References: <1623553508-5478-1-git-send-email-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggeme756-chm.china.huawei.com (10.3.19.102) X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH 2/4] net/hns3: support for VF modify VLAN filter state X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chengchang Tang Since the HW limitation for VF, the VLAN filter is default enabled, and is not allowed to be closed. Now, the limitation has been removed in Kunpeng930 network engine, so this patch add support for VF to modify the VLAN filter state. A capabilities bit is added to differentiate between different platforms and achieve compatibility. When the VF runs on an incomatible platform or an incompatible kernel-mode driver version is used, the VF behavior is the same as that before. Signed-off-by: Chengchang Tang Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_cmd.h | 9 ++++++++ drivers/net/hns3/hns3_ethdev.h | 4 ++++ drivers/net/hns3/hns3_ethdev_vf.c | 48 ++++++++++++++++++++++++++++++++++++--- drivers/net/hns3/hns3_mbx.h | 1 + 4 files changed, 59 insertions(+), 3 deletions(-) diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h index eafa365..a762158 100644 --- a/drivers/net/hns3/hns3_cmd.h +++ b/drivers/net/hns3/hns3_cmd.h @@ -321,6 +321,15 @@ enum HNS3_CAPS_BITS { HNS3_CAPS_RXD_ADV_LAYOUT_B = 15, }; +/* Capabilities of VF dependent on the PF */ +enum HNS3VF_CAPS_BITS { + /* + * The following capability index definitions must be the same as those + * in kernel side PF. + */ + HNS3VF_CAPS_VLAN_FLT_MOD_B = 0, +}; + enum HNS3_API_CAP_BITS { HNS3_API_CAP_FLEX_RSS_TBL_B, }; diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index ee84519..b8347c2 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -869,8 +869,12 @@ enum { HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B, HNS3_DEV_SUPPORT_RAS_IMP_B, + HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B, }; +#define hns3_dev_vf_vlan_flt_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B) + #define hns3_dev_dcb_supported(hw) \ hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_DCB_B) diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index dc95e71..8f3be64 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -1408,6 +1408,14 @@ hns3vf_get_queue_depth(struct hns3_hw *hw) return 0; } +static void +hns3vf_update_caps(struct hns3_hw *hw, uint32_t caps) +{ + if (hns3_get_bit(caps, HNS3VF_CAPS_VLAN_FLT_MOD_B)) + hns3_set_bit(hw->capability, + HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B, 1); +} + static int hns3vf_get_num_tc(struct hns3_hw *hw) { @@ -1440,7 +1448,7 @@ hns3vf_get_basic_info(struct hns3_hw *hw) hw->hw_tc_map = basic_info->hw_tc_map; hw->num_tc = hns3vf_get_num_tc(hw); hw->pf_vf_if_version = basic_info->pf_vf_if_version; - + hns3vf_update_caps(hw, basic_info->caps); return 0; } @@ -1611,6 +1619,26 @@ hns3vf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) } static int +hns3vf_en_vlan_filter(struct hns3_hw *hw, bool enable) +{ + uint8_t msg_data; + int ret; + + if (!hns3_dev_vf_vlan_flt_supported(hw)) + return 0; + + msg_data = enable ? 1 : 0; + ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_VLAN, + HNS3_MBX_ENABLE_VLAN_FILTER, &msg_data, + sizeof(msg_data), true, NULL, 0); + if (ret) + hns3_err(hw, "%s vlan filter failed, ret = %d.", + enable ? "enable" : "disable", ret); + + return ret; +} + +static int hns3vf_en_hw_strip_rxvtag(struct hns3_hw *hw, bool enable) { uint8_t msg_data; @@ -1641,6 +1669,19 @@ hns3vf_vlan_offload_set(struct rte_eth_dev *dev, int mask) } tmp_mask = (unsigned int)mask; + + if (tmp_mask & ETH_VLAN_FILTER_MASK) { + rte_spinlock_lock(&hw->lock); + /* Enable or disable VLAN filter */ + if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER) + ret = hns3vf_en_vlan_filter(hw, true); + else + ret = hns3vf_en_vlan_filter(hw, false); + rte_spinlock_unlock(&hw->lock); + if (ret) + return ret; + } + /* Vlan stripping setting */ if (tmp_mask & ETH_VLAN_STRIP_MASK) { rte_spinlock_lock(&hw->lock); @@ -1738,9 +1779,10 @@ hns3vf_dev_configure_vlan(struct rte_eth_dev *dev) } /* Apply vlan offload setting */ - ret = hns3vf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK); + ret = hns3vf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK | + ETH_VLAN_FILTER_MASK); if (ret) - hns3_err(hw, "dev config vlan offload failed, ret =%d", ret); + hns3_err(hw, "dev config vlan offload failed, ret = %d.", ret); return ret; } diff --git a/drivers/net/hns3/hns3_mbx.h b/drivers/net/hns3/hns3_mbx.h index f07dbe3..f868e33 100644 --- a/drivers/net/hns3/hns3_mbx.h +++ b/drivers/net/hns3/hns3_mbx.h @@ -71,6 +71,7 @@ enum hns3_mbx_vlan_cfg_subcode { HNS3_MBX_VLAN_TX_OFF_CFG, /* set tx side vlan offload */ HNS3_MBX_VLAN_RX_OFF_CFG, /* set rx side vlan offload */ HNS3_MBX_GET_PORT_BASE_VLAN_STATE = 4, /* get port based vlan state */ + HNS3_MBX_ENABLE_VLAN_FILTER, /* set vlan filter state */ }; enum hns3_mbx_tbl_cfg_subcode { From patchwork Sun Jun 13 03:05:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 94153 X-Patchwork-Delegate: andrew.rybchenko@oktetlabs.ru Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CEF94A0C40; Sun, 13 Jun 2021 05:05:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4076E4003F; Sun, 13 Jun 2021 05:05:35 +0200 (CEST) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id 4744140141 for ; Sun, 13 Jun 2021 05:05:33 +0200 (CEST) Received: from dggeme756-chm.china.huawei.com (unknown [172.30.72.55]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4G2fWh3hMnz6wMJ for ; Sun, 13 Jun 2021 11:02:24 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by dggeme756-chm.china.huawei.com (10.3.19.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Sun, 13 Jun 2021 11:05:31 +0800 From: "Min Hu (Connor)" To: CC: Date: Sun, 13 Jun 2021 11:05:07 +0800 Message-ID: <1623553508-5478-4-git-send-email-humin29@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1623553508-5478-1-git-send-email-humin29@huawei.com> References: <1623553508-5478-1-git-send-email-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggeme756-chm.china.huawei.com (10.3.19.102) X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH 3/4] net/hns3: support multiple TC MAC pause X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Huisong Li MAC PAUSE can take effect on a single TC or multiple TCs, depending on the hardware. For example, the Kunpeng 920 supports MAC pause in a single TC, and the Kunpeng 930 supports MAC pause in multiple TCs. This patch supports MAC PAUSE in multiple TC for some hardware. Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_ethdev.c | 5 ++++- drivers/net/hns3/hns3_ethdev.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index e515125..17b995a 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -3317,6 +3317,7 @@ hns3_get_capability(struct hns3_hw *hw) pf->tqp_config_mode = HNS3_FIXED_MAX_TQP_NUM_MODE; hw->rss_info.ipv6_sctp_offload_supported = false; hw->udp_cksum_mode = HNS3_SPECIAL_PORT_SW_CKSUM_MODE; + pf->support_multi_tc_pause = false; return 0; } @@ -3337,6 +3338,7 @@ hns3_get_capability(struct hns3_hw *hw) pf->tqp_config_mode = HNS3_FLEX_MAX_TQP_NUM_MODE; hw->rss_info.ipv6_sctp_offload_supported = true; hw->udp_cksum_mode = HNS3_SPECIAL_PORT_HW_CKSUM_MODE; + pf->support_multi_tc_pause = true; return 0; } @@ -6103,6 +6105,7 @@ static int hns3_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) { struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct hns3_pf *pf = HNS3_DEV_PRIVATE_TO_PF(dev->data->dev_private); int ret; if (fc_conf->high_water || fc_conf->low_water || @@ -6132,7 +6135,7 @@ hns3_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) return -EOPNOTSUPP; } - if (hw->num_tc > 1) { + if (hw->num_tc > 1 && !pf->support_multi_tc_pause) { hns3_err(hw, "in multi-TC scenarios, MAC pause is not supported."); return -EOPNOTSUPP; } diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index b8347c2..5f448af 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -783,6 +783,7 @@ struct hns3_pf { uint8_t prio_tc[HNS3_MAX_USER_PRIO]; /* TC indexed by prio */ uint16_t pause_time; bool support_fc_autoneg; /* support FC autonegotiate */ + bool support_multi_tc_pause; uint16_t wanted_umv_size; uint16_t max_umv_size; From patchwork Sun Jun 13 03:05:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 94156 X-Patchwork-Delegate: andrew.rybchenko@oktetlabs.ru Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4E9E1A0C40; Sun, 13 Jun 2021 05:05:53 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5E9D941102; Sun, 13 Jun 2021 05:05:38 +0200 (CEST) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id 44E504003F for ; Sun, 13 Jun 2021 05:05:33 +0200 (CEST) Received: from dggeme756-chm.china.huawei.com (unknown [172.30.72.56]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4G2fWy4v4jzZgXY for ; Sun, 13 Jun 2021 11:02:38 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by dggeme756-chm.china.huawei.com (10.3.19.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Sun, 13 Jun 2021 11:05:31 +0800 From: "Min Hu (Connor)" To: CC: Date: Sun, 13 Jun 2021 11:05:08 +0800 Message-ID: <1623553508-5478-5-git-send-email-humin29@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1623553508-5478-1-git-send-email-humin29@huawei.com> References: <1623553508-5478-1-git-send-email-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggeme756-chm.china.huawei.com (10.3.19.102) X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH 4/4] net/hns3: supports disabling PFC by dev configure API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Huisong Li If "dcb_capability_en" in "data->dev_conf" delivered from the dev_configure does not have the ETH_DCB_PFC_SUPPORT flag, the user wants to disable PFC, and only enable ETS. Therefore, this patch supports the function of disabling PFC by the field. In addition, this patch updates "current_fc_status" of the driver based on the flow control mode requested by user so as to enable the flow control mode in multi-TC scenarios. Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_dcb.c | 61 +++++++++++++++++++++++------------------- drivers/net/hns3/hns3_ethdev.h | 1 + 2 files changed, 34 insertions(+), 28 deletions(-) diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c index 90c0d04..234a3e8 100644 --- a/drivers/net/hns3/hns3_dcb.c +++ b/drivers/net/hns3/hns3_dcb.c @@ -1427,10 +1427,12 @@ hns3_dcb_cfg_validate(struct hns3_adapter *hns, uint8_t *tc, bool *changed) * We ensure that dcb information can be reconfigured * after the hns3_priority_flow_ctrl_set function called. */ - if (hw->requested_fc_mode != HNS3_FC_FULL) + if (hw->requested_fc_mode != HNS3_FC_FULL || + hw->requested_fc_mode != HNS3_FC_NONE) *changed = true; pfc_en = RTE_LEN2MASK((uint8_t)dcb_rx_conf->nb_tcs, uint8_t); - if (hw->dcb_info.pfc_en != pfc_en) + if (hw->dcb_info.pfc_en != pfc_en || hw->dcb_info.dcb_capability_en != + hw->data->dev_conf.dcb_capability_en) *changed = true; /* tx/rx queue number is reconfigured. */ @@ -1567,36 +1569,32 @@ hns3_dcb_hw_configure(struct hns3_adapter *hns) hw->dcb_info.hw_pfc_map = hns3_dcb_undrop_tc_map(hw, hw->dcb_info.pfc_en); - ret = hns3_buffer_alloc(hw); - if (ret) - goto buffer_alloc_fail; - hw->current_fc_status = HNS3_FC_STATUS_PFC; hw->requested_fc_mode = HNS3_FC_FULL; - ret = hns3_dcb_pause_setup_hw(hw); - if (ret) { - hns3_err(hw, "setup pfc failed! ret = %d", ret); - goto pfc_setup_fail; - } } else { - /* - * Although dcb_capability_en is lack of ETH_DCB_PFC_SUPPORT - * flag, the DCB information is configured, such as tc numbers. - * Therefore, refreshing the allocation of packet buffer is - * necessary. - */ - ret = hns3_buffer_alloc(hw); - if (ret) - return ret; + hw->current_fc_status = HNS3_FC_STATUS_NONE; + hw->requested_fc_mode = HNS3_FC_NONE; + hw->dcb_info.pfc_en = 0; + hw->dcb_info.hw_pfc_map = 0; } + ret = hns3_buffer_alloc(hw); + if (ret) + goto cfg_fail; + + ret = hns3_dcb_pause_setup_hw(hw); + if (ret) { + hns3_err(hw, "setup pfc failed! ret = %d", ret); + goto cfg_fail; + } + + hw->dcb_info.dcb_capability_en = hw->data->dev_conf.dcb_capability_en; + return 0; -pfc_setup_fail: +cfg_fail: hw->requested_fc_mode = requested_fc_mode; hw->current_fc_status = fc_status; - -buffer_alloc_fail: hw->dcb_info.pfc_en = pfc_en; hw->dcb_info.hw_pfc_map = hw_pfc_map; @@ -1781,15 +1779,21 @@ hns3_dcb_pfc_enable(struct rte_eth_dev *dev, struct rte_eth_pfc_conf *pfc_conf) uint16_t pause_time = pf->pause_time; int ret; - pf->pause_time = pfc_conf->fc.pause_time; - hns3_get_fc_mode(hw, pfc_conf->fc.mode); - hw->current_fc_status = HNS3_FC_STATUS_PFC; hw->dcb_info.pfc_en |= BIT(priority); hw->dcb_info.hw_pfc_map = hns3_dcb_undrop_tc_map(hw, hw->dcb_info.pfc_en); ret = hns3_buffer_alloc(hw); - if (ret) - goto pfc_setup_fail; + if (ret) { + hns3_err(hw, "update packet buffer failed, ret = %d", ret); + goto buffer_alloc_fail; + } + + pf->pause_time = pfc_conf->fc.pause_time; + hns3_get_fc_mode(hw, pfc_conf->fc.mode); + if (hw->requested_fc_mode == HNS3_FC_NONE) + hw->current_fc_status = HNS3_FC_STATUS_NONE; + else + hw->current_fc_status = HNS3_FC_STATUS_PFC; /* * The flow control mode of all UPs will be changed based on @@ -1807,6 +1811,7 @@ hns3_dcb_pfc_enable(struct rte_eth_dev *dev, struct rte_eth_pfc_conf *pfc_conf) hw->requested_fc_mode = old_fc_mode; hw->current_fc_status = fc_status; pf->pause_time = pause_time; +buffer_alloc_fail: hw->dcb_info.pfc_en = pfc_en; hw->dcb_info.hw_pfc_map = hw_pfc_map; diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index 5f448af..7ff8762 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -139,6 +139,7 @@ struct hns3_dcb_info { struct hns3_tc_info tc_info[HNS3_MAX_TC_NUM]; uint8_t hw_pfc_map; /* Allow for packet drop or not on this TC */ uint8_t pfc_en; /* Pfc enabled or not for user priority */ + uint32_t dcb_capability_en; }; enum hns3_fc_status {