From patchwork Sat May 8 03:11:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alvin Zhang X-Patchwork-Id: 93053 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3ADBDA0A02; Sat, 8 May 2021 05:11:38 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2465A40140; Sat, 8 May 2021 05:11:38 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 9483D4013F for ; Sat, 8 May 2021 05:11:36 +0200 (CEST) IronPort-SDR: zgaS9bzO+dfCWJTqs7oHKO/8RC91v6bZZEWOD+8Yk2yH3ZLvB1ppDAYK5VxzTJE7XaxfSC4S9W lZXjhdH8Km+Q== X-IronPort-AV: E=McAfee;i="6200,9189,9977"; a="196847916" X-IronPort-AV: E=Sophos;i="5.82,282,1613462400"; d="scan'208";a="196847916" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 May 2021 20:11:34 -0700 IronPort-SDR: OxDvTea05bgQgvrQQgkBvYtzNvG7ghEPRUd1Dpv1THpmDEYKir4Iug82RSZBzbIIFeRhZyHIwY IxxYZCMj9sNA== X-IronPort-AV: E=Sophos;i="5.82,282,1613462400"; d="scan'208";a="453325081" Received: from shwdenpg235.ccr.corp.intel.com ([10.240.182.60]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 May 2021 20:11:32 -0700 From: Alvin Zhang To: qi.z.zhang@intel.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, Alvin Zhang Date: Sat, 8 May 2021 11:11:28 +0800 Message-Id: <20210508031128.17352-1-alvinx.zhang@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210508012032.14860-1-alvinx.zhang@intel.com> References: <20210508012032.14860-1-alvinx.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3] net/ice: fix txq vector path selection X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" If vector mode is not allowed for Tx, no need to perform vector related setup for Tx queue. The patch deferred vector setup for Tx queue to the place that vector mode is confirmed to be allowed. Fixes: 28f9002ab67f ("net/ice: add Tx AVX512 offload path") Signed-off-by: Alvin Zhang Acked-by: Qi Zhang --- v2,v3: Update commit log. --- drivers/net/ice/ice_rxtx.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index 92fbbc1..49abcb2 100644 --- a/drivers/net/ice/ice_rxtx.c +++ b/drivers/net/ice/ice_rxtx.c @@ -3303,13 +3303,6 @@ if (tx_check_ret >= 0 && rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { ad->tx_vec_allowed = true; - for (i = 0; i < dev->data->nb_tx_queues; i++) { - txq = dev->data->tx_queues[i]; - if (txq && ice_txq_vec_setup(txq)) { - ad->tx_vec_allowed = false; - break; - } - } if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 && @@ -3329,6 +3322,15 @@ if (!use_avx512 && tx_check_ret == ICE_VECTOR_OFFLOAD_PATH) ad->tx_vec_allowed = false; + if (ad->tx_vec_allowed) { + for (i = 0; i < dev->data->nb_tx_queues; i++) { + txq = dev->data->tx_queues[i]; + if (txq && ice_txq_vec_setup(txq)) { + ad->tx_vec_allowed = false; + break; + } + } + } } else { ad->tx_vec_allowed = false; }