From patchwork Wed Apr 21 03:44:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Murphy Yang X-Patchwork-Id: 91910 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 30A85A0548; Wed, 21 Apr 2021 05:53:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AFDD4418DB; Wed, 21 Apr 2021 05:53:02 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 811BF418AA for ; Wed, 21 Apr 2021 05:53:00 +0200 (CEST) IronPort-SDR: G57XBYU1okcdodJStTWVBoYgAutN5tHpIB7qjjqsRz4TcA+L426KNw990fkXKRmmE98k/WNSYO sg8BaJX38B2A== X-IronPort-AV: E=McAfee;i="6200,9189,9960"; a="175740811" X-IronPort-AV: E=Sophos;i="5.82,238,1613462400"; d="scan'208";a="175740811" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2021 20:52:59 -0700 IronPort-SDR: 67vNm4+nMZWgOVPDQgmAkk9RxcClWLzSTHtntu23Z8ZTGnkl4UFHYvPjvREfA+xEAP/7jgT9kY zJMTLCe4lzUw== X-IronPort-AV: E=Sophos;i="5.82,238,1613462400"; d="scan'208";a="420829789" Received: from unknown (HELO intel-npg-odc-srv02.cd.intel.com) ([10.240.178.186]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2021 20:52:55 -0700 From: Murphy Yang To: dev@dpdk.org Cc: qiming.yang@intel.com, jia.guo@intel.com, beilei.xing@intel.com, stevex.yang@intel.com, robinx.zhang@intel.com, Murphy Yang Date: Wed, 21 Apr 2021 03:44:03 +0000 Message-Id: <20210421034403.8894-1-murphyx.yang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210421020830.4989-1-murphyx.yang@intel.com> References: <20210421020830.4989-1-murphyx.yang@intel.com> Subject: [dpdk-dev] [PATCH v3] net/i40e: fix FDIR issue for common PCTYPEs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Currently, FDIR doesn't work for all common PCTYPEs, the root cause is that input set is not configured. Fixes: 4a072ad43442 ("net/i40e: fix flow director config after flow validate") Signed-off-by: Murphy Yang Acked-by: Beilei Xing --- drivers/net/i40e/i40e_fdir.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c index da089baa4d..ed1c60af99 100644 --- a/drivers/net/i40e/i40e_fdir.c +++ b/drivers/net/i40e/i40e_fdir.c @@ -1607,8 +1607,10 @@ i40e_flow_set_fdir_inset(struct i40e_pf *pf, /* Check if the configuration is conflicted */ if (pf->fdir.inset_flag[pctype] && - memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t))) - return -1; + memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t))) { + PMD_DRV_LOG(ERR, "Conflict with the first rule's input set."); + return -EINVAL; + } if (pf->fdir.inset_flag[pctype] && !memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t))) @@ -1616,8 +1618,10 @@ i40e_flow_set_fdir_inset(struct i40e_pf *pf, num = i40e_generate_inset_mask_reg(hw, input_set, mask_reg, I40E_INSET_MASK_NUM_REG); - if (num < 0) + if (num < 0) { + PMD_DRV_LOG(ERR, "Invalid pattern mask."); return -EINVAL; + } if (pf->support_multi_driver) { for (i = 0; i < num; i++) @@ -1762,18 +1766,15 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, i40e_fdir_filter_convert(filter, &check_filter); if (add) { - if (filter->input.flow_ext.is_flex_flow) { + /* configure the input set for common PCTYPEs*/ + if (!filter->input.flow_ext.customized_pctype) { ret = i40e_flow_set_fdir_inset(pf, pctype, filter->input.flow_ext.input_set); - if (ret == -1) { - PMD_DRV_LOG(ERR, "Conflict with the" - " first rule's input set."); - return -EINVAL; - } else if (ret == -EINVAL) { - PMD_DRV_LOG(ERR, "Invalid pattern mask."); - return -EINVAL; - } + if (ret < 0) + return ret; + } + if (filter->input.flow_ext.is_flex_flow) { for (i = 0; i < filter->input.flow_ext.raw_id; i++) { layer_idx = filter->input.flow_ext.layer_idx; field_idx = layer_idx * I40E_MAX_FLXPLD_FIED + i;