From patchwork Fri Apr 9 08:06:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Radha Chintakuntla X-Patchwork-Id: 90950 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2A9CAA0579; Fri, 9 Apr 2021 10:06:41 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DB1AC141395; Fri, 9 Apr 2021 10:06:40 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 76995141394 for ; Fri, 9 Apr 2021 10:06:39 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 13985t6t032216; Fri, 9 Apr 2021 01:06:38 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=wcmgDj+D2myDcODiOss265T5X0TA82U2in0FMAEcGic=; b=VTzSt1HSAr0ArfibFKvjDzRHfZmOeXNYZRbYhx0CeU7CfdHj0eUrc2W2Ef0j4Stg57fx mnpftMz52d+oOEaw7TzxBCyvnTkhiyJmTPY5/0n6wFf+wEjsq+938+TvhSSlRn5ODwQP /MVgbxF64qbK1ha2H5YdDjc5KtGT+57t0OE7yaaMewBSMNK3sS4DECMA+Ui1G+vnGTod azdAOMwEzAWlGayOM/8FDKPa2cVBxAy5b87c464F0lUINUbfYwJ383X0mKu22oKYUQ1K MIMMsJEzLn8DTJS5zQk0fPldPrbYDP8dk6JxKoaHsBughsIkO8OU48l2G+D4w6EZOiTu Dw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 37swewm7vt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 09 Apr 2021 01:06:38 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 9 Apr 2021 01:06:37 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 9 Apr 2021 01:06:36 -0700 Received: from rchin-dellt430.marvell.com (rchin-dellt430.marvell.com [10.85.176.141]) by maili.marvell.com (Postfix) with ESMTP id 73E403F703F; Fri, 9 Apr 2021 01:06:36 -0700 (PDT) From: Radha Mohan Chintakuntla To: , CC: , Radha Mohan Chintakuntla Date: Fri, 9 Apr 2021 01:06:27 -0700 Message-ID: <20210409080627.123195-1-radhac@marvell.com> X-Mailer: git-send-email 2.24.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: QQ1fznzwxSrkSHXne9Q3_O-J-oHws8R3 X-Proofpoint-GUID: QQ1fznzwxSrkSHXne9Q3_O-J-oHws8R3 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-09_04:2021-04-08, 2021-04-09 signatures=0 Subject: [dpdk-dev] [PATCH v2] raw/octeontx2_dma: fix unavailable PCI device in dpivf X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The PCI device address is being used for sending mailbox which was introduced in previous commit which replaced the macros so that multiple DPI blocks in the hardware can be supported. This patch fixes a NULL pointer access by assigning the PCI device structure to dpivf. Fixes: 4495bd887d38 ("raw/octeontx2_dma: support multiple DPI blocks") Signed-off-by: Radha Mohan Chintakuntla --- drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c index efdba2779b..8c01f25ec7 100644 --- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c +++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c @@ -389,6 +389,7 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv __rte_unused, vf_id = ((pci_dev->addr.devid & 0x1F) << 3) | (pci_dev->addr.function & 0x7); vf_id -= 1; + dpivf->dev = pci_dev; dpivf->state = DPI_QUEUE_START; dpivf->vf_id = vf_id; dpivf->vf_bar0 = (uintptr_t)pci_dev->mem_resource[0].addr;