From patchwork Mon Mar 22 16:26:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawei Zhu <17826875952@163.com> X-Patchwork-Id: 89701 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D8D26A0562; Tue, 23 Mar 2021 14:16:42 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 52EB34069E; Tue, 23 Mar 2021 14:16:42 +0100 (CET) Received: from m12-13.163.com (m12-13.163.com [220.181.12.13]) by mails.dpdk.org (Postfix) with ESMTP id 96D5440689 for ; Tue, 23 Mar 2021 14:16:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id; bh=noB26coH4VKTxBZiav +MuFjbxVV6/Co4E/2Dgz5N0hk=; b=MtR6MEkI8LUCrNHt4gK3FKCE3EV0ou4sNU hYhrdbRgryApvmRrB//o0SkZWka5aVrGqCBpG6Esc3wSMWS8VDluvYu5nLeCDUHl 8t8iZkDST4riykKrB208vqJuZ+JfvCrG1URKU55u6wCDYfrONkS6rEwo7k8Pl7ax opsblqlXY= Received: from localhost.localdomain.localdomain (unknown [120.234.130.204]) by smtp9 (Coremail) with SMTP id DcCowAA3ro4y6llgvyl3Cg--.13033S2; Tue, 23 Mar 2021 21:16:36 +0800 (CST) From: Jiawei Zhu <17826875952@163.com> To: dev@dpdk.org Cc: zhujiawei12@huawei.com, matan@nvidia.com, shahafs@nvidia.com, viacheslavo@nvidia.com Date: Mon, 22 Mar 2021 12:26:11 -0400 Message-Id: <1616430371-3810-1-git-send-email-17826875952@163.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1616427966-3481-1-git-send-email-17826875952@163.com> References: <1616427966-3481-1-git-send-email-17826875952@163.com> X-CM-TRANSID: DcCowAA3ro4y6llgvyl3Cg--.13033S2 X-Coremail-Antispam: 1Uf129KBjvJXoW7trW8trWrGF18uw47KF17Jrb_yoW8Cr4rpF 4akry3XFyUJFW5Ww40va1rZ3y5GwsayrWjkry7Kwn8Wr9rWa4UWr4rGayfZryDKFZ7CryU tF4jywnxGF95XFUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07bFXo7UUUUU= X-Originating-IP: [120.234.130.204] X-CM-SenderInfo: bprxmjywyxkmivs6il2tof0z/1tbirBBe9lr7sul4wwAAsV Subject: [dpdk-dev] [PATCH] net/mlx5: add Rx checksum offload flag return bad X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jiawei Zhu When open the rx checksum offload and receive the wrong checksum, add the ol_flags return bad. And it's not best to use multiplication and division here. Signed-off-by: Jiawei Zhu --- drivers/net/mlx5/mlx5_rxtx.c | 17 ++++++++++------- drivers/net/mlx5/mlx5_utils.h | 6 ------ 2 files changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index e3ce9fd..dcc0ebc 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -1325,13 +1325,16 @@ enum mlx5_txcmp_code { uint32_t ol_flags = 0; uint16_t flags = rte_be_to_cpu_16(cqe->hdr_type_etc); - ol_flags = - TRANSPOSE(flags, - MLX5_CQE_RX_L3_HDR_VALID, - PKT_RX_IP_CKSUM_GOOD) | - TRANSPOSE(flags, - MLX5_CQE_RX_L4_HDR_VALID, - PKT_RX_L4_CKSUM_GOOD); + if (flags & MLX5_CQE_RX_L3_HDR_VALID) + ol_flags |= PKT_RX_IP_CKSUM_GOOD; + else + ol_flags |= PKT_RX_IP_CKSUM_BAD; + + if (flags & MLX5_CQE_RX_L4_HDR_VALID) + ol_flags |= PKT_RX_L4_CKSUM_GOOD; + else + ol_flags |= PKT_RX_L4_CKSUM_BAD; + return ol_flags; } diff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h index 7a62187..2f71a23 100644 --- a/drivers/net/mlx5/mlx5_utils.h +++ b/drivers/net/mlx5/mlx5_utils.h @@ -44,12 +44,6 @@ #define NB_SEGS(m) ((m)->nb_segs) #define PORT(m) ((m)->port) -/* Transpose flags. Useful to convert IBV to DPDK flags. */ -#define TRANSPOSE(val, from, to) \ - (((from) >= (to)) ? \ - (((val) & (from)) / ((from) / (to))) : \ - (((val) & (from)) * ((to) / (from)))) - /* * For the case which data is linked with sequence increased index, the * array table will be more efficiect than hash table once need to serarch