From patchwork Wed Feb 3 14:03:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 87693 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 00EAAA0A0E; Wed, 3 Feb 2021 15:04:13 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 64F4E2405CC; Wed, 3 Feb 2021 15:04:05 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by mails.dpdk.org (Postfix) with ESMTP id EE4DB2405B6 for ; Wed, 3 Feb 2021 15:04:02 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id BA8F1C05A8; Wed, 3 Feb 2021 15:04:00 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id MFJke3NnlOBS; Wed, 3 Feb 2021 15:03:59 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id A8706BFD90; Wed, 3 Feb 2021 15:03:58 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, aboyer@pensando.io Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Wed, 3 Feb 2021 15:03:55 +0100 Message-Id: <1612361037-12746-2-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612361037-12746-1-git-send-email-juraj.linkes@pantheon.tech> References: <1610717170-31279-1-git-send-email-juraj.linkes@pantheon.tech> <1612361037-12746-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v16 1/3] build: disable/enable drivers in Arm builds X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for enabling or disabling drivers for Arm cross build. Do not implement any enable/disable lists yet. Enabling drivers is useful when building for an SoC where we only want to build a few drivers. That way the list won't be too long. Similarly, disabling drivers is useful when we want to disable only a few drivers. Both of these are advantageous mainly in aarch64 -> aarch64 (or arch -> same arch) builds, where the build machine may have the required driver dependencies, yet we don't want to build drivers for a speficic SoC. By default, build all drivers for which dependencies are found. If enabled_drivers is a non-empty list, build only those drivers. If disabled_drivers is non-empty list, build all drivers except those in disabled_drivers. Error out if both are specified (i.e. do not support that case). Remove the old Makefile arm configutaion options which don't do anything in Meson. Signed-off-by: Juraj Linkeš Acked-by: Bruce Richardson Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 4 -- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 8 ++++ drivers/meson.build | 41 ++++++++++++++++--- meson.build | 2 + 4 files changed, 46 insertions(+), 9 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index f948768578..d279724dec 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -16,9 +16,6 @@ flags_common = [ # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], - ['RTE_NET_FM10K', false], - ['RTE_NET_AVP', false], - ['RTE_SCHED_VECTOR', false], ['RTE_ARM_USE_WFE', false], ['RTE_ARCH_ARM64', true], @@ -125,7 +122,6 @@ implementer_cavium = { ['RTE_MACHINE', '"octeontx2"'], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_EAL_IGB_UIO', false], ['RTE_MAX_LCORE', 36], ['RTE_MAX_NUMA_NODES', 1] ] diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index faaf24b95b..1504dbfef0 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -234,3 +234,11 @@ There are other options you may specify in a cross file to tailor the build:: numa = false # set to false to force building for a non-NUMA system # if not set or set to true, the build system will build for a NUMA # system only if libnuma is installed + + disabled_drivers = ['bus/dpaa', 'crypto/*'] # add disabled drivers + # valid values are dir/subdirs in the drivers directory + # wildcards are allowed + + enabled_drivers = ['common/*', 'bus/*'] # build only these drivers + # valid values are dir/subdirs in the drivers directory + # wildcards are allowed diff --git a/drivers/meson.build b/drivers/meson.build index fdf76120ac..70c1aa4e6c 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -18,8 +18,36 @@ subdirs = [ 'baseband', # depends on common and bus. ] -disabled_drivers = run_command(list_dir_globs, get_option('disable_drivers'), - ).stdout().split() +if meson.is_cross_build() + disabled_drivers += meson.get_cross_property('disabled_drivers', []) + enabled_drivers += meson.get_cross_property('enabled_drivers', []) +endif + +# add cmdline disabled drivers (comma separated string) +# and meson disabled drivers (list) +# together into a comma separated string +disabled_drivers = ','.join([get_option('disable_drivers'), ','.join(disabled_drivers)]).strip(',') +if disabled_drivers != '' + disabled_drivers = run_command(list_dir_globs, + disabled_drivers).stdout().split() +else + disabled_drivers = [] +endif + +if enabled_drivers != [] + enabled_drivers = run_command(list_dir_globs, + ','.join(enabled_drivers)).stdout().split() +endif + +if disabled_drivers != [] and enabled_drivers != [] + # TODO/QUERY we could support both: + # first 'select' only drivers by enabled_drivers + # then 'deselect' those in disabled_drivers + # this would be useful if a directory is in enabled_drivers + # and a driver from that directory is in disabled_drivers + error('Simultaneous disabled drivers and enabled drivers ' + + 'configuration is not supported.') +endif default_cflags = machine_args default_cflags += ['-DALLOW_EXPERIMENTAL_API'] @@ -48,7 +76,7 @@ foreach subpath:subdirs dpdk_driver_classes += class endif # get already enabled drivers of the same class - enabled_drivers = get_variable(class + '_drivers', []) + enabled_class_drivers = get_variable(class + '_drivers', []) foreach drv:drivers drv_path = join_paths(class, drv) @@ -76,6 +104,9 @@ foreach subpath:subdirs if disabled_drivers.contains(drv_path) build = false reason = 'explicitly disabled via build config' + elif enabled_drivers.length() > 0 and not enabled_drivers.contains(drv_path) + build = false + reason = 'not in enabled drivers build config' else # pull in driver directory which should update all the local variables subdir(drv_path) @@ -108,7 +139,7 @@ foreach subpath:subdirs '_disable_reason', reason) endif else - enabled_drivers += name + enabled_class_drivers += name lib_name = '_'.join(['rte', class, name]) dpdk_conf.set(lib_name.to_upper(), 1) @@ -213,5 +244,5 @@ foreach subpath:subdirs endif # build endforeach - set_variable(class + '_drivers', enabled_drivers) + set_variable(class + '_drivers', enabled_class_drivers) endforeach diff --git a/meson.build b/meson.build index fcc4d4c900..ea7ccfdae3 100644 --- a/meson.build +++ b/meson.build @@ -22,6 +22,8 @@ dpdk_drivers = [] dpdk_extra_ldflags = [] dpdk_libs_disabled = [] dpdk_drvs_disabled = [] +disabled_drivers = [] +enabled_drivers = [] abi_version_file = files('ABI_VERSION') if host_machine.cpu_family().startswith('x86') From patchwork Wed Feb 3 14:03:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 87694 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EE513A0A0E; Wed, 3 Feb 2021 15:04:23 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8681A2405D4; Wed, 3 Feb 2021 15:04:06 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by mails.dpdk.org (Postfix) with ESMTP id 4024B2405C9 for ; Wed, 3 Feb 2021 15:04:05 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 9C480BF479; Wed, 3 Feb 2021 15:04:03 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0SVK2oofZD4y; Wed, 3 Feb 2021 15:04:02 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 588A7BFD91; Wed, 3 Feb 2021 15:03:59 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, aboyer@pensando.io Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Wed, 3 Feb 2021 15:03:56 +0100 Message-Id: <1612361037-12746-3-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612361037-12746-1-git-send-email-juraj.linkes@pantheon.tech> References: <1610717170-31279-1-git-send-email-juraj.linkes@pantheon.tech> <1612361037-12746-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v16 2/3] build: add 'platform' meson option and Arm SoC config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add Arm SoC configuration sets to Arm meson.build and add an arch agnostic meson option, 'platform', to select from these SoC configurations for meson native builds. This is preferable to specifying a cross file when doing aarch64 -> aarch64 builds, since the cross file specifies the toolchain as well. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 6 +- config/arm/arm64_armv8_linux_clang_ubuntu1804 | 3 +- config/arm/arm64_armv8_linux_gcc | 5 +- config/arm/arm64_bluefield_linux_gcc | 6 +- config/arm/arm64_dpaa_linux_gcc | 6 +- config/arm/arm64_emag_linux_gcc | 5 +- config/arm/arm64_graviton2_linux_gcc | 6 +- config/arm/arm64_n1sdp_linux_gcc | 6 +- config/arm/arm64_n2_linux_gcc | 6 +- config/arm/arm64_octeontx2_linux_gcc | 6 +- config/arm/arm64_stingray_linux_gcc | 6 +- config/arm/arm64_thunderx2_linux_gcc | 5 +- config/arm/arm64_thunderxt88_linux_gcc | 5 +- config/arm/meson.build | 140 +++++++++++++++++- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 84 ++++------- meson_options.txt | 2 + 16 files changed, 179 insertions(+), 118 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 9958db6692..301418949b 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -14,8 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x56' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +platform = 'armada' diff --git a/config/arm/arm64_armv8_linux_clang_ubuntu1804 b/config/arm/arm64_armv8_linux_clang_ubuntu1804 index 8d8cc50ea4..db488d75f4 100644 --- a/config/arm/arm64_armv8_linux_clang_ubuntu1804 +++ b/config/arm/arm64_armv8_linux_clang_ubuntu1804 @@ -14,7 +14,6 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = 'generic' -part_number = 'default' +platform = 'generic' c_args = ['-target', 'aarch64-linux-gnu', '--sysroot', '/usr/aarch64-linux-gnu'] c_link_args = ['-target', 'aarch64-linux-gnu', '-fuse-ld=lld', '--gcc-toolchain=/usr'] diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 5451a01da1..5391d35389 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -14,7 +14,4 @@ endian = 'little' [properties] # Generate binaries that are portable across all Armv8 machines -implementer_id = 'generic' -part_number = 'generic' -max_lcores = 256 -max_numa_nodes = 4 +platform = 'generic' diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 6bef87fbd4..248a9f031a 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +platform = 'bluefield' diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 37398c7628..e9d5fd31fc 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -14,8 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = 'dpaa' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +platform = 'dpaa' diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 7cbb055106..9cdd931180 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -13,7 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x50' -part_number = '0x0' -max_lcores = 32 -max_numa_nodes = 1 +platform = 'emag' diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc index edacb79497..8016fd236c 100644 --- a/config/arm/arm64_graviton2_linux_gcc +++ b/config/arm/arm64_graviton2_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd0c' -max_lcores = 64 -max_numa_nodes = 1 -numa = false +platform = 'graviton2' diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index b00f2d1ef7..0df283e2f4 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd0c' -max_lcores = 4 -max_numa_nodes = 1 -numa = false +platform = 'n1sdp' diff --git a/config/arm/arm64_n2_linux_gcc b/config/arm/arm64_n2_linux_gcc index 817b8ee28e..036aee2b0a 100644 --- a/config/arm/arm64_n2_linux_gcc +++ b/config/arm/arm64_n2_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd49' -max_lcores = 64 -max_numa_nodes = 1 -numa = false +platform = 'n2' diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 5937697098..9156ee5410 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x43' -part_number = '0xb2' -max_lcores = 36 -max_numa_nodes = 1 -numa = false +platform = 'octeontx2' diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 6bef87fbd4..319a4a151d 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +platform = 'stingray' diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index c06dcdc2b3..69c71cbc82 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -13,7 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x43' -part_number = '0xaf' -max_lcores = 256 -max_numa_nodes = 2 +platform = 'thunderx2' diff --git a/config/arm/arm64_thunderxt88_linux_gcc b/config/arm/arm64_thunderxt88_linux_gcc index 3ba1528e48..372097ba01 100644 --- a/config/arm/arm64_thunderxt88_linux_gcc +++ b/config/arm/arm64_thunderxt88_linux_gcc @@ -13,7 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x43' -part_number = '0xa1' -max_lcores = 96 -max_numa_nodes = 1 +platform = 'thunderxt88' diff --git a/config/arm/meson.build b/config/arm/meson.build index d279724dec..c85d2ab005 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -25,7 +25,7 @@ flags_common = [ ## Part numbers are specific to Arm implementers # implementer specific aarch64 flags have middle priority # (will overwrite common flags) -# part number specific aarch64 flags have the highest priority +# part number specific aarch64 flags have higher priority # (will overwrite both common and implementer specific flags) implementer_generic = { 'description': 'Generic armv8', @@ -177,6 +177,106 @@ implementers = { 'dpaa': implementer_dpaa } +# soc specific aarch64 flags have the highest priority +# (will overwrite all other flags) +soc_generic = { + 'description': 'Generic un-optimized build for all aarch64 machines', + 'implementer': 'generic', + 'part_number': 'generic' +} + +soc_armada = { + 'description': 'Marvell ARMADA', + 'implementer': '0x56', + 'part_number': '0xd08', + 'numa': false +} + +soc_bluefield = { + 'description': 'NVIDIA BlueField', + 'implementer': '0x41', + 'part_number': '0xd08', + 'numa': false +} + +soc_dpaa = { + 'description': 'NXP DPAA', + 'implementer': 'dpaa', + 'part_number': '0xd08', + 'numa': false +} + +soc_emag = { + 'description': 'Ampere eMAG', + 'implementer': '0x50', + 'part_number': '0x0' +} + +soc_graviton2 = { + 'description': 'AWS Graviton2', + 'implementer': '0x41', + 'part_number': '0xd0c', + 'numa': false +} + +soc_n1sdp = { + 'description': 'Arm Neoverse N1SDP', + 'implementer': '0x41', + 'part_number': '0xd0c', + 'flags': [ + ['RTE_MAX_LCORE', 4] + ], + 'numa': false +} + +soc_n2 = { + 'description': 'Arm Neoverse N2', + 'implementer': '0x41', + 'part_number': '0xd49', + 'numa': false +} + +soc_octeontx2 = { + 'description': 'Marvell OCTEON TX2', + 'implementer': '0x43', + 'part_number': '0xb2', + 'numa': false +} + +soc_stingray = { + 'description': 'Broadcom Stingray', + 'implementer': '0x41', + 'part_number': '0xd08', + 'numa': false +} + +soc_thunderx2 = { + 'description': 'Marvell ThunderX2 T99', + 'implementer': '0x43', + 'part_number': '0xaf' +} + +soc_thunderxt88 = { + 'description': 'Marvell ThunderX T88', + 'implementer': '0x43', + 'part_number': '0xa1' +} + +socs = { + 'generic': soc_generic, + 'armada': soc_armada, + 'bluefield': soc_bluefield, + 'dpaa': soc_dpaa, + 'emag': soc_emag, + 'graviton2': soc_graviton2, + 'n1sdp': soc_n1sdp, + 'n2': soc_n2, + 'octeontx2': soc_octeontx2, + 'stingray': soc_stingray, + 'thunderx2': soc_thunderx2, + 'thunderxt88': soc_thunderxt88 +} + dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) @@ -188,11 +288,19 @@ if dpdk_conf.get('RTE_ARCH_32') machine_args += '-mfpu=neon' else # aarch64 build + soc = get_option('platform') + soc_config = {} if not meson.is_cross_build() if machine == 'default' # default build + if soc != '' + error('Building for a particular platform is ' + + 'unsupported with default build.') + endif implementer_id = 'generic' part_number = 'generic' + elif soc != '' + soc_config = socs.get(soc, {'not_supported': true}) else # native build # The script returns ['Implementer', 'Variant', 'Architecture', @@ -210,8 +318,30 @@ else endif else # cross build - implementer_id = meson.get_cross_property('implementer_id') - part_number = meson.get_cross_property('part_number') + soc = meson.get_cross_property('platform', '') + if soc == '' + error('Arm SoC must be specified in the cross file.') + endif + soc_config = socs.get(soc, {'not_supported': true}) + endif + + soc_flags = [] + if soc_config.has_key('not_supported') + error('SoC @0@ not supported.'.format(soc)) + elif soc_config != {} + implementer_id = soc_config['implementer'] + implementer_config = implementers[implementer_id] + part_number = soc_config['part_number'] + soc_flags = soc_config.get('flags', []) + if not soc_config.get('numa', true) + has_libnuma = 0 + endif + if soc_config.has_key('disabled_drivers') + disabled_drivers += soc_config['disabled_drivers'] + endif + if soc_config.has_key('enabled_drivers') + enabled_drivers += soc_config['enabled_drivers'] + endif endif if implementers.has_key(implementer_id) @@ -237,8 +367,8 @@ else '(-Dmachine=generic) build.') endif - # use default flags with implementer flags - dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + # add/overwrite flags in the proper order + dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + soc_flags # apply supported machine args machine_args = [] # Clear previous machine args diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 1504dbfef0..fb01f3020c 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -187,58 +187,32 @@ Use the following command to cross-compile DPDK for the target machine:: meson aarch64-build-clang --cross-file config/arm/arm64_armv8_linux_clang_ubuntu1804 ninja -C aarch64-build-clang -Supported cross-compilation targets ------------------------------------ - -If you wish to build for a target which is not among the current cross-files, -you may use various combinations of implementer/part number:: - - Supported implementers: - 'generic': Generic armv8 - '0x41': Arm - '0x43': Cavium - '0x50': Ampere Computing - '0x56': Marvell ARMADA - 'dpaa': NXP DPAA - - Supported part_numbers for generic: - 'generic': valid for all armv8-a architectures (unoptimized portable build) - - Supported part_numbers for 0x41, 0x56, dpaa: - '0xd03': cortex-a53 - '0xd04': cortex-a35 - '0xd09': cortex-a73 - '0xd0a': cortex-a75 - '0xd0b': cortex-a76 - '0xd0c': neoverse-n1 - - Supported part_numbers for 0x43: - '0xa1': thunderxt88 - '0xa2': thunderxt81 - '0xa3': thunderxt83 - '0xaf': thunderx2t99 - '0xb2': octeontx2 - - Supported part_numbers for 0x50: - '0x0': emag - -Other cross file options ------------------------- - -There are other options you may specify in a cross file to tailor the build:: - - Supported extra configuration - max_numa_nodes = n # will set RTE_MAX_NUMA_NODES - max_lcores = n # will set RTE_MAX_LCORE - - numa = false # set to false to force building for a non-NUMA system - # if not set or set to true, the build system will build for a NUMA - # system only if libnuma is installed - - disabled_drivers = ['bus/dpaa', 'crypto/*'] # add disabled drivers - # valid values are dir/subdirs in the drivers directory - # wildcards are allowed - - enabled_drivers = ['common/*', 'bus/*'] # build only these drivers - # valid values are dir/subdirs in the drivers directory - # wildcards are allowed +Building for an aarch64 SoC on an aarch64 build machine +------------------------------------------------------- + +If you wish to build on an aarch64 build machine for a different aarch64 SoC, +you don't need a separate cross toolchain, just a different set of +configuration options. To build for an aarch64 SoC, use the -Dplatform meson +option:: + + meson soc_build -Dplatform= + +Substitute with one of the supported SoCs:: + + generic: Generic un-optimized build for all aarch64 machines. + armada: Marvell ARMADA + bluefield: NVIDIA BlueField + dpaa: NXP DPAA + emag: Ampere eMAG + graviton2: AWS Graviton2 + n1sdp: Arm Neoverse N1SDP + octeontx2: Marvell OCTEON TX2 + stingray: Broadcom Stingray + thunderx2: Marvell ThunderX2 T99 + thunderxt88: Marvell ThunderX T88 + +These SoCs are also used in cross files, e.g.:: + + [properties] + # Generate binaries that are portable across all Armv8 machines + platform = 'generic' diff --git a/meson_options.txt b/meson_options.txt index 5c382487da..3b8efa5a27 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -28,6 +28,8 @@ option('max_lcores', type: 'integer', value: 128, description: 'maximum number of cores/threads supported by EAL') option('max_numa_nodes', type: 'integer', value: 4, description: 'maximum number of NUMA nodes supported by EAL') +option('platform', type: 'string', value: '', + description: 'Use configuration for a particular platform (such as an Arm SoC).') option('enable_trace_fp', type: 'boolean', value: false, description: 'enable fast path trace points.') option('tests', type: 'boolean', value: true, From patchwork Wed Feb 3 14:03:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 87695 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2769EA0A0E; Wed, 3 Feb 2021 15:04:38 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C0BE62405DC; Wed, 3 Feb 2021 15:04:07 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by mails.dpdk.org (Postfix) with ESMTP id 848862405CF for ; Wed, 3 Feb 2021 15:04:05 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id B36CDBFD90; Wed, 3 Feb 2021 15:04:03 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ujphkoa93ppx; Wed, 3 Feb 2021 15:04:02 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 35656C05A6; Wed, 3 Feb 2021 15:04:00 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, aboyer@pensando.io Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= , lironh@marvell.com, yskoh@mellanox.com Date: Wed, 3 Feb 2021 15:03:57 +0100 Message-Id: <1612361037-12746-4-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612361037-12746-1-git-send-email-juraj.linkes@pantheon.tech> References: <1610717170-31279-1-git-send-email-juraj.linkes@pantheon.tech> <1612361037-12746-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v16 3/3] config: fix Arm implementer and its SoCs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Fix the implementer and part number of DPAA and ARMADA SoCs. The current values of 16 cores and 1 NUMA node don't cover all SoCs from the Arm implementer, e.g. Taishan 2280 has 64 cores and 4 NUMA nodes. Increase these to 64 and 4 to widen the coverage. Add configuration to SoC options where smaller values are needed. Fixes: 6ec78c2463ac ("build: add meson support for dpaaX platforms") Cc: hemant.agrawal@nxp.com Fixes: dd1cd845c102 ("config: add Marvell ARMADA based on armv8-a") Cc: lironh@marvell.com Fixes: d97108a33231 ("config: change defaults of armv8") Cc: yskoh@mellanox.com Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli Reviewed-by: Liron Himi Acked-by: Pavan Nikhilesh Acked-by: Viacheslav Ovsiienko --- config/arm/meson.build | 60 +++++++++++++++++++----------------------- 1 file changed, 27 insertions(+), 33 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index c85d2ab005..1727c9def7 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -56,7 +56,8 @@ part_number_config_arm = { ['RTE_MACHINE', '"neoverse-n1"'], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_MAX_MEM_MB', 1048576], - ['RTE_MAX_LCORE', 80] + ['RTE_MAX_LCORE', 80], + ['RTE_MAX_NUMA_NODES', 1] ] }, '0xd49': { @@ -64,7 +65,8 @@ part_number_config_arm = { 'flags': [ ['RTE_MACHINE', '"neoverse-n2"'], ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_MAX_LCORE', 64] + ['RTE_MAX_LCORE', 64], + ['RTE_MAX_NUMA_NODES', 1] ] } } @@ -74,8 +76,8 @@ implementer_arm = { ['RTE_MACHINE', '"armv8a"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] + ['RTE_MAX_LCORE', 64], + ['RTE_MAX_NUMA_NODES', 4] ], 'part_number_config': part_number_config_arm } @@ -143,38 +145,12 @@ implementer_ampere = { } } -implementer_marvell = { - 'description': 'Marvell ARMADA', - 'flags': [ - ['RTE_MACHINE', '"armv8a"'], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] - ], - 'part_number_config': part_number_config_arm -} - -implementer_dpaa = { - 'description': 'NXP DPAA', - 'flags': [ - ['RTE_MACHINE', '"dpaa"'], - ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] - ], - 'part_number_config': part_number_config_arm -} - ## Arm implementers (ID from MIDR in Arm Architecture Reference Manual) implementers = { 'generic': implementer_generic, '0x41': implementer_arm, '0x43': implementer_cavium, - '0x50': implementer_ampere, - '0x56': implementer_marvell, - 'dpaa': implementer_dpaa + '0x50': implementer_ampere } # soc specific aarch64 flags have the highest priority @@ -187,8 +163,12 @@ soc_generic = { soc_armada = { 'description': 'Marvell ARMADA', - 'implementer': '0x56', + 'implementer': '0x41', 'part_number': '0xd08', + 'flags': [ + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'numa': false } @@ -196,13 +176,23 @@ soc_bluefield = { 'description': 'NVIDIA BlueField', 'implementer': '0x41', 'part_number': '0xd08', + 'flags': [ + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'numa': false } soc_dpaa = { 'description': 'NXP DPAA', - 'implementer': 'dpaa', + 'implementer': '0x41', 'part_number': '0xd08', + 'flags': [ + ['RTE_MACHINE', '"dpaa"'], + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'numa': false } @@ -246,6 +236,10 @@ soc_octeontx2 = { soc_stingray = { 'description': 'Broadcom Stingray', 'implementer': '0x41', + 'flags': [ + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'part_number': '0xd08', 'numa': false }