From patchwork Fri Nov 20 12:08:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84422 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A5638A04DD; Fri, 20 Nov 2020 13:08:51 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0D715C900; Fri, 20 Nov 2020 13:08:35 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 7CE9DC8DC for ; Fri, 20 Nov 2020 13:08:29 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 728AFBA24E; Fri, 20 Nov 2020 13:08:27 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id H6ghO72VXEUG; Fri, 20 Nov 2020 13:08:25 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id EC2BDB9B55; Fri, 20 Nov 2020 13:08:24 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:10 +0100 Message-Id: <1605874101-30893-2-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 01/12] build: rename Arm build variables X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Rename Arm build variables and values so that they better conform to Arm specifications. Also rename generically sounding variable to names that better capture what the variables hold. Rename machine_args_generic to part_number_config_arm since the variable contains more than just the generic machine args and is used mainly as the fallback arm configuration. Rename the default machine args to generic machine args to reflect that. The rest of the variables are self-explanatory. Signed-off-by: Juraj Linkeš Reviewed-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 2 +- config/arm/arm64_armv8_linux_gcc | 8 +- config/arm/arm64_bluefield_linux_gcc | 4 +- config/arm/arm64_dpaa_linux_gcc | 2 +- config/arm/arm64_emag_linux_gcc | 2 +- config/arm/arm64_n1sdp_linux_gcc | 4 +- config/arm/arm64_octeontx2_linux_gcc | 4 +- config/arm/arm64_stingray_linux_gcc | 4 +- config/arm/arm64_thunderx2_linux_gcc | 4 +- config/arm/arm64_thunderx_linux_gcc | 2 +- config/arm/meson.build | 114 +++++++++++++-------------- 11 files changed, 75 insertions(+), 75 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index fa40c0398..52c5f4476 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -14,4 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x56' +implementer_id = '0x56' diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 88f0ff9da..13ee8b223 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -13,10 +13,10 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = 'generic' +implementer_id = 'generic' -# Valid options for Arm's implementor_pn: -# 'default': valid for all armv8-a architectures (default value) +# Valid options for Arm's part_number: +# 'generic': valid for all armv8-a architectures (default value) # '0xd03': cortex-a53 # '0xd04': cortex-a35 # '0xd05': cortex-a55 @@ -25,4 +25,4 @@ implementor_id = 'generic' # '0xd09': cortex-a73 # '0xd0a': cortex-a75 # '0xd0b': cortex-a76 -implementor_pn = 'default' +part_number = 'generic' diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 86797d23c..b79389d85 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd08' +implementer_id = '0x41' +part_number = '0xd08' diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 1a4682154..573ae7e42 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -14,4 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = 'dpaa' +implementer_id = 'dpaa' diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 8edcd3e97..24f3d533e 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -13,4 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x50' +implementer_id = '0x50' diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 022e06303..6fb3f02ea 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd0c' +implementer_id = '0x41' +part_number = '0xd0c' diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 365bd7cbd..ac1042806 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' -implementor_pn = '0xb2' +implementer_id = '0x43' +part_number = '0xb2' diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 86797d23c..b79389d85 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd08' +implementer_id = '0x41' +part_number = '0xd08' diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index 2b41acc61..dd257745e 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' -implementor_pn = '0xaf' +implementer_id = '0x43' +part_number = '0xaf' diff --git a/config/arm/arm64_thunderx_linux_gcc b/config/arm/arm64_thunderx_linux_gcc index 6572ab615..670764437 100644 --- a/config/arm/arm64_thunderx_linux_gcc +++ b/config/arm/arm64_thunderx_linux_gcc @@ -13,4 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' +implementer_id = '0x43' diff --git a/config/arm/meson.build b/config/arm/meson.build index 42b4e43c7..4fc0ae0fc 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -8,7 +8,7 @@ march_opt = '-march=@0@'.format(machine) arm_force_native_march = false arm_force_default_march = (machine == 'default') -flags_common_default = [ +flags_common = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file # (lib/librte_eal/arm/include/rte_memcpy_64.h) for more info. @@ -28,58 +28,58 @@ flags_common_default = [ ['RTE_ARM_USE_WFE', false], ] -flags_generic = [ +flags_implementer_generic = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 128]] -flags_arm = [ +flags_implementer_arm = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64]] -flags_cavium = [ +flags_implementer_cavium = [ ['RTE_CACHE_LINE_SIZE', 128], ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 96], ['RTE_MAX_VFIO_GROUPS', 128]] -flags_dpaa = [ +flags_implementer_dpaa = [ ['RTE_MACHINE', '"dpaa"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16], ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] -flags_emag = [ +flags_implementer_emag = [ ['RTE_MACHINE', '"emag"'], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 32]] -flags_armada = [ +flags_implementer_armada = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16]] -flags_default_extra = [] -flags_thunderx_extra = [ +flags_part_number_default = [] +flags_part_number_thunderx = [ ['RTE_MACHINE', '"thunderx"'], ['RTE_USE_C11_MEM_MODEL', false]] -flags_thunderx2_extra = [ +flags_part_number_thunderx2 = [ ['RTE_MACHINE', '"thunderx2"'], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true]] -flags_octeontx2_extra = [ +flags_part_number_octeontx2 = [ ['RTE_MACHINE', '"octeontx2"'], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 36], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true]] -flags_n1generic_extra = [ +flags_part_number_n1generic = [ ['RTE_MACHINE', '"neoverse-n1"'], ['RTE_MAX_LCORE', 64], ['RTE_CACHE_LINE_SIZE', 64], @@ -90,8 +90,8 @@ flags_n1generic_extra = [ ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], ['RTE_LIBRTE_VHOST_NUMA', false]] -machine_args_generic = [ - ['default', ['-march=armv8-a+crc', '-moutline-atomics']], +part_number_config_arm = [ + ['generic', ['-march=armv8-a+crc', '-moutline-atomics']], ['native', ['-march=native']], ['0xd03', ['-mcpu=cortex-a53']], ['0xd04', ['-mcpu=cortex-a35']], @@ -100,36 +100,36 @@ machine_args_generic = [ ['0xd09', ['-mcpu=cortex-a73']], ['0xd0a', ['-mcpu=cortex-a75']], ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_n1generic_extra]] + ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic]] -machine_args_cavium = [ - ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], +part_number_config_cavium = [ + ['generic', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], ['native', ['-march=native']], - ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra], - ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], - ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], - ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_thunderx2_extra], - ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_octeontx2_extra]] - -machine_args_emag = [ - ['default', ['-march=armv8-a+crc+crypto', '-mtune=emag']], + ['0xa1', ['-mcpu=thunderxt88'], flags_part_number_thunderx], + ['0xa2', ['-mcpu=thunderxt81'], flags_part_number_thunderx], + ['0xa3', ['-mcpu=thunderxt83'], flags_part_number_thunderx], + ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_part_number_thunderx2], + ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2]] + +part_number_config_emag = [ + ['generic', ['-march=armv8-a+crc+crypto', '-mtune=emag']], ['native', ['-march=native']]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) -impl_generic = ['Generic armv8', flags_generic, machine_args_generic] -impl_0x41 = ['Arm', flags_arm, machine_args_generic] -impl_0x42 = ['Broadcom', flags_generic, machine_args_generic] -impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium] -impl_0x44 = ['DEC', flags_generic, machine_args_generic] -impl_0x49 = ['Infineon', flags_generic, machine_args_generic] -impl_0x4d = ['Motorola', flags_generic, machine_args_generic] -impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic] -impl_0x50 = ['Ampere Computing', flags_emag, machine_args_emag] -impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic] -impl_0x53 = ['Samsung', flags_generic, machine_args_generic] -impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_generic] -impl_0x69 = ['Intel', flags_generic, machine_args_generic] -impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic] +implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm] +implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm] +implementer_0x42 = ['Broadcom', flags_implementer_generic, part_number_config_arm] +implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium] +implementer_0x44 = ['DEC', flags_implementer_generic, part_number_config_arm] +implementer_0x49 = ['Infineon', flags_implementer_generic, part_number_config_arm] +implementer_0x4d = ['Motorola', flags_implementer_generic, part_number_config_arm] +implementer_0x4e = ['NVIDIA', flags_implementer_generic, part_number_config_arm] +implementer_0x50 = ['Ampere Computing', flags_implementer_emag, part_number_config_emag] +implementer_0x51 = ['Qualcomm', flags_implementer_generic, part_number_config_arm] +implementer_0x53 = ['Samsung', flags_implementer_generic, part_number_config_arm] +implementer_0x56 = ['Marvell ARMADA', flags_implementer_armada, part_number_config_arm] +implementer_0x69 = ['Intel', flags_implementer_generic, part_number_config_arm] +implementer_dpaa = ['NXP DPAA', flags_implementer_dpaa, part_number_config_arm] dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) @@ -144,13 +144,13 @@ else dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) dpdk_conf.set('RTE_ARCH_ARM64', 1) - machine = [] - cmd_generic = ['generic', '', '', 'default', ''] + implementer_config = [] + cmd_generic = ['generic', '', '', 'generic', ''] cmd_output = cmd_generic # Set generic by default machine_args = [] # Clear previous machine args if arm_force_default_march and not meson.is_cross_build() - machine = impl_generic - impl_pn = 'default' + implementer_config = implementer_generic + part_number = 'generic' elif not meson.is_cross_build() # The script returns ['Implementer', 'Variant', 'Architecture', # 'Primary Part number', 'Revision'] @@ -161,45 +161,45 @@ else cmd_output = cmd.stdout().to_lower().strip().split(' ') endif # Set to generic if variable is not found - machine = get_variable('impl_' + cmd_output[0], ['generic']) - if machine[0] == 'generic' - machine = impl_generic + implementer_config = get_variable('implementer_' + cmd_output[0], ['generic']) + if implementer_config[0] == 'generic' + implementer_config = implementer_generic cmd_output = cmd_generic endif - impl_pn = cmd_output[3] + part_number = cmd_output[3] if arm_force_native_march == true - impl_pn = 'native' + part_number = 'native' endif else - impl_id = meson.get_cross_property('implementor_id', 'generic') - impl_pn = meson.get_cross_property('implementor_pn', 'default') - machine = get_variable('impl_' + impl_id) + implementer_id = meson.get_cross_property('implementer_id', 'generic') + part_number = meson.get_cross_property('part_number', 'generic') + implementer_config = get_variable('implementer_' + implementer_id) endif # Apply Common Defaults. These settings may be overwritten by machine # settings later. - foreach flag: flags_common_default + foreach flag: flags_common if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif endforeach - message('Implementer : ' + machine[0]) - foreach flag: machine[1] + message('Implementer : ' + implementer_config[0]) + foreach flag: implementer_config[1] if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif endforeach - foreach marg: machine[2] - if marg[0] == impl_pn + foreach marg: implementer_config[2] + if marg[0] == part_number foreach flag: marg[1] if cc.has_argument(flag) machine_args += flag endif endforeach # Apply any extra machine specific flags. - foreach flag: marg.get(2, flags_default_extra) + foreach flag: marg.get(2, flags_part_number_default) if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif From patchwork Fri Nov 20 12:08:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84423 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 34F75A04DD; Fri, 20 Nov 2020 13:09:08 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D48BFC90E; Fri, 20 Nov 2020 13:08:37 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id D8024C8F6 for ; Fri, 20 Nov 2020 13:08:31 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 2CE3DBA259; Fri, 20 Nov 2020 13:08:29 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id wDu7XBoLXkEs; Fri, 20 Nov 2020 13:08:28 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id B59C5B9B5C; Fri, 20 Nov 2020 13:08:25 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:11 +0100 Message-Id: <1605874101-30893-3-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 02/12] build: remove unused or superfluous variables X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Remove variables that were either not used, referenced just once or not needed. Signed-off-by: Juraj Linkeš Reviewed-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 28 +++++++--------------------- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 4fc0ae0fc..be6776ff0 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -2,11 +2,7 @@ # Copyright(c) 2017 Intel Corporation. # Copyright(c) 2017 Cavium, Inc -# for checking defines we need to use the correct compiler flags -march_opt = '-march=@0@'.format(machine) - arm_force_native_march = false -arm_force_default_march = (machine == 'default') flags_common = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -61,7 +57,6 @@ flags_implementer_armada = [ ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16]] -flags_part_number_default = [] flags_part_number_thunderx = [ ['RTE_MACHINE', '"thunderx"'], ['RTE_USE_C11_MEM_MODEL', false]] @@ -118,17 +113,9 @@ part_number_config_emag = [ ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm] implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm] -implementer_0x42 = ['Broadcom', flags_implementer_generic, part_number_config_arm] implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium] -implementer_0x44 = ['DEC', flags_implementer_generic, part_number_config_arm] -implementer_0x49 = ['Infineon', flags_implementer_generic, part_number_config_arm] -implementer_0x4d = ['Motorola', flags_implementer_generic, part_number_config_arm] -implementer_0x4e = ['NVIDIA', flags_implementer_generic, part_number_config_arm] implementer_0x50 = ['Ampere Computing', flags_implementer_emag, part_number_config_emag] -implementer_0x51 = ['Qualcomm', flags_implementer_generic, part_number_config_arm] -implementer_0x53 = ['Samsung', flags_implementer_generic, part_number_config_arm] implementer_0x56 = ['Marvell ARMADA', flags_implementer_armada, part_number_config_arm] -implementer_0x69 = ['Intel', flags_implementer_generic, part_number_config_arm] implementer_dpaa = ['NXP DPAA', flags_implementer_dpaa, part_number_config_arm] dpdk_conf.set('RTE_ARCH_ARM', 1) @@ -144,11 +131,9 @@ else dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) dpdk_conf.set('RTE_ARCH_ARM64', 1) - implementer_config = [] - cmd_generic = ['generic', '', '', 'generic', ''] - cmd_output = cmd_generic # Set generic by default + implementer_id = 'generic' machine_args = [] # Clear previous machine args - if arm_force_default_march and not meson.is_cross_build() + if machine == 'default' and not meson.is_cross_build() implementer_config = implementer_generic part_number = 'generic' elif not meson.is_cross_build() @@ -159,14 +144,15 @@ else cmd = run_command(detect_vendor.path()) if cmd.returncode() == 0 cmd_output = cmd.stdout().to_lower().strip().split(' ') + implementer_id = cmd_output[0] + part_number = cmd_output[3] endif # Set to generic if variable is not found - implementer_config = get_variable('implementer_' + cmd_output[0], ['generic']) + implementer_config = get_variable('implementer_' + implementer_id, ['generic']) if implementer_config[0] == 'generic' implementer_config = implementer_generic - cmd_output = cmd_generic + part_number = 'generic' endif - part_number = cmd_output[3] if arm_force_native_march == true part_number = 'native' endif @@ -199,7 +185,7 @@ else endif endforeach # Apply any extra machine specific flags. - foreach flag: marg.get(2, flags_part_number_default) + foreach flag: marg.get(2, []) if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif From patchwork Fri Nov 20 12:08:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84424 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 79A22A04DD; Fri, 20 Nov 2020 13:09:33 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7B0D0C918; Fri, 20 Nov 2020 13:08:40 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 50A06C8FC for ; Fri, 20 Nov 2020 13:08:32 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 887E2BA6EC; Fri, 20 Nov 2020 13:08:30 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4_40W5LBO8GM; Fri, 20 Nov 2020 13:08:29 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 93BB3BA24B; Fri, 20 Nov 2020 13:08:26 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:12 +0100 Message-Id: <1605874101-30893-4-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 03/12] build: reformat and move Arm config and comments X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Change formatting so that it's more consistent and readable, add/modify comments/stdout messages, move configuration options to more appropriate places and make the order consistent according to these rules: 1. First list generic configuration options, then list options that may be overwritten. List SoC-specific options last. 2. For SoC-specific options, list number of cores before the number of NUMA nodes, to make it consistent with config/meson.build. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armv8_linux_gcc | 12 +-- config/arm/meson.build | 96 +++++++++++-------- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 34 +++++++ 3 files changed, 93 insertions(+), 49 deletions(-) diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 13ee8b223..0099f5ca2 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -13,16 +13,6 @@ cpu = 'armv8-a' endian = 'little' [properties] +# Generate binaries that are portable across all Armv8 machines implementer_id = 'generic' - -# Valid options for Arm's part_number: -# 'generic': valid for all armv8-a architectures (default value) -# '0xd03': cortex-a53 -# '0xd04': cortex-a35 -# '0xd05': cortex-a55 -# '0xd07': cortex-a57 -# '0xd08': cortex-a72 -# '0xd09': cortex-a73 -# '0xd0a': cortex-a75 -# '0xd0b': cortex-a76 part_number = 'generic' diff --git a/config/arm/meson.build b/config/arm/meson.build index be6776ff0..89c196048 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -4,15 +4,16 @@ arm_force_native_march = false +# common flags to all aarch64 builds, with lowest priority flags_common = [ - # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) + # Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file # (lib/librte_eal/arm/include/rte_memcpy_64.h) for more info. ['RTE_ARCH_ARM64_MEMCPY', false], # ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048], # ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512], - # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're - # strong reasons. + # Leave below RTE_ARM64_MEMCPY_xxx options commented out, + # unless there are strong reasons. # ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false], # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], @@ -22,69 +23,86 @@ flags_common = [ ['RTE_SCHED_VECTOR', false], ['RTE_ARM_USE_WFE', false], + ['RTE_ARCH_ARM64', true], + ['RTE_CACHE_LINE_SIZE', 128] ] +# implementer specific aarch64 flags, with middle priority +# (will overwrite common flags) flags_implementer_generic = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 128]] + ['RTE_CACHE_LINE_SIZE', 128], + ['RTE_MAX_LCORE', 256] +] flags_implementer_arm = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64]] + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 16] +] flags_implementer_cavium = [ + ['RTE_MAX_VFIO_GROUPS', 128], ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 96], - ['RTE_MAX_VFIO_GROUPS', 128]] + ['RTE_MAX_NUMA_NODES', 2] +] flags_implementer_dpaa = [ ['RTE_MACHINE', '"dpaa"'], + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16], - ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] + ['RTE_MAX_NUMA_NODES', 1] +] flags_implementer_emag = [ ['RTE_MACHINE', '"emag"'], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 32]] + ['RTE_MAX_LCORE', 32], + ['RTE_MAX_NUMA_NODES', 1] +] flags_implementer_armada = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16]] + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] +] +# part number specific aarch64 flags, with highest priority +# (will overwrite both common and implementer specific flags) flags_part_number_thunderx = [ ['RTE_MACHINE', '"thunderx"'], - ['RTE_USE_C11_MEM_MODEL', false]] + ['RTE_USE_C11_MEM_MODEL', false] +] flags_part_number_thunderx2 = [ ['RTE_MACHINE', '"thunderx2"'], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], - ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true]] + ['RTE_MAX_NUMA_NODES', 2] +] flags_part_number_octeontx2 = [ ['RTE_MACHINE', '"octeontx2"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 36], ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], ['RTE_EAL_IGB_UIO', false], - ['RTE_USE_C11_MEM_MODEL', true]] + ['RTE_MAX_LCORE', 36], + ['RTE_MAX_NUMA_NODES', 1] +] flags_part_number_n1generic = [ ['RTE_MACHINE', '"neoverse-n1"'], - ['RTE_MAX_LCORE', 64], - ['RTE_CACHE_LINE_SIZE', 64], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_MAX_MEM_MB', 1048576], - ['RTE_MAX_NUMA_NODES', 1], ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], - ['RTE_LIBRTE_VHOST_NUMA', false]] + ['RTE_LIBRTE_VHOST_NUMA', false], + ['RTE_MAX_MEM_MB', 1048576], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 64], + ['RTE_MAX_NUMA_NODES', 1] +] +# arm config (implementer 0x41) is the default config part_number_config_arm = [ ['generic', ['-march=armv8-a+crc', '-moutline-atomics']], ['native', ['-march=native']], @@ -95,8 +113,8 @@ part_number_config_arm = [ ['0xd09', ['-mcpu=cortex-a73']], ['0xd0a', ['-mcpu=cortex-a75']], ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic]] - + ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic] +] part_number_config_cavium = [ ['generic', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], ['native', ['-march=native']], @@ -104,13 +122,14 @@ part_number_config_cavium = [ ['0xa2', ['-mcpu=thunderxt81'], flags_part_number_thunderx], ['0xa3', ['-mcpu=thunderxt83'], flags_part_number_thunderx], ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_part_number_thunderx2], - ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2]] - + ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2] +] part_number_config_emag = [ ['generic', ['-march=armv8-a+crc+crypto', '-mtune=emag']], - ['native', ['-march=native']]] + ['native', ['-march=native']] +] -## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) +## Arm implementer ID (MIDR in Arm Architecture Reference Manual) implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm] implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm] implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium] @@ -122,21 +141,21 @@ dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) if dpdk_conf.get('RTE_ARCH_32') + # armv7 build dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) dpdk_conf.set('RTE_ARCH_ARMv7', 1) # the minimum architecture supported, armv7-a, needs the following, - # mk/machine/armv7a/rte.vars.mk sets it too machine_args += '-mfpu=neon' else - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) - dpdk_conf.set('RTE_ARCH_ARM64', 1) - + # aarch64 build implementer_id = 'generic' machine_args = [] # Clear previous machine args if machine == 'default' and not meson.is_cross_build() + # default build implementer_config = implementer_generic part_number = 'generic' elif not meson.is_cross_build() + # native build # The script returns ['Implementer', 'Variant', 'Architecture', # 'Primary Part number', 'Revision'] detect_vendor = find_program(join_paths( @@ -157,6 +176,7 @@ else part_number = 'native' endif else + # cross build implementer_id = meson.get_cross_property('implementer_id', 'generic') part_number = meson.get_cross_property('part_number', 'generic') implementer_config = get_variable('implementer_' + implementer_id) @@ -193,7 +213,7 @@ else endif endforeach endif -message(machine_args) +message('Using machine args: @0@'.format(machine_args)) if (cc.get_define('__ARM_NEON', args: machine_args) != '' or cc.get_define('__aarch64__', args: machine_args) != '') diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 8a1d0e88b..972598835 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -99,3 +99,37 @@ command:: meson arm64-build --cross-file config/arm/arm64_armv8_linux_gcc ninja -C arm64-build + +Supported cross-compilation targets +----------------------------------- + +If you wish to build for a target which is not among the current cross-files, +you may use various combinations of implementer/part number:: + + Supported implementers: + 'generic': Generic armv8 + '0x41': Arm + '0x43': Cavium + '0x50': Ampere Computing + '0x56': Marvell ARMADA + 'dpaa': NXP DPAA + + Supported part_numbers for generic, 0x41, 0x56, dpaa: + 'generic': valid for all armv8-a architectures (default value) + '0xd03': cortex-a53 + '0xd04': cortex-a35 + '0xd09': cortex-a73 + '0xd0a': cortex-a75 + '0xd0b': cortex-a76 + '0xd0c': neoverse-n1 + + Supported part_numbers for 0x43: + 'generic': valid for all Cavium builds + '0xa1': thunderxt88 + '0xa2': thunderxt81 + '0xa3': thunderxt83 + '0xaf': thunderx2t99 + '0xb2': octeontx2 + + Supported part_numbers for 0x50: + 'generic': valid for all Ampere builds From patchwork Fri Nov 20 12:08:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84425 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id AA5D1A04DD; Fri, 20 Nov 2020 13:09:59 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 90134C8C6; Fri, 20 Nov 2020 13:08:49 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 6FACBC8FC for ; Fri, 20 Nov 2020 13:08:34 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id A82D5BA710; Fri, 20 Nov 2020 13:08:31 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3Myw7hz9hmD3; Fri, 20 Nov 2020 13:08:30 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id F0D8BBA257; Fri, 20 Nov 2020 13:08:27 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:13 +0100 Message-Id: <1605874101-30893-5-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 04/12] build: simplify how Arm flags are processed X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Set flags in one loop. Append flags to a list and use the list in the loop. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 37 +++++++++++++++++-------------------- 1 file changed, 17 insertions(+), 20 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 89c196048..fb877fe77 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -149,7 +149,6 @@ if dpdk_conf.get('RTE_ARCH_32') else # aarch64 build implementer_id = 'generic' - machine_args = [] # Clear previous machine args if machine == 'default' and not meson.is_cross_build() # default build implementer_config = implementer_generic @@ -182,34 +181,32 @@ else implementer_config = get_variable('implementer_' + implementer_id) endif - # Apply Common Defaults. These settings may be overwritten by machine - # settings later. - foreach flag: flags_common - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) - endif - endforeach + message('Arm implementer: ' + implementer_config[0]) + message('Arm part number: ' + part_number) - message('Implementer : ' + implementer_config[0]) - foreach flag: implementer_config[1] - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) - endif - endforeach + # use default flags with implementer flags + dpdk_flags = flags_common + implementer_config[1] + machine_args = [] # Clear previous machine args foreach marg: implementer_config[2] if marg[0] == part_number + # apply supported machine args foreach flag: marg[1] if cc.has_argument(flag) machine_args += flag endif endforeach - # Apply any extra machine specific flags. - foreach flag: marg.get(2, []) - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) - endif - endforeach + if marg.length() > 2 + # add extra flags for the part + dpdk_flags += marg[2] + endif + endif + endforeach + + # apply flags + foreach flag: dpdk_flags + if flag.length() > 0 + dpdk_conf.set(flag[0], flag[1]) endif endforeach endif From patchwork Fri Nov 20 12:08:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84426 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 40EF2A04DD; Fri, 20 Nov 2020 13:10:22 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1E905C92E; Fri, 20 Nov 2020 13:08:51 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 5BE52C908 for ; Fri, 20 Nov 2020 13:08:35 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 6E481BA24B; Fri, 20 Nov 2020 13:08:33 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id MlJQvZe9qfZO; Fri, 20 Nov 2020 13:08:32 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 10D25B9B53; Fri, 20 Nov 2020 13:08:29 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:14 +0100 Message-Id: <1605874101-30893-6-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 05/12] build: organize Arm config into dict X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Use dictionary lookup instead of checking for existing variables, iterating over all elements in the list or checking lists for optional configuration. Move variable contents into the dictionary for variables that would be referenced only once. Fallback to generic part number if the discovered part number is unknown. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 298 ++++++++++++++++++++++++----------------- 1 file changed, 178 insertions(+), 120 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index fb877fe77..b449b10c3 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -27,115 +27,166 @@ flags_common = [ ['RTE_CACHE_LINE_SIZE', 128] ] -# implementer specific aarch64 flags, with middle priority -# (will overwrite common flags) -flags_implementer_generic = [ - ['RTE_MACHINE', '"armv8a"'], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_LCORE', 256] -] -flags_implementer_arm = [ - ['RTE_MACHINE', '"armv8a"'], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16] -] -flags_implementer_cavium = [ - ['RTE_MAX_VFIO_GROUPS', 128], - ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_LCORE', 96], - ['RTE_MAX_NUMA_NODES', 2] -] -flags_implementer_dpaa = [ - ['RTE_MACHINE', '"dpaa"'], - ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] -] -flags_implementer_emag = [ - ['RTE_MACHINE', '"emag"'], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 32], - ['RTE_MAX_NUMA_NODES', 1] -] -flags_implementer_armada = [ - ['RTE_MACHINE', '"armv8a"'], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] -] +## Part numbers are specific to Arm implementers +# implementer specific aarch64 flags have middle priority +# (will overwrite common flags) +# part number specific aarch64 flags have the highest priority +# (will overwrite both common and implementer specific flags) +implementer_generic = { + 'description': 'Generic armv8', + 'flags': [ + ['RTE_MACHINE', '"armv8a"'], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_CACHE_LINE_SIZE', 128], + ['RTE_MAX_LCORE', 256] + ], + 'part_number_config': { + 'generic': {'machine_args': ['-march=armv8-a+crc', + '-moutline-atomics']} + } +} + +part_number_config_arm = { + 'generic': {'machine_args': ['-march=armv8-a+crc', + '-moutline-atomics']}, + 'native': {'machine_args': ['-march=native']}, + '0xd03': {'machine_args': ['-mcpu=cortex-a53']}, + '0xd04': {'machine_args': ['-mcpu=cortex-a35']}, + '0xd07': {'machine_args': ['-mcpu=cortex-a57']}, + '0xd08': {'machine_args': ['-mcpu=cortex-a72']}, + '0xd09': {'machine_args': ['-mcpu=cortex-a73']}, + '0xd0a': {'machine_args': ['-mcpu=cortex-a75']}, + '0xd0b': {'machine_args': ['-mcpu=cortex-a76']}, + '0xd0c': { + 'machine_args': ['-march=armv8.2-a+crypto', + '-mcpu=neoverse-n1'], + 'flags': [ + ['RTE_MACHINE', '"neoverse-n1"'], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], + ['RTE_LIBRTE_VHOST_NUMA', false], + ['RTE_MAX_MEM_MB', 1048576], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 64], + ['RTE_MAX_NUMA_NODES', 1] + ] + } +} +implementer_arm = { + 'description': 'Arm', + 'flags': [ + ['RTE_MACHINE', '"armv8a"'], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 16] + ], + 'part_number_config': part_number_config_arm +} -# part number specific aarch64 flags, with highest priority -# (will overwrite both common and implementer specific flags) flags_part_number_thunderx = [ ['RTE_MACHINE', '"thunderx"'], ['RTE_USE_C11_MEM_MODEL', false] ] -flags_part_number_thunderx2 = [ - ['RTE_MACHINE', '"thunderx2"'], - ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 256], - ['RTE_MAX_NUMA_NODES', 2] -] -flags_part_number_octeontx2 = [ - ['RTE_MACHINE', '"octeontx2"'], - ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_EAL_IGB_UIO', false], - ['RTE_MAX_LCORE', 36], - ['RTE_MAX_NUMA_NODES', 1] -] -flags_part_number_n1generic = [ - ['RTE_MACHINE', '"neoverse-n1"'], - ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], - ['RTE_LIBRTE_VHOST_NUMA', false], - ['RTE_MAX_MEM_MB', 1048576], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 64], - ['RTE_MAX_NUMA_NODES', 1] -] +implementer_cavium = { + 'description': 'Cavium', + 'flags': [ + ['RTE_MAX_VFIO_GROUPS', 128], + ['RTE_CACHE_LINE_SIZE', 128], + ['RTE_MAX_LCORE', 96], + ['RTE_MAX_NUMA_NODES', 2] + ], + 'part_number_config': { + 'generic': {'machine_args': ['-march=armv8-a+crc+crypto', + '-mcpu=thunderx']}, + 'native': {'machine_args': ['-march=native']}, + '0xa1': { + 'machine_args': ['-mcpu=thunderxt88'], + 'flags': flags_part_number_thunderx + }, + '0xa2': { + 'machine_args': ['-mcpu=thunderxt81'], + 'flags': flags_part_number_thunderx + }, + '0xa3': { + 'machine_args': ['-mcpu=thunderxt83'], + 'flags': flags_part_number_thunderx + }, + '0xaf': { + 'machine_args': ['-march=armv8.1-a+crc+crypto', + '-mcpu=thunderx2t99'], + 'flags': [ + ['RTE_MACHINE', '"thunderx2"'], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 256], + ['RTE_MAX_NUMA_NODES', 2] + ] + }, + '0xb2': { + 'machine_args': ['-march=armv8.2-a+crc+crypto+lse', + '-mcpu=octeontx2'], + 'flags': [ + ['RTE_MACHINE', '"octeontx2"'], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_EAL_IGB_UIO', false], + ['RTE_MAX_LCORE', 36], + ['RTE_MAX_NUMA_NODES', 1] + ] + } + } +} -# arm config (implementer 0x41) is the default config -part_number_config_arm = [ - ['generic', ['-march=armv8-a+crc', '-moutline-atomics']], - ['native', ['-march=native']], - ['0xd03', ['-mcpu=cortex-a53']], - ['0xd04', ['-mcpu=cortex-a35']], - ['0xd07', ['-mcpu=cortex-a57']], - ['0xd08', ['-mcpu=cortex-a72']], - ['0xd09', ['-mcpu=cortex-a73']], - ['0xd0a', ['-mcpu=cortex-a75']], - ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic] -] -part_number_config_cavium = [ - ['generic', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], - ['native', ['-march=native']], - ['0xa1', ['-mcpu=thunderxt88'], flags_part_number_thunderx], - ['0xa2', ['-mcpu=thunderxt81'], flags_part_number_thunderx], - ['0xa3', ['-mcpu=thunderxt83'], flags_part_number_thunderx], - ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_part_number_thunderx2], - ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2] -] -part_number_config_emag = [ - ['generic', ['-march=armv8-a+crc+crypto', '-mtune=emag']], - ['native', ['-march=native']] -] +implementer_ampere = { + 'description': 'Ampere Computing', + 'flags': [ + ['RTE_MACHINE', '"emag"'], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 32], + ['RTE_MAX_NUMA_NODES', 1] + ], + 'part_number_config': { + 'generic': {'machine_args': ['-march=armv8-a+crc+crypto', + '-mtune=emag']}, + 'native': {'machine_args': ['-march=native']} + } +} + +implementer_marvell = { + 'description': 'Marvell ARMADA', + 'flags': [ + ['RTE_MACHINE', '"armv8a"'], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], + 'part_number_config': part_number_config_arm +} + +implementer_dpaa = { + 'description': 'NXP DPAA', + 'flags': [ + ['RTE_MACHINE', '"dpaa"'], + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], + 'part_number_config': part_number_config_arm +} -## Arm implementer ID (MIDR in Arm Architecture Reference Manual) -implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm] -implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm] -implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium] -implementer_0x50 = ['Ampere Computing', flags_implementer_emag, part_number_config_emag] -implementer_0x56 = ['Marvell ARMADA', flags_implementer_armada, part_number_config_arm] -implementer_dpaa = ['NXP DPAA', flags_implementer_dpaa, part_number_config_arm] +## Arm implementers (ID from MIDR in Arm Architecture Reference Manual) +implementers = { + 'generic': implementer_generic, + '0x41': implementer_arm, + '0x43': implementer_cavium, + '0x50': implementer_ampere, + '0x56': implementer_marvell, + 'dpaa': implementer_dpaa +} dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) @@ -151,7 +202,7 @@ else implementer_id = 'generic' if machine == 'default' and not meson.is_cross_build() # default build - implementer_config = implementer_generic + implementer_config = implementer['generic'] part_number = 'generic' elif not meson.is_cross_build() # native build @@ -166,9 +217,9 @@ else part_number = cmd_output[3] endif # Set to generic if variable is not found - implementer_config = get_variable('implementer_' + implementer_id, ['generic']) + implementer_config = implementers.get(implementer_id, ['generic']) if implementer_config[0] == 'generic' - implementer_config = implementer_generic + implementer_config = implementer['generic'] part_number = 'generic' endif if arm_force_native_march == true @@ -178,28 +229,35 @@ else # cross build implementer_id = meson.get_cross_property('implementer_id', 'generic') part_number = meson.get_cross_property('part_number', 'generic') - implementer_config = get_variable('implementer_' + implementer_id) + implementer_config = implementers.get(implementer_id) endif - message('Arm implementer: ' + implementer_config[0]) + message('Arm implementer: ' + implementer_config['description']) message('Arm part number: ' + part_number) + part_number_config = implementer_config['part_number_config'] + if part_number_config.has_key(part_number) + # use the specified part_number machine args if found + part_number_config = part_number_config[part_number] + elif not meson.is_cross_build() + # default to generic machine args if part_number is not found + # and not forcing native machine args + # but don't default in cross-builds; if part_number is specified + # incorrectly in a cross-file, it needs to be fixed there + part_number_config = part_number_config['generic'] + else + # doing cross build and part number is not in part_number_config + error('Cross build part number 0@0 not found.'.format(part_number)) + endif + # use default flags with implementer flags - dpdk_flags = flags_common + implementer_config[1] + dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + # apply supported machine args machine_args = [] # Clear previous machine args - foreach marg: implementer_config[2] - if marg[0] == part_number - # apply supported machine args - foreach flag: marg[1] - if cc.has_argument(flag) - machine_args += flag - endif - endforeach - if marg.length() > 2 - # add extra flags for the part - dpdk_flags += marg[2] - endif + foreach flag: part_number_config['machine_args'] + if cc.has_argument(flag) + machine_args += flag endif endforeach From patchwork Fri Nov 20 12:08:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84427 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F0DADA04DD; Fri, 20 Nov 2020 13:10:40 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B491BC93A; Fri, 20 Nov 2020 13:08:52 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 319E0C908 for ; Fri, 20 Nov 2020 13:08:37 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 6476EBA24E; Fri, 20 Nov 2020 13:08:34 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id L_xt3YXSojqF; Fri, 20 Nov 2020 13:08:33 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 395D2B9B55; Fri, 20 Nov 2020 13:08:30 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:15 +0100 Message-Id: <1605874101-30893-7-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 06/12] build: isolate configuration for Arm generic build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Use generic configuration for the only build where it makes sense - the generic build. For other builds, if we don't know either of implementer ID or part number, the build is not supported. Add part numbers to cross files where fallback to generic configuration is assumed. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 1 + config/arm/arm64_dpaa_linux_gcc | 1 + config/arm/arm64_emag_linux_gcc | 1 + ..._linux_gcc => arm64_thunderxt88_linux_gcc} | 1 + config/arm/meson.build | 45 +++++++++---------- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 9 ++-- 6 files changed, 29 insertions(+), 29 deletions(-) rename config/arm/{arm64_thunderx_linux_gcc => arm64_thunderxt88_linux_gcc} (93%) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 52c5f4476..143a3c9f8 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -15,3 +15,4 @@ endian = 'little' [properties] implementer_id = '0x56' +part_number = '0xd08' diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 573ae7e42..c3c8a1ef6 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -15,3 +15,4 @@ endian = 'little' [properties] implementer_id = 'dpaa' +part_number = '0xd08' diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 24f3d533e..c675954fc 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -14,3 +14,4 @@ endian = 'little' [properties] implementer_id = '0x50' +part_number = '0x0' diff --git a/config/arm/arm64_thunderx_linux_gcc b/config/arm/arm64_thunderxt88_linux_gcc similarity index 93% rename from config/arm/arm64_thunderx_linux_gcc rename to config/arm/arm64_thunderxt88_linux_gcc index 670764437..758966262 100644 --- a/config/arm/arm64_thunderx_linux_gcc +++ b/config/arm/arm64_thunderxt88_linux_gcc @@ -14,3 +14,4 @@ endian = 'little' [properties] implementer_id = '0x43' +part_number = '0xa1' diff --git a/config/arm/meson.build b/config/arm/meson.build index b449b10c3..403e1a02f 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -47,8 +47,6 @@ implementer_generic = { } part_number_config_arm = { - 'generic': {'machine_args': ['-march=armv8-a+crc', - '-moutline-atomics']}, 'native': {'machine_args': ['-march=native']}, '0xd03': {'machine_args': ['-mcpu=cortex-a53']}, '0xd04': {'machine_args': ['-mcpu=cortex-a35']}, @@ -97,8 +95,6 @@ implementer_cavium = { ['RTE_MAX_NUMA_NODES', 2] ], 'part_number_config': { - 'generic': {'machine_args': ['-march=armv8-a+crc+crypto', - '-mcpu=thunderx']}, 'native': {'machine_args': ['-march=native']}, '0xa1': { 'machine_args': ['-mcpu=thunderxt88'], @@ -148,8 +144,8 @@ implementer_ampere = { ['RTE_MAX_NUMA_NODES', 1] ], 'part_number_config': { - 'generic': {'machine_args': ['-march=armv8-a+crc+crypto', - '-mtune=emag']}, + '0x0': {'machine_args': ['-march=armv8-a+crc+crypto', + '-mtune=emag']}, 'native': {'machine_args': ['-march=native']} } } @@ -199,10 +195,9 @@ if dpdk_conf.get('RTE_ARCH_32') machine_args += '-mfpu=neon' else # aarch64 build - implementer_id = 'generic' if machine == 'default' and not meson.is_cross_build() # default build - implementer_config = implementer['generic'] + implementer_id = 'generic' part_number = 'generic' elif not meson.is_cross_build() # native build @@ -215,21 +210,24 @@ else cmd_output = cmd.stdout().to_lower().strip().split(' ') implementer_id = cmd_output[0] part_number = cmd_output[3] - endif - # Set to generic if variable is not found - implementer_config = implementers.get(implementer_id, ['generic']) - if implementer_config[0] == 'generic' - implementer_config = implementer['generic'] - part_number = 'generic' + else + error('Error when getting Arm Implementer ID and part number.') endif if arm_force_native_march == true part_number = 'native' endif else # cross build - implementer_id = meson.get_cross_property('implementer_id', 'generic') - part_number = meson.get_cross_property('part_number', 'generic') - implementer_config = implementers.get(implementer_id) + implementer_id = meson.get_cross_property('implementer_id') + part_number = meson.get_cross_property('part_number') + endif + + if implementers.has_key(implementer_id) + implementer_config = implementers[implementer_id] + else + error('Unsupported Arm implementer: @0@. '.format(implementer_id) + + 'Please add support for it or use the generic ' + + '(-Dmachine=generic) build.') endif message('Arm implementer: ' + implementer_config['description']) @@ -239,15 +237,12 @@ else if part_number_config.has_key(part_number) # use the specified part_number machine args if found part_number_config = part_number_config[part_number] - elif not meson.is_cross_build() - # default to generic machine args if part_number is not found - # and not forcing native machine args - # but don't default in cross-builds; if part_number is specified - # incorrectly in a cross-file, it needs to be fixed there - part_number_config = part_number_config['generic'] else - # doing cross build and part number is not in part_number_config - error('Cross build part number 0@0 not found.'.format(part_number)) + # unknown part number + error('Unsupported part number @0@ of implementer @1@. ' + .format(part_number, implementer_id) + + 'Please add support for it or use the generic ' + + '(-Dmachine=generic) build.') endif # use default flags with implementer flags diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 972598835..6a883b030 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -114,8 +114,10 @@ you may use various combinations of implementer/part number:: '0x56': Marvell ARMADA 'dpaa': NXP DPAA - Supported part_numbers for generic, 0x41, 0x56, dpaa: - 'generic': valid for all armv8-a architectures (default value) + Supported part_numbers for generic: + 'generic': valid for all armv8-a architectures (unoptimized portable build) + + Supported part_numbers for 0x41, 0x56, dpaa: '0xd03': cortex-a53 '0xd04': cortex-a35 '0xd09': cortex-a73 @@ -124,7 +126,6 @@ you may use various combinations of implementer/part number:: '0xd0c': neoverse-n1 Supported part_numbers for 0x43: - 'generic': valid for all Cavium builds '0xa1': thunderxt88 '0xa2': thunderxt81 '0xa3': thunderxt83 @@ -132,4 +133,4 @@ you may use various combinations of implementer/part number:: '0xb2': octeontx2 Supported part_numbers for 0x50: - 'generic': valid for all Ampere builds + '0x0': emag From patchwork Fri Nov 20 12:08:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84428 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 72E8AA04DD; Fri, 20 Nov 2020 13:10:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 62EAAC946; Fri, 20 Nov 2020 13:08:54 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 870F9C910 for ; Fri, 20 Nov 2020 13:08:39 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 6E631B9B55; Fri, 20 Nov 2020 13:08:36 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QQQgp1N4ieFH; Fri, 20 Nov 2020 13:08:35 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 509E0B9B5C; Fri, 20 Nov 2020 13:08:31 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:16 +0100 Message-Id: <1605874101-30893-8-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 07/12] build: use native machine args in Arm native build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Letting the compiler decide is going to yield the best results for native builds, so use native machine args usable for both GCC and Clang. Signed-off-by: Juraj Linkeš --- config/arm/meson.build | 54 ++++++++++++++++++++++-------------------- 1 file changed, 28 insertions(+), 26 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 403e1a02f..4508f369c 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -2,8 +2,6 @@ # Copyright(c) 2017 Intel Corporation. # Copyright(c) 2017 Cavium, Inc -arm_force_native_march = false - # common flags to all aarch64 builds, with lowest priority flags_common = [ # Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -26,6 +24,7 @@ flags_common = [ ['RTE_ARCH_ARM64', true], ['RTE_CACHE_LINE_SIZE', 128] ] +native_machine_args = ['-mcpu=native'] ## Part numbers are specific to Arm implementers # implementer specific aarch64 flags have middle priority @@ -47,7 +46,6 @@ implementer_generic = { } part_number_config_arm = { - 'native': {'machine_args': ['-march=native']}, '0xd03': {'machine_args': ['-mcpu=cortex-a53']}, '0xd04': {'machine_args': ['-mcpu=cortex-a35']}, '0xd07': {'machine_args': ['-mcpu=cortex-a57']}, @@ -95,7 +93,6 @@ implementer_cavium = { ['RTE_MAX_NUMA_NODES', 2] ], 'part_number_config': { - 'native': {'machine_args': ['-march=native']}, '0xa1': { 'machine_args': ['-mcpu=thunderxt88'], 'flags': flags_part_number_thunderx @@ -145,8 +142,7 @@ implementer_ampere = { ], 'part_number_config': { '0x0': {'machine_args': ['-march=armv8-a+crc+crypto', - '-mtune=emag']}, - 'native': {'machine_args': ['-march=native']} + '-mtune=emag']} } } @@ -195,26 +191,27 @@ if dpdk_conf.get('RTE_ARCH_32') machine_args += '-mfpu=neon' else # aarch64 build - if machine == 'default' and not meson.is_cross_build() - # default build - implementer_id = 'generic' - part_number = 'generic' - elif not meson.is_cross_build() - # native build - # The script returns ['Implementer', 'Variant', 'Architecture', - # 'Primary Part number', 'Revision'] - detect_vendor = find_program(join_paths( - meson.current_source_dir(), 'armv8_machine.py')) - cmd = run_command(detect_vendor.path()) - if cmd.returncode() == 0 - cmd_output = cmd.stdout().to_lower().strip().split(' ') - implementer_id = cmd_output[0] - part_number = cmd_output[3] + use_native_machine_args = false + if not meson.is_cross_build() + if machine == 'default' + # default build + implementer_id = 'generic' + part_number = 'generic' else - error('Error when getting Arm Implementer ID and part number.') - endif - if arm_force_native_march == true - part_number = 'native' + # native build + # The script returns ['Implementer', 'Variant', 'Architecture', + # 'Primary Part number', 'Revision'] + detect_vendor = find_program(join_paths( + meson.current_source_dir(), 'armv8_machine.py')) + cmd = run_command(detect_vendor.path()) + if cmd.returncode() == 0 + cmd_output = cmd.stdout().to_lower().strip().split(' ') + implementer_id = cmd_output[0] + part_number = cmd_output[3] + else + error('Error when getting Arm Implementer ID and part number.') + endif + use_native_machine_args = true endif else # cross build @@ -250,7 +247,12 @@ else # apply supported machine args machine_args = [] # Clear previous machine args - foreach flag: part_number_config['machine_args'] + if use_native_machine_args + candidate_machine_args = native_machine_args + else + candidate_machine_args = part_number_config['machine_args'] + endif + foreach flag: candidate_machine_args if cc.has_argument(flag) machine_args += flag endif From patchwork Fri Nov 20 12:08:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84429 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BC3C6A04DD; Fri, 20 Nov 2020 13:11:17 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 194D9C950; Fri, 20 Nov 2020 13:08:56 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 0A73BC912 for ; Fri, 20 Nov 2020 13:08:40 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 2A3C5BA24B; Fri, 20 Nov 2020 13:08:37 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OtKPF72y3OMc; Fri, 20 Nov 2020 13:08:36 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 9E1CCBA23B; Fri, 20 Nov 2020 13:08:32 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:17 +0100 Message-Id: <1605874101-30893-9-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 08/12] build: add core and NUMA counts to cross files X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for setting core count and numa nodes in cross files. The values specified in cross files will override the default values. Also add missing default values to Arm config. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 2 ++ config/arm/arm64_armv8_linux_gcc | 2 ++ config/arm/arm64_bluefield_linux_gcc | 2 ++ config/arm/arm64_dpaa_linux_gcc | 2 ++ config/arm/arm64_emag_linux_gcc | 2 ++ config/arm/arm64_graviton2_linux_gcc | 2 ++ config/arm/arm64_n1sdp_linux_gcc | 2 ++ config/arm/arm64_octeontx2_linux_gcc | 2 ++ config/arm/arm64_stingray_linux_gcc | 2 ++ config/arm/arm64_thunderx2_linux_gcc | 2 ++ config/arm/arm64_thunderxt88_linux_gcc | 2 ++ config/arm/meson.build | 6 ++++-- config/meson.build | 15 +++++++++++++++ .../linux_gsg/cross_build_dpdk_for_arm64.rst | 9 +++++++++ 14 files changed, 50 insertions(+), 2 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 143a3c9f8..2ecc4604c 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -16,3 +16,5 @@ endian = 'little' [properties] implementer_id = '0x56' part_number = '0xd08' +max_lcores = 16 +max_numa_nodes = 1 diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 0099f5ca2..5451a01da 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -16,3 +16,5 @@ endian = 'little' # Generate binaries that are portable across all Armv8 machines implementer_id = 'generic' part_number = 'generic' +max_lcores = 256 +max_numa_nodes = 4 diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index b79389d85..4f56790c5 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_lcores = 16 +max_numa_nodes = 1 diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index c3c8a1ef6..8641fee63 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -16,3 +16,5 @@ endian = 'little' [properties] implementer_id = 'dpaa' part_number = '0xd08' +max_lcores = 16 +max_numa_nodes = 1 diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index c675954fc..7cbb05510 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x50' part_number = '0x0' +max_lcores = 32 +max_numa_nodes = 1 diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc index 022e06303..d0bfec87d 100644 --- a/config/arm/arm64_graviton2_linux_gcc +++ b/config/arm/arm64_graviton2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementor_id = '0x41' implementor_pn = '0xd0c' +max_lcores = 64 +max_numa_nodes = 1 diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 6fb3f02ea..138ae08c3 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd0c' +max_lcores = 4 +max_numa_nodes = 1 diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index ac1042806..26cf471ad 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xb2' +max_lcores = 36 +max_numa_nodes = 1 diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index b79389d85..4f56790c5 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_lcores = 16 +max_numa_nodes = 1 diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index dd257745e..c06dcdc2b 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xaf' +max_lcores = 256 +max_numa_nodes = 2 diff --git a/config/arm/arm64_thunderxt88_linux_gcc b/config/arm/arm64_thunderxt88_linux_gcc index 758966262..3ba1528e4 100644 --- a/config/arm/arm64_thunderxt88_linux_gcc +++ b/config/arm/arm64_thunderxt88_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xa1' +max_lcores = 96 +max_numa_nodes = 1 diff --git a/config/arm/meson.build b/config/arm/meson.build index 4508f369c..375a804ac 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -37,7 +37,8 @@ implementer_generic = { ['RTE_MACHINE', '"armv8a"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_LCORE', 256] + ['RTE_MAX_LCORE', 256], + ['RTE_MAX_NUMA_NODES', 4] ], 'part_number_config': { 'generic': {'machine_args': ['-march=armv8-a+crc', @@ -75,7 +76,8 @@ implementer_arm = { ['RTE_MACHINE', '"armv8a"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16] + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] ], 'part_number_config': part_number_config_arm } diff --git a/config/meson.build b/config/meson.build index a29693b88..2bff6137f 100644 --- a/config/meson.build +++ b/config/meson.build @@ -252,6 +252,21 @@ compile_time_cpuflags = [] subdir(arch_subdir) dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags)) +# apply cross-specific options +if meson.is_cross_build() + # configure RTE_MAX_LCORE and RTE_MAX_NUMA_NODES from cross file + cross_max_lcores = meson.get_cross_property('max_lcores', 0) + if cross_max_lcores != 0 + message('Setting RTE_MAX_LCORE from cross file') + dpdk_conf.set('RTE_MAX_LCORE', cross_max_lcores) + endif + cross_max_numa_nodes = meson.get_cross_property('max_numa_nodes', 0) + if cross_max_numa_nodes != 0 + message('Setting RTE_MAX_NUMA_NODES from cross file') + dpdk_conf.set('RTE_MAX_NUMA_NODES', cross_max_numa_nodes) + endif +endif + # set the install path for the drivers dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path) diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 6a883b030..4e65b271c 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -134,3 +134,12 @@ you may use various combinations of implementer/part number:: Supported part_numbers for 0x50: '0x0': emag + +Other cross file options +------------------------ + +There are other options you may specify in a cross file to tailor the build:: + + Supported extra configuration + max_numa_nodes = n # will set RTE_MAX_NUMA_NODES + max_lcores = n # will set RTE_MAX_LCORE From patchwork Fri Nov 20 12:08:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84430 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id D507BA04DD; Fri, 20 Nov 2020 13:11:31 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 958F0C95C; Fri, 20 Nov 2020 13:08:57 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 8B32BC910 for ; Fri, 20 Nov 2020 13:08:41 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 5C926B9B5C; Fri, 20 Nov 2020 13:08:39 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id paY3fYa9h3QH; Fri, 20 Nov 2020 13:08:38 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 9F5AFBA257; Fri, 20 Nov 2020 13:08:33 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:18 +0100 Message-Id: <1605874101-30893-10-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 09/12] build: disable drivers in Arm builds X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" A few options that disabled drivers in the old makefiles were improperly ported to the meson build system. Fix this by adding a to the list of disabled drivers, similarly how the command line option works and remove unneeded driver options ported from the old makefile system, since they don't work in the current Meson build system. Add support for removing drivers for cross builds so that we can disable them in cross files. Signed-off-by: Juraj Linkeš Acked-by: Bruce Richardson Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 1 + config/arm/meson.build | 7 +++---- doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst | 4 ++++ drivers/meson.build | 6 +++++- meson.build | 1 + 5 files changed, 14 insertions(+), 5 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 2ecc4604c..e365f61d0 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -18,3 +18,4 @@ implementer_id = '0x56' part_number = '0xd08' max_lcores = 16 max_numa_nodes = 1 +disabled_drivers = ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] diff --git a/config/arm/meson.build b/config/arm/meson.build index 375a804ac..7db343b8a 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -2,6 +2,9 @@ # Copyright(c) 2017 Intel Corporation. # Copyright(c) 2017 Cavium, Inc +# disable Arm drivers for all builds +disabled_drivers += ['net/avp', 'net/fm10k'] + # common flags to all aarch64 builds, with lowest priority flags_common = [ # Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -16,9 +19,6 @@ flags_common = [ # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], - ['RTE_NET_FM10K', false], - ['RTE_NET_AVP', false], - ['RTE_SCHED_VECTOR', false], ['RTE_ARM_USE_WFE', false], ['RTE_ARCH_ARM64', true], @@ -126,7 +126,6 @@ implementer_cavium = { ['RTE_MACHINE', '"octeontx2"'], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_EAL_IGB_UIO', false], ['RTE_MAX_LCORE', 36], ['RTE_MAX_NUMA_NODES', 1] ] diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 4e65b271c..210ad4508 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -143,3 +143,7 @@ There are other options you may specify in a cross file to tailor the build:: Supported extra configuration max_numa_nodes = n # will set RTE_MAX_NUMA_NODES max_lcores = n # will set RTE_MAX_LCORE + + disabled_drivers = ['bus/dpaa', 'crypto'] # add disabled drivers + # valid values are directories (optionally with their subdirs) + # in the drivers directory diff --git a/drivers/meson.build b/drivers/meson.build index 6b50f7238..21a296b55 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -18,9 +18,13 @@ subdirs = [ 'baseband', # depends on common and bus. ] -disabled_drivers = run_command(list_dir_globs, get_option('disable_drivers'), +disabled_drivers += run_command(list_dir_globs, get_option('disable_drivers'), ).stdout().split() +if meson.is_cross_build() + disabled_drivers += meson.get_cross_property('disabled_drivers', []) +endif + default_cflags = machine_args default_cflags += ['-DALLOW_EXPERIMENTAL_API'] default_cflags += ['-DALLOW_INTERNAL_API'] diff --git a/meson.build b/meson.build index 45d974cd2..fcc8931f0 100644 --- a/meson.build +++ b/meson.build @@ -21,6 +21,7 @@ dpdk_drivers = [] dpdk_extra_ldflags = [] dpdk_libs_disabled = [] dpdk_drvs_disabled = [] +disabled_drivers = [] abi_version_file = files('ABI_VERSION') if host_machine.cpu_family().startswith('x86') From patchwork Fri Nov 20 12:08:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84431 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4892DA04DD; Fri, 20 Nov 2020 13:11:51 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 23DF1C96A; Fri, 20 Nov 2020 13:08:59 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 0F1EAC912 for ; Fri, 20 Nov 2020 13:08:41 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id C98CCBA23B; Fri, 20 Nov 2020 13:08:39 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9VYzwTmPeBMC; Fri, 20 Nov 2020 13:08:38 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 0C7B9BA259; Fri, 20 Nov 2020 13:08:34 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:19 +0100 Message-Id: <1605874101-30893-11-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 10/12] build: disable libnuma in cross builds X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Some Arm SoCs are not NUMA systems. Add the capability to disable NUMA for cross build and disable NUMA in Arm cross files. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 1 + config/arm/arm64_bluefield_linux_gcc | 1 + config/arm/arm64_dpaa_linux_gcc | 1 + config/arm/arm64_graviton2_linux_gcc | 1 + config/arm/arm64_n1sdp_linux_gcc | 1 + config/arm/arm64_octeontx2_linux_gcc | 1 + config/arm/arm64_stingray_linux_gcc | 1 + config/arm/meson.build | 2 -- config/meson.build | 19 +++++++++++++------ .../linux_gsg/cross_build_dpdk_for_arm64.rst | 4 ++++ 10 files changed, 24 insertions(+), 8 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index e365f61d0..487cb2923 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -18,4 +18,5 @@ implementer_id = '0x56' part_number = '0xd08' max_lcores = 16 max_numa_nodes = 1 +numa = false disabled_drivers = ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 4f56790c5..6bef87fbd 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd08' max_lcores = 16 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 8641fee63..37398c762 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -18,3 +18,4 @@ implementer_id = 'dpaa' part_number = '0xd08' max_lcores = 16 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc index d0bfec87d..cfe239797 100644 --- a/config/arm/arm64_graviton2_linux_gcc +++ b/config/arm/arm64_graviton2_linux_gcc @@ -17,3 +17,4 @@ implementor_id = '0x41' implementor_pn = '0xd0c' max_lcores = 64 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 138ae08c3..b00f2d1ef 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd0c' max_lcores = 4 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 26cf471ad..593769709 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x43' part_number = '0xb2' max_lcores = 36 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 4f56790c5..6bef87fbd 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd08' max_lcores = 16 max_numa_nodes = 1 +numa = false diff --git a/config/arm/meson.build b/config/arm/meson.build index 7db343b8a..f5e1ad20c 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -61,8 +61,6 @@ part_number_config_arm = { ['RTE_MACHINE', '"neoverse-n1"'], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], - ['RTE_LIBRTE_VHOST_NUMA', false], ['RTE_MAX_MEM_MB', 1048576], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_LCORE', 64], diff --git a/config/meson.build b/config/meson.build index 2bff6137f..9583be4ab 100644 --- a/config/meson.build +++ b/config/meson.build @@ -142,12 +142,19 @@ endif # check for libraries used in multiple places in DPDK has_libnuma = 0 -numa_dep = cc.find_library('numa', required: false) -if numa_dep.found() and cc.has_header('numaif.h') - dpdk_conf.set10('RTE_HAS_LIBNUMA', true) - has_libnuma = 1 - add_project_link_arguments('-lnuma', language: 'c') - dpdk_extra_ldflags += '-lnuma' +find_libnuma = true +if meson.is_cross_build() and not meson.get_cross_property('numa', true) + # don't look for libnuma if explicitly disabled in cross build + check_libnuma = false +endif +if find_libnuma + numa_dep = cc.find_library('numa', required: false) + if numa_dep.found() and cc.has_header('numaif.h') + dpdk_conf.set10('RTE_HAS_LIBNUMA', true) + has_libnuma = 1 + add_project_link_arguments('-lnuma', language: 'c') + dpdk_extra_ldflags += '-lnuma' + endif endif has_libfdt = 0 diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 210ad4508..063661ebf 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -147,3 +147,7 @@ There are other options you may specify in a cross file to tailor the build:: disabled_drivers = ['bus/dpaa', 'crypto'] # add disabled drivers # valid values are directories (optionally with their subdirs) # in the drivers directory + + numa = false # set to false to force building for a non-NUMA system + # if not set or set to true, the build system will build for a NUMA + # system only if libnuma is installed From patchwork Fri Nov 20 12:08:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84432 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4B733A04DD; Fri, 20 Nov 2020 13:12:13 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E5F1EC97A; Fri, 20 Nov 2020 13:09:00 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 072DBC920 for ; Fri, 20 Nov 2020 13:08:44 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id ADED7B9B55; Fri, 20 Nov 2020 13:08:41 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PrgqTds28hs2; Fri, 20 Nov 2020 13:08:40 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 2F353B9B53; Fri, 20 Nov 2020 13:08:36 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 20 Nov 2020 13:08:20 +0100 Message-Id: <1605874101-30893-12-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 11/12] build: add Arm SoC meson option X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add Arm SoC configuration to Arm meson.build and add a meson option to enable those options for native builds. This is preferable to specifying a cross file when doing aarch64 -> aarch64 builds, since the cross file specifies the toolchain as well. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 7 +- config/arm/arm64_armv8_linux_gcc | 5 +- config/arm/arm64_bluefield_linux_gcc | 6 +- config/arm/arm64_dpaa_linux_gcc | 6 +- config/arm/arm64_emag_linux_gcc | 5 +- config/arm/arm64_graviton2_linux_gcc | 6 +- config/arm/arm64_n1sdp_linux_gcc | 6 +- config/arm/arm64_octeontx2_linux_gcc | 6 +- config/arm/arm64_stingray_linux_gcc | 6 +- config/arm/arm64_thunderx2_linux_gcc | 5 +- config/arm/arm64_thunderxt88_linux_gcc | 5 +- config/arm/meson.build | 129 +++++++++++++++++- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 80 ++++------- meson_options.txt | 2 + 14 files changed, 166 insertions(+), 108 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 487cb2923..7cc40d1f4 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -14,9 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x56' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false -disabled_drivers = ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] +soc = 'armada' diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 5451a01da..64d44ead8 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -14,7 +14,4 @@ endian = 'little' [properties] # Generate binaries that are portable across all Armv8 machines -implementer_id = 'generic' -part_number = 'generic' -max_lcores = 256 -max_numa_nodes = 4 +soc = 'generic' diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 6bef87fbd..7b1fae8b9 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +soc = 'bluefield' diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 37398c762..e52188842 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -14,8 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = 'dpaa' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +soc = 'dpaa' diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 7cbb05510..6c24b4bca 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -13,7 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x50' -part_number = '0x0' -max_lcores = 32 -max_numa_nodes = 1 +soc = 'emag' diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc index cfe239797..bae35d6be 100644 --- a/config/arm/arm64_graviton2_linux_gcc +++ b/config/arm/arm64_graviton2_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd0c' -max_lcores = 64 -max_numa_nodes = 1 -numa = false +soc = 'graviton2' diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index b00f2d1ef..249ff4738 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd0c' -max_lcores = 4 -max_numa_nodes = 1 -numa = false +soc = 'n1sdp' diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 593769709..063018e8f 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x43' -part_number = '0xb2' -max_lcores = 36 -max_numa_nodes = 1 -numa = false +soc = 'octeontx2' diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 6bef87fbd..1209a8c0b 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +soc = 'stingray' diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index c06dcdc2b..348650712 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -13,7 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x43' -part_number = '0xaf' -max_lcores = 256 -max_numa_nodes = 2 +soc = 'thunderx2' diff --git a/config/arm/arm64_thunderxt88_linux_gcc b/config/arm/arm64_thunderxt88_linux_gcc index 3ba1528e4..d31d0c6d8 100644 --- a/config/arm/arm64_thunderxt88_linux_gcc +++ b/config/arm/arm64_thunderxt88_linux_gcc @@ -13,7 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x43' -part_number = '0xa1' -max_lcores = 96 -max_numa_nodes = 1 +soc = 'thunderxt88' diff --git a/config/arm/meson.build b/config/arm/meson.build index f5e1ad20c..94a7dd295 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -29,7 +29,7 @@ native_machine_args = ['-mcpu=native'] ## Part numbers are specific to Arm implementers # implementer specific aarch64 flags have middle priority # (will overwrite common flags) -# part number specific aarch64 flags have the highest priority +# part number specific aarch64 flags have higher priority # (will overwrite both common and implementer specific flags) implementer_generic = { 'description': 'Generic armv8', @@ -179,6 +179,99 @@ implementers = { 'dpaa': implementer_dpaa } +# soc specific aarch64 flags have the highest priority +# (will overwrite all other flags) +soc_generic = { + 'description': 'Generic un-optimized build for all aarch64 machines.', + 'implementer': 'generic', + 'part_number': 'generic' +} + +soc_armada = { + 'description': 'Marvell ARMADA', + 'implementer': '0x56', + 'part_number': '0xd08', + 'numa': false, + 'disabled_drivers': ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] +} + +soc_bluefield = { + 'description': 'NVIDIA BlueField', + 'implementer': '0x41', + 'part_number': '0xd08', + 'numa': false +} + +soc_dpaa = { + 'description': 'NXP DPAA', + 'implementer': 'dpaa', + 'part_number': '0xd08', + 'numa': false +} + +soc_emag = { + 'description': 'Ampere eMAG', + 'implementer': '0x50', + 'part_number': '0x0' +} + +soc_graviton2 = { + 'description': 'AWS Graviton2', + 'implementer': '0x41', + 'part_number': '0xd0c', + 'numa': false +} + +soc_n1sdp = { + 'description': 'Arm Neoverse N1SDP', + 'implementer': '0x41', + 'part_number': '0xd0c', + 'flags': [ + ['RTE_MAX_LCORE', 4] + ], + 'numa': false +} + +soc_octeontx2 = { + 'description': 'Marvell OCTEON TX2', + 'implementer': '0x43', + 'part_number': '0xb2', + 'numa': false +} + +soc_stingray = { + 'description': 'Broadcom Stingray', + 'implementer': '0x41', + 'part_number': '0xd08', + 'numa': false +} + +soc_thunderx2 = { + 'description': 'Marvell ThunderX2 T99', + 'implementer': '0x43', + 'part_number': '0xaf' +} + +soc_thunderxt88 = { + 'description': 'Marvell ThunderX T88', + 'implementer': '0x43', + 'part_number': '0xa1' +} + +socs = { + 'generic': soc_generic, + 'armada': soc_armada, + 'bluefield': soc_bluefield, + 'dpaa': soc_dpaa, + 'emag': soc_emag, + 'graviton2': soc_graviton2, + 'n1sdp': soc_n1sdp, + 'octeontx2': soc_octeontx2, + 'stingray': soc_stingray, + 'thunderx2': soc_thunderx2, + 'thunderxt88': soc_thunderxt88 +} + dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) @@ -191,11 +284,18 @@ if dpdk_conf.get('RTE_ARCH_32') else # aarch64 build use_native_machine_args = false + arm_soc = get_option('arm_soc') + soc_config = {} if not meson.is_cross_build() if machine == 'default' # default build + if arm_soc != '' + error('Arm SoC is unsupported with default build.') + endif implementer_id = 'generic' part_number = 'generic' + elif arm_soc != '' + soc_config = socs.get(arm_soc, {'not_supported': true}) else # native build # The script returns ['Implementer', 'Variant', 'Architecture', @@ -214,8 +314,27 @@ else endif else # cross build - implementer_id = meson.get_cross_property('implementer_id') - part_number = meson.get_cross_property('part_number') + arm_soc = meson.get_cross_property('soc', '') + if arm_soc == '' + error('Arm SoC must be specified in the cross file.') + endif + soc_config = socs.get(arm_soc, {'not_supported': true}) + endif + + soc_flags = [] + if soc_config.has_key('not_supported') + error('SoC @0@ not supported.'.format(arm_soc)) + elif soc_config != {} + implementer_id = soc_config['implementer'] + implementer_config = implementers[implementer_id] + part_number = soc_config['part_number'] + soc_flags = soc_config.get('flags', []) + if not soc_config.get('numa', true) + has_libnuma = 0 + endif + if soc_config.has_key('disabled_drivers') + disabled_drivers += soc_config['disabled_drivers'] + endif endif if implementers.has_key(implementer_id) @@ -241,8 +360,8 @@ else '(-Dmachine=generic) build.') endif - # use default flags with implementer flags - dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + # add flags in the proper order + dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + soc_flags # apply supported machine args machine_args = [] # Clear previous machine args diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 063661ebf..83bdb78bf 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -100,54 +100,32 @@ command:: meson arm64-build --cross-file config/arm/arm64_armv8_linux_gcc ninja -C arm64-build -Supported cross-compilation targets ------------------------------------ - -If you wish to build for a target which is not among the current cross-files, -you may use various combinations of implementer/part number:: - - Supported implementers: - 'generic': Generic armv8 - '0x41': Arm - '0x43': Cavium - '0x50': Ampere Computing - '0x56': Marvell ARMADA - 'dpaa': NXP DPAA - - Supported part_numbers for generic: - 'generic': valid for all armv8-a architectures (unoptimized portable build) - - Supported part_numbers for 0x41, 0x56, dpaa: - '0xd03': cortex-a53 - '0xd04': cortex-a35 - '0xd09': cortex-a73 - '0xd0a': cortex-a75 - '0xd0b': cortex-a76 - '0xd0c': neoverse-n1 - - Supported part_numbers for 0x43: - '0xa1': thunderxt88 - '0xa2': thunderxt81 - '0xa3': thunderxt83 - '0xaf': thunderx2t99 - '0xb2': octeontx2 - - Supported part_numbers for 0x50: - '0x0': emag - -Other cross file options ------------------------- - -There are other options you may specify in a cross file to tailor the build:: - - Supported extra configuration - max_numa_nodes = n # will set RTE_MAX_NUMA_NODES - max_lcores = n # will set RTE_MAX_LCORE - - disabled_drivers = ['bus/dpaa', 'crypto'] # add disabled drivers - # valid values are directories (optionally with their subdirs) - # in the drivers directory - - numa = false # set to false to force building for a non-NUMA system - # if not set or set to true, the build system will build for a NUMA - # system only if libnuma is installed +Building for an aarch64 SoC on an aarch64 build machine +------------------------------------------------------- + +If you wish to build on an aarch64 build machine for a different aarch64 SoC, +you don't need a separate cross toolchain, just a different set of +configuration options. To build for an aarch64 SoC, use the -Darm_soc meson +option:: + + meson soc_build -Darm_soc= + +Substitute with one of the supported SoCs:: + + generic: Generic un-optimized build for all aarch64 machines. + armada: Marvell ARMADA + bluefield: NVIDIA BlueField + dpaa: NXP DPAA + emag: Ampere eMAG + graviton2: AWS Graviton2 + n1sdp: Arm Neoverse N1SDP + octeontx2: Marvell OCTEON TX2 + stingray: Broadcom Stingray + thunderx2: Marvell ThunderX2 T99 + thunderxt88: Marvell ThunderX T88 + +These SoCs are also used in cross files, e.g.:: + + [properties] + # Generate binaries that are portable across all Armv8 machines + soc = 'generic' diff --git a/meson_options.txt b/meson_options.txt index e384e6dbb..ea7bd46fc 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -1,5 +1,7 @@ # Please keep these options sorted alphabetically. +option('arm_soc', type: 'string', value: '', + description: 'Specify if you want to build for a particular aarch64 Arm SoC when building on an aarch64 machine.') option('disable_drivers', type: 'string', value: '', description: 'Comma-separated list of drivers to explicitly disable.') option('drivers_install_subdir', type: 'string', value: 'dpdk/pmds-', From patchwork Fri Nov 20 12:08:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84433 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 94CA3A04DD; Fri, 20 Nov 2020 13:12:33 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A1BB4C98C; Fri, 20 Nov 2020 13:09:02 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 0C426C928 for ; Fri, 20 Nov 2020 13:08:45 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 5091EBA24B; Fri, 20 Nov 2020 13:08:42 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id i2b3Gt2woAdE; Fri, 20 Nov 2020 13:08:40 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 503EABA6EC; Fri, 20 Nov 2020 13:08:37 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= , lironh@marvell.com, yskoh@mellanox.com Date: Fri, 20 Nov 2020 13:08:21 +0100 Message-Id: <1605874101-30893-13-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech> <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v13 12/12] config: fix Arm implementer and its SoCs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Fix the implementer and part number of DPAA and ARMADA SoCs. The current values of 16 cores and 1 NUMA node don't cover all SoCs from the Arm implementer, e.g. Taishan 2280 has 64 cores and 4 NUMA nodes. Increase these to 64 and 4 to widen the coverage. Add configuration to SoC options where smaller values are needed. Fixes: 6ec78c2463ac ("build: add meson support for dpaaX platforms") Cc: hemant.agrawal@nxp.com Fixes: dd1cd845c102 ("config: add Marvell ARMADA based on armv8-a") Cc: lironh@marvell.com Fixes: d97108a33231 ("config: change defaults of armv8") Cc: yskoh@mellanox.com Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 54 ++++++++++++++++++------------------------ 1 file changed, 23 insertions(+), 31 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 94a7dd295..3f15000ff 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -74,8 +74,8 @@ implementer_arm = { ['RTE_MACHINE', '"armv8a"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] + ['RTE_MAX_LCORE', 64], + ['RTE_MAX_NUMA_NODES', 4] ], 'part_number_config': part_number_config_arm } @@ -145,38 +145,12 @@ implementer_ampere = { } } -implementer_marvell = { - 'description': 'Marvell ARMADA', - 'flags': [ - ['RTE_MACHINE', '"armv8a"'], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] - ], - 'part_number_config': part_number_config_arm -} - -implementer_dpaa = { - 'description': 'NXP DPAA', - 'flags': [ - ['RTE_MACHINE', '"dpaa"'], - ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] - ], - 'part_number_config': part_number_config_arm -} - ## Arm implementers (ID from MIDR in Arm Architecture Reference Manual) implementers = { 'generic': implementer_generic, '0x41': implementer_arm, '0x43': implementer_cavium, - '0x50': implementer_ampere, - '0x56': implementer_marvell, - 'dpaa': implementer_dpaa + '0x50': implementer_ampere } # soc specific aarch64 flags have the highest priority @@ -189,8 +163,12 @@ soc_generic = { soc_armada = { 'description': 'Marvell ARMADA', - 'implementer': '0x56', + 'implementer': '0x41', 'part_number': '0xd08', + 'flags': [ + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'numa': false, 'disabled_drivers': ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] } @@ -199,13 +177,23 @@ soc_bluefield = { 'description': 'NVIDIA BlueField', 'implementer': '0x41', 'part_number': '0xd08', + 'flags': [ + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'numa': false } soc_dpaa = { 'description': 'NXP DPAA', - 'implementer': 'dpaa', + 'implementer': '0x41', 'part_number': '0xd08', + 'flags': [ + ['RTE_MACHINE', '"dpaa"'], + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'numa': false } @@ -242,6 +230,10 @@ soc_octeontx2 = { soc_stingray = { 'description': 'Broadcom Stingray', 'implementer': '0x41', + 'flags': [ + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'part_number': '0xd08', 'numa': false }