From patchwork Wed Nov 18 06:29:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Feifei Wang X-Patchwork-Id: 84294 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 06F18A04E6; Wed, 18 Nov 2020 07:30:00 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5DF52C8D8; Wed, 18 Nov 2020 07:29:45 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id D684AC8CC for ; Wed, 18 Nov 2020 07:29:43 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4B27F101E; Tue, 17 Nov 2020 22:29:42 -0800 (PST) Received: from net-arm-n1sdp.shanghai.arm.com (net-arm-n1sdp.shanghai.arm.com [10.169.208.219]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CA5F63F70D; Tue, 17 Nov 2020 22:29:39 -0800 (PST) From: Feifei Wang To: Jerin Jacob , Ruifeng Wang , Jeff Guo , Haiyue Wang Cc: dev@dpdk.org, nd@arm.com, Feifei Wang Date: Wed, 18 Nov 2020 00:29:26 -0600 Message-Id: <20201118062929.21345-2-feifei.wang2@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201118062929.21345-1-feifei.wang2@arm.com> References: <20201118062929.21345-1-feifei.wang2@arm.com> Subject: [dpdk-dev] [PATCH v1 1/4] net/ixgbe: add VLAN stripping support for Arm X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Implemented PKT_RX_VLAN_STRIPPED for vector PMD on Arm platform. Test Results: NICs: 82599(igb) Dirver: ixgbe(vector) Packet: vlan-id=1 $:./app/dpdk-testpmd -c 0x3 -w 0002:f9:00.0 -- -i --port-topology=chained \ to enable vlan stripping: --enable-hw-vlan-strip test-pmd> set fwd rxonly test-pmd> set verbose 1 test-pmd> start With this patch: %enable vlan stripping: testpmd> port 0/queue 0: received 1 packets src=00:00:00:00:00:02 - dst=00:00:00:00:00:01 - type=0x0800 - length=70 - nb_segs=1 - VLAN tci=0x1 ol_flags: PKT_RX_VLAN PKT_RX_VLAN_STRIPPED %disable vlan stripping: testpmd> port 0/queue 0: received 1 packets src=00:00:00:00:00:02 - dst=00:00:00:00:00:01 - type=0x8100 - length=74 - nb_segs=1 - VLAN tci=0x0 ol_flags: PKT_RX_VLAN diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c index 4c81ae9dc..e6d877af9 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c @@ -81,11 +81,9 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq) IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr, rx_id); } -#define VTAG_SHIFT (3) - static inline void desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2, - uint8x16_t staterr, struct rte_mbuf **rx_pkts) + uint8x16_t staterr, uint8_t vlan_flags, struct rte_mbuf **rx_pkts) { uint8x16_t ptype; uint8x16_t vtag; @@ -95,13 +93,6 @@ desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2, uint32_t word; } vol; - const uint8x16_t pkttype_msk = { - PKT_RX_VLAN, PKT_RX_VLAN, - PKT_RX_VLAN, PKT_RX_VLAN, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00}; - const uint8x16_t rsstype_msk = { 0x0F, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, @@ -114,12 +105,26 @@ desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2, PKT_RX_RSS_HASH, 0, 0, 0, 0, 0, 0, PKT_RX_FDIR}; + const uint8x16_t vlan_msk = { + IXGBE_RXD_STAT_VP, IXGBE_RXD_STAT_VP, + IXGBE_RXD_STAT_VP, IXGBE_RXD_STAT_VP, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0}; + + const uint8x16_t vlan_map = { + 0, 0, 0, 0, + 0, 0, 0, 0, + vlan_flags, 0, 0, 0, + 0, 0, 0, 0}; + ptype = vzipq_u8(sterr_tmp1.val[0], sterr_tmp2.val[0]).val[0]; ptype = vandq_u8(ptype, rsstype_msk); ptype = vqtbl1q_u8(rss_flags, ptype); - vtag = vshrq_n_u8(staterr, VTAG_SHIFT); - vtag = vandq_u8(vtag, pkttype_msk); + /* extract vlan_flags from IXGBE_RXD_STAT_VP bits of staterr */ + vtag = vandq_u8(staterr, vlan_msk); + vtag = vqtbl1q_u8(vlan_map, vtag); vtag = vorrq_u8(ptype, vtag); vol.word = vgetq_lane_u32(vreinterpretq_u32_u8(vtag), 0); @@ -221,6 +226,7 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts, }; uint16x8_t crc_adjust = {0, 0, rxq->crc_len, 0, rxq->crc_len, 0, 0, 0}; + uint8_t vlan_flags; /* nb_pkts has to be floor-aligned to RTE_IXGBE_DESCS_PER_LOOP */ nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_IXGBE_DESCS_PER_LOOP); @@ -250,6 +256,10 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts, */ sw_ring = &rxq->sw_ring[rxq->rx_tail]; + /* ensure these 2 flags are in the lower 8 bits */ + RTE_BUILD_BUG_ON((PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED) > UINT8_MAX); + vlan_flags = rxq->vlan_flags & UINT8_MAX; + /* A. load 4 packet in one loop * B. copy 4 mbuf point from swring to rx_pkts * C. calc the number of DD bits among the 4 packets @@ -311,7 +321,7 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts, staterr = vzipq_u8(sterr_tmp1.val[1], sterr_tmp2.val[1]).val[0]; /* set ol_flags with vlan packet type */ - desc_to_olflags_v(sterr_tmp1, sterr_tmp2, staterr, + desc_to_olflags_v(sterr_tmp1, sterr_tmp2, staterr, vlan_flags, &rx_pkts[pos]); /* D.2 pkt 3,4 set in_port/nb_seg and remove crc */ From patchwork Wed Nov 18 06:29:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Feifei Wang X-Patchwork-Id: 84295 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 18C7AA04E6; Wed, 18 Nov 2020 07:30:17 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E34EFC8F4; Wed, 18 Nov 2020 07:29:48 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id DEC5DC8F2 for ; Wed, 18 Nov 2020 07:29:46 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5CF60101E; Tue, 17 Nov 2020 22:29:45 -0800 (PST) Received: from net-arm-n1sdp.shanghai.arm.com (net-arm-n1sdp.shanghai.arm.com [10.169.208.219]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DD1DE3F70D; Tue, 17 Nov 2020 22:29:42 -0800 (PST) From: Feifei Wang To: Jerin Jacob , Ruifeng Wang , Jeff Guo , Haiyue Wang Cc: dev@dpdk.org, nd@arm.com, Feifei Wang Date: Wed, 18 Nov 2020 00:29:27 -0600 Message-Id: <20201118062929.21345-3-feifei.wang2@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201118062929.21345-1-feifei.wang2@arm.com> References: <20201118062929.21345-1-feifei.wang2@arm.com> Subject: [dpdk-dev] [PATCH v1 2/4] net/ixgbe: support checksum flags for NEON vector X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Updated desc_to_olflags_v() to support PKT_RX_IP_CKSUM_BAD and PKT_RX_L4_CKSUM_BAD in the ol_flags of the mbuf for Arm neon vector Rx function. Test Results: NICs: 82599(igb) Dirver: ixgbe(vector) Packet: IPv4_checksum = 0xee && UDP_checksum = 0xee $:./app/dpdk-testpmd -c 0x3 -w 0002:f9:00.0 -- -i --port-topology=chained test-pmd> set fwd rxonly test-pmd> set verbose 1 test-pmd> start With this patch: testpmd> port 0/queue 0: received 1 packets src=00:00:00:00:00:02 - dst=00:00:00:00:00:01 - type=0x0800 - length=70 - nb_segs=1 ol_flags: PKT_RX_L4_CKSUM_BAD PKT_RX_IP_CKSUM_BAD Without this patch: testpmd> port 0/queue 0: received 1 packets src=00:00:00:00:00:02 - dst=00:00:00:00:00:01 - type=0x0800 - length=70 - nb_segs=1 ol_flags: PKT_RX_L4_CKSUM_UNKNOWN PKT_RX_IP_CKSUM_UNKNOWN Signed-off-by: Feifei Wang Reviewed-by: Ruifeng Wang --- drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c | 47 +++++++++++++++++++------ 1 file changed, 36 insertions(+), 11 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c index e6d877af9..4d6f057e7 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c @@ -87,6 +87,8 @@ desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2, { uint8x16_t ptype; uint8x16_t vtag; + uint8x16_t temp_csum; + uint32x4_t csum = {0, 0, 0, 0}; union { uint8_t e[4]; @@ -105,26 +107,51 @@ desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2, PKT_RX_RSS_HASH, 0, 0, 0, 0, 0, 0, PKT_RX_FDIR}; - const uint8x16_t vlan_msk = { + /* mask everything except vlan present and l4/ip csum error */ + const uint8x16_t vlan_csum_msk = { IXGBE_RXD_STAT_VP, IXGBE_RXD_STAT_VP, IXGBE_RXD_STAT_VP, IXGBE_RXD_STAT_VP, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0}; - - const uint8x16_t vlan_map = { + (IXGBE_RXDADV_ERR_TCPE | IXGBE_RXDADV_ERR_IPE) >> 24, + (IXGBE_RXDADV_ERR_TCPE | IXGBE_RXDADV_ERR_IPE) >> 24, + (IXGBE_RXDADV_ERR_TCPE | IXGBE_RXDADV_ERR_IPE) >> 24, + (IXGBE_RXDADV_ERR_TCPE | IXGBE_RXDADV_ERR_IPE) >> 24}; + + /* map vlan present (0x8), IPE (0x2), L4E (0x1) to ol_flags */ + const uint8x16_t vlan_csum_map = { + 0, + PKT_RX_L4_CKSUM_BAD, + PKT_RX_IP_CKSUM_BAD, + PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD, 0, 0, 0, 0, - 0, 0, 0, 0, - vlan_flags, 0, 0, 0, + vlan_flags, + vlan_flags | PKT_RX_L4_CKSUM_BAD, + vlan_flags | PKT_RX_IP_CKSUM_BAD, + vlan_flags | PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD, 0, 0, 0, 0}; ptype = vzipq_u8(sterr_tmp1.val[0], sterr_tmp2.val[0]).val[0]; ptype = vandq_u8(ptype, rsstype_msk); ptype = vqtbl1q_u8(rss_flags, ptype); - /* extract vlan_flags from IXGBE_RXD_STAT_VP bits of staterr */ - vtag = vandq_u8(staterr, vlan_msk); - vtag = vqtbl1q_u8(vlan_map, vtag); + /* extract vlan_flags and csum_error from staterr */ + vtag = vandq_u8(staterr, vlan_csum_msk); + + /* csum bits are in the most significant, to use shuffle we need to + * shift them. Change mask from 0xc0 to 0x03. + */ + temp_csum = vshrq_n_u8(vtag, 6); + + /* 'OR' the most significant 32 bits containing the checksum + * flags with the vlan present flags + * Then bits layout of each lane(8bits) will be 'xxxx,VP,x,IPE,L4E' + */ + csum = vsetq_lane_u32(vgetq_lane_u32(vreinterpretq_u32_u8(temp_csum), 3), csum, 0); + vtag = vorrq_u8(vreinterpretq_u8_u32(csum), vtag); + + /* convert VP, IPE, L4E to ol_flags */ + vtag = vqtbl1q_u8(vlan_csum_map, vtag); vtag = vorrq_u8(ptype, vtag); vol.word = vgetq_lane_u32(vreinterpretq_u32_u8(vtag), 0); @@ -391,7 +418,6 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts, * Notice: * - nb_pkts < RTE_IXGBE_DESCS_PER_LOOP, just return no packet * - floor align nb_pkts to a RTE_IXGBE_DESC_PER_LOOP power-of-two - * - don't support ol_flags for rss and csum err */ uint16_t ixgbe_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, @@ -404,7 +430,6 @@ ixgbe_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, * vPMD receive routine that reassembles scattered packets * * Notice: - * - don't support ol_flags for rss and csum err * - nb_pkts < RTE_IXGBE_DESCS_PER_LOOP, just return no packet * - floor align nb_pkts to a RTE_IXGBE_DESC_PER_LOOP power-of-two */ From patchwork Wed Nov 18 06:29:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Feifei Wang X-Patchwork-Id: 84296 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1DDB2A04E6; Wed, 18 Nov 2020 07:30:34 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 71B7CC906; Wed, 18 Nov 2020 07:29:50 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id E5955C900 for ; Wed, 18 Nov 2020 07:29:49 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6F24C101E; Tue, 17 Nov 2020 22:29:48 -0800 (PST) Received: from net-arm-n1sdp.shanghai.arm.com (net-arm-n1sdp.shanghai.arm.com [10.169.208.219]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EE6563F70D; Tue, 17 Nov 2020 22:29:45 -0800 (PST) From: Feifei Wang To: Jerin Jacob , Ruifeng Wang , Jeff Guo , Haiyue Wang Cc: dev@dpdk.org, nd@arm.com, feiwan02 Date: Wed, 18 Nov 2020 00:29:28 -0600 Message-Id: <20201118062929.21345-4-feifei.wang2@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201118062929.21345-1-feifei.wang2@arm.com> References: <20201118062929.21345-1-feifei.wang2@arm.com> Subject: [dpdk-dev] [PATCH v1 3/4] net/ixgbe: implement good checksum flag for NEON vector X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: feiwan02 Add CKSUM_GOOD flag to distinguish a good checksum from an unknown one in neon vertor RX function. Test Results: NICs: 82599(igb) Dirver: ixgbe(vector) Packet: IPv4_checksum = correct value && UDP_checksum = correct value $:./app/dpdk-testpmd -c 0x3 -w 0002:f9:00.0 -- -i --port-topology=chained test-pmd> set fwd rxonly test-pmd> set verbose 1 test-pmd> start With this patch: testpmd> port 0/queue 0: received 1 packets src=00:00:00:00:00:02 - dst=00:00:00:00:00:01 - type=0x0800 - length=70 - nb_segs=1 ol_flags: PKT_RX_L4_CKSUM_GOOD PKT_RX_IP_CKSUM_GOOD Without this patch: testpmd> port 0/queue 0: received 1 packets src=00:00:00:00:00:02 - dst=00:00:00:00:00:01 - type=0x0800 - length=70 - nb_segs=1 ol_flags: PKT_RX_L4_CKSUM_UNKNOWN PKT_RX_IP_CKSUM_UNKNOWN Signed-off-by: Feifei Wang Reviewed-by: Ruifeng Wang --- drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c | 37 +++++++++++++++++-------- 1 file changed, 25 insertions(+), 12 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c index 4d6f057e7..b2bee2228 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c @@ -86,13 +86,13 @@ desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2, uint8x16_t staterr, uint8_t vlan_flags, struct rte_mbuf **rx_pkts) { uint8x16_t ptype; - uint8x16_t vtag; + uint8x16_t vtag_lo, vtag_hi, vtag; uint8x16_t temp_csum; uint32x4_t csum = {0, 0, 0, 0}; union { - uint8_t e[4]; - uint32_t word; + uint16_t e[4]; + uint64_t word; } vol; const uint8x16_t rsstype_msk = { @@ -119,18 +119,26 @@ desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2, (IXGBE_RXDADV_ERR_TCPE | IXGBE_RXDADV_ERR_IPE) >> 24}; /* map vlan present (0x8), IPE (0x2), L4E (0x1) to ol_flags */ - const uint8x16_t vlan_csum_map = { - 0, - PKT_RX_L4_CKSUM_BAD, + const uint8x16_t vlan_csum_map_lo = { + PKT_RX_IP_CKSUM_GOOD, + PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD, PKT_RX_IP_CKSUM_BAD, PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD, 0, 0, 0, 0, - vlan_flags, - vlan_flags | PKT_RX_L4_CKSUM_BAD, + vlan_flags | PKT_RX_IP_CKSUM_GOOD, + vlan_flags | PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD, vlan_flags | PKT_RX_IP_CKSUM_BAD, vlan_flags | PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD, 0, 0, 0, 0}; + const uint8x16_t vlan_csum_map_hi = { + PKT_RX_L4_CKSUM_GOOD >> sizeof(uint8_t), 0, + PKT_RX_L4_CKSUM_GOOD >> sizeof(uint8_t), 0, + 0, 0, 0, 0, + PKT_RX_L4_CKSUM_GOOD >> sizeof(uint8_t), 0, + PKT_RX_L4_CKSUM_GOOD >> sizeof(uint8_t), 0, + 0, 0, 0, 0}; + ptype = vzipq_u8(sterr_tmp1.val[0], sterr_tmp2.val[0]).val[0]; ptype = vandq_u8(ptype, rsstype_msk); ptype = vqtbl1q_u8(rss_flags, ptype); @@ -150,11 +158,16 @@ desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2, csum = vsetq_lane_u32(vgetq_lane_u32(vreinterpretq_u32_u8(temp_csum), 3), csum, 0); vtag = vorrq_u8(vreinterpretq_u8_u32(csum), vtag); - /* convert VP, IPE, L4E to ol_flags */ - vtag = vqtbl1q_u8(vlan_csum_map, vtag); - vtag = vorrq_u8(ptype, vtag); + /* convert L4 checksum correct type to vtag_hi */ + vtag_hi = vqtbl1q_u8(vlan_csum_map_hi, vtag); + vtag_hi = vshrq_n_u8(vtag_hi, 7); + + /* convert VP, IPE, L4E to vtag_lo */ + vtag_lo = vqtbl1q_u8(vlan_csum_map_lo, vtag); + vtag_lo = vorrq_u8(ptype, vtag_lo); - vol.word = vgetq_lane_u32(vreinterpretq_u32_u8(vtag), 0); + vtag = vzipq_u8(vtag_lo, vtag_hi).val[0]; + vol.word = vgetq_lane_u64(vreinterpretq_u64_u8(vtag), 0); rx_pkts[0]->ol_flags = vol.e[0]; rx_pkts[1]->ol_flags = vol.e[1]; From patchwork Wed Nov 18 06:29:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Feifei Wang X-Patchwork-Id: 84297 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6304DA04E6; Wed, 18 Nov 2020 07:30:52 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 23ED5C90C; Wed, 18 Nov 2020 07:29:54 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 10481C90C for ; Wed, 18 Nov 2020 07:29:53 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 89DAA101E; Tue, 17 Nov 2020 22:29:51 -0800 (PST) Received: from net-arm-n1sdp.shanghai.arm.com (net-arm-n1sdp.shanghai.arm.com [10.169.208.219]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0C8A93F70D; Tue, 17 Nov 2020 22:29:48 -0800 (PST) From: Feifei Wang To: Jerin Jacob , Ruifeng Wang , Jeff Guo , Haiyue Wang Cc: dev@dpdk.org, nd@arm.com, feiwan02 Date: Wed, 18 Nov 2020 00:29:29 -0600 Message-Id: <20201118062929.21345-5-feifei.wang2@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201118062929.21345-1-feifei.wang2@arm.com> References: <20201118062929.21345-1-feifei.wang2@arm.com> Subject: [dpdk-dev] [PATCH v1 4/4] net/ixgbe: enable IXGBE NEON vector PMD when CHECKSUM is set X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: feiwan02 IXGBE NEON vector PMD now supports checksum offloading, hence can be used when DEV_RX_OFFLOAD_CHECKSUM is set. Signed-off-by: Feifei Wang Reviewed-by: Ruifeng Wang --- drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c index b2bee2228..a5a5b2167 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c @@ -638,11 +638,5 @@ ixgbe_txq_vec_setup(struct ixgbe_tx_queue *txq) int __rte_cold ixgbe_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev) { - struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; - - /* no csum error report support */ - if (rxmode->offloads & DEV_RX_OFFLOAD_CHECKSUM) - return -1; - return ixgbe_rx_vec_dev_conf_condition_check_default(dev); }