From patchwork Tue Oct 13 14:54:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 80570 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 141BDA04B7; Tue, 13 Oct 2020 16:55:15 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 586331DBD6; Tue, 13 Oct 2020 16:54:56 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 82B3C1DA9E for ; Tue, 13 Oct 2020 16:54:52 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 2248EB6B47; Tue, 13 Oct 2020 16:54:48 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id lLhoCBEEV7XE; Tue, 13 Oct 2020 16:54:47 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 820A0B6A8F; Tue, 13 Oct 2020 16:54:46 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Tue, 13 Oct 2020 16:54:37 +0200 Message-Id: <1602600882-695-2-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> References: <1600867161-15673-1-git-send-email-juraj.linkes@pantheon.tech> <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v2 1/6] build: rename default Arm build to generic-armv8 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The current machine='default' build name is not descriptive. The actual default build is machine='native'. Add an alternative string which does the same build and better describes what we're building: machine='generic-armv8'. Leave machine='default' for backwards compatibility. Signed-off-by: Juraj Linkeš --- config/arm/meson.build | 31 ++++++++++++++++--------------- config/meson.build | 3 --- 2 files changed, 16 insertions(+), 18 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 42c0c34a5..c371f983e 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -1,12 +1,13 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2017 Intel Corporation. # Copyright(c) 2017 Cavium, Inc +# Copyright(c) 2020 PANTHEON.tech s.r.o. # for checking defines we need to use the correct compiler flags march_opt = '-march=@0@'.format(machine) arm_force_native_march = false -arm_force_default_march = (machine == 'default') +arm_force_generic_march = (machine == 'default' or machine == 'generic-armv8') flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -87,7 +88,7 @@ flags_octeontx2_extra = [ ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true]] -machine_args_generic = [ +machine_args_default = [ ['default', ['-march=armv8-a+crc']], ['native', ['-march=native']], ['0xd03', ['-mcpu=cortex-a53']], @@ -113,20 +114,20 @@ machine_args_emag = [ ['native', ['-march=native']]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) -impl_generic = ['Generic armv8', flags_generic, machine_args_generic] -impl_0x41 = ['Arm', flags_arm, machine_args_generic] -impl_0x42 = ['Broadcom', flags_generic, machine_args_generic] +impl_generic = ['Generic armv8', flags_generic, machine_args_default] +impl_0x41 = ['Arm', flags_arm, machine_args_default] +impl_0x42 = ['Broadcom', flags_generic, machine_args_default] impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium] -impl_0x44 = ['DEC', flags_generic, machine_args_generic] -impl_0x49 = ['Infineon', flags_generic, machine_args_generic] -impl_0x4d = ['Motorola', flags_generic, machine_args_generic] -impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic] +impl_0x44 = ['DEC', flags_generic, machine_args_default] +impl_0x49 = ['Infineon', flags_generic, machine_args_default] +impl_0x4d = ['Motorola', flags_generic, machine_args_default] +impl_0x4e = ['NVIDIA', flags_generic, machine_args_default] impl_0x50 = ['Ampere Computing', flags_emag, machine_args_emag] -impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic] -impl_0x53 = ['Samsung', flags_generic, machine_args_generic] -impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_generic] -impl_0x69 = ['Intel', flags_generic, machine_args_generic] -impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic] +impl_0x51 = ['Qualcomm', flags_generic, machine_args_default] +impl_0x53 = ['Samsung', flags_generic, machine_args_default] +impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_default] +impl_0x69 = ['Intel', flags_generic, machine_args_default] +impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_default] dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) @@ -145,7 +146,7 @@ else cmd_generic = ['generic', '', '', 'default', ''] cmd_output = cmd_generic # Set generic by default machine_args = [] # Clear previous machine args - if arm_force_default_march and not meson.is_cross_build() + if arm_force_generic_march and not meson.is_cross_build() machine = impl_generic impl_pn = 'default' elif not meson.is_cross_build() diff --git a/config/meson.build b/config/meson.build index 9fb903c9b..4bd65d98e 100644 --- a/config/meson.build +++ b/config/meson.build @@ -80,9 +80,6 @@ if machine == 'default' machine = 'corei7' elif host_machine.cpu_family().startswith('arm') machine = 'armv7-a' - elif host_machine.cpu_family().startswith('aarch') - # arm64 manages defaults in config/arm/meson.build - machine = 'default' elif host_machine.cpu_family().startswith('ppc') machine = 'power8' endif From patchwork Tue Oct 13 14:54:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 80572 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5EE91A04B7; Tue, 13 Oct 2020 16:56:01 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D28311DCDF; Tue, 13 Oct 2020 16:55:00 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 839461DBAA for ; Tue, 13 Oct 2020 16:54:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 44699B6B40; Tue, 13 Oct 2020 16:54:53 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fCLaVFagxUjH; Tue, 13 Oct 2020 16:54:51 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 2C1C4B6B41; Tue, 13 Oct 2020 16:54:47 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Tue, 13 Oct 2020 16:54:38 +0200 Message-Id: <1602600882-695-3-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> References: <1600867161-15673-1-git-send-email-juraj.linkes@pantheon.tech> <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v2 2/6] build: refactor Arm build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" * Rename variables to have names that better describe what the variables store * Remove unused or superfluous variables * Change a list to dictionary where key lookup is needed * Add informatory comments in the code * Minor code restructure and reformatting Signed-off-by: Juraj Linkeš --- config/arm/arm64_armada_linux_gcc | 2 +- config/arm/arm64_armv8_linux_gcc | 8 +- config/arm/arm64_bluefield_linux_gcc | 4 +- config/arm/arm64_dpaa_linux_gcc | 2 +- config/arm/arm64_emag_linux_gcc | 2 +- config/arm/arm64_n1sdp_linux_gcc | 4 +- config/arm/arm64_octeontx2_linux_gcc | 4 +- config/arm/arm64_stingray_linux_gcc | 4 +- config/arm/arm64_thunderx2_linux_gcc | 4 +- config/arm/arm64_thunderx_linux_gcc | 2 +- config/arm/meson.build | 246 +++++++++++++++------------ 11 files changed, 153 insertions(+), 129 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index fa40c0398..52c5f4476 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -14,4 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x56' +implementer_id = '0x56' diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 88f0ff9da..13ee8b223 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -13,10 +13,10 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = 'generic' +implementer_id = 'generic' -# Valid options for Arm's implementor_pn: -# 'default': valid for all armv8-a architectures (default value) +# Valid options for Arm's part_number: +# 'generic': valid for all armv8-a architectures (default value) # '0xd03': cortex-a53 # '0xd04': cortex-a35 # '0xd05': cortex-a55 @@ -25,4 +25,4 @@ implementor_id = 'generic' # '0xd09': cortex-a73 # '0xd0a': cortex-a75 # '0xd0b': cortex-a76 -implementor_pn = 'default' +part_number = 'generic' diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 86797d23c..b79389d85 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd08' +implementer_id = '0x41' +part_number = '0xd08' diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 1a4682154..573ae7e42 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -14,4 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = 'dpaa' +implementer_id = 'dpaa' diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 8edcd3e97..24f3d533e 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -13,4 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x50' +implementer_id = '0x50' diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 022e06303..6fb3f02ea 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd0c' +implementer_id = '0x41' +part_number = '0xd0c' diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 365bd7cbd..ac1042806 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' -implementor_pn = '0xb2' +implementer_id = '0x43' +part_number = '0xb2' diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 86797d23c..b79389d85 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd08' +implementer_id = '0x41' +part_number = '0xd08' diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index 2b41acc61..dd257745e 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' -implementor_pn = '0xaf' +implementer_id = '0x43' +part_number = '0xaf' diff --git a/config/arm/arm64_thunderx_linux_gcc b/config/arm/arm64_thunderx_linux_gcc index 6572ab615..670764437 100644 --- a/config/arm/arm64_thunderx_linux_gcc +++ b/config/arm/arm64_thunderx_linux_gcc @@ -13,4 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' +implementer_id = '0x43' diff --git a/config/arm/meson.build b/config/arm/meson.build index c371f983e..646438f09 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -3,12 +3,12 @@ # Copyright(c) 2017 Cavium, Inc # Copyright(c) 2020 PANTHEON.tech s.r.o. -# for checking defines we need to use the correct compiler flags -march_opt = '-march=@0@'.format(machine) - +# set arm_force_native_march if you want to use machine args below +# instead of discovered values; only works when doing an actual native build arm_force_native_march = false -arm_force_generic_march = (machine == 'default' or machine == 'generic-armv8') +native_machine_args = ['-march=native', '-mtune=native'] +# common flags to all aarch64 builds, with lowest priority flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file @@ -16,8 +16,9 @@ flags_common_default = [ ['RTE_ARCH_ARM64_MEMCPY', false], # ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048], # ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512], - # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're - # strong reasons. + + # Leave below RTE_ARM64_MEMCPY_xxx options commented out, + # unless there are strong reasons. # ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false], # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], @@ -28,110 +29,124 @@ flags_common_default = [ ['RTE_SCHED_VECTOR', false], ['RTE_ARM_USE_WFE', false], + ['RTE_CACHE_LINE_SIZE', 128], + ['RTE_ARCH_ARM64', true] ] +# implementer specific aarch64 flags, with middle priority +# (will overwrite common flags) flags_generic = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 128]] + ['RTE_CACHE_LINE_SIZE', 128] +] flags_arm = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64]] + ['RTE_CACHE_LINE_SIZE', 64] +] flags_cavium = [ ['RTE_CACHE_LINE_SIZE', 128], ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 96], - ['RTE_MAX_VFIO_GROUPS', 128]] + ['RTE_MAX_VFIO_GROUPS', 128] +] flags_dpaa = [ ['RTE_MACHINE', '"dpaa"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16], - ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false] +] flags_emag = [ ['RTE_MACHINE', '"emag"'], - ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 32]] + ['RTE_MAX_LCORE', 32], + ['RTE_CACHE_LINE_SIZE', 64] +] flags_armada = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16]] + ['RTE_MAX_LCORE', 16], + ['RTE_CACHE_LINE_SIZE', 64] +] -flags_default_extra = [] +# part number specific aarch64 flags, with highest priority +# (will overwrite both common and implementer specific flags) flags_n1sdp_extra = [ ['RTE_MACHINE', '"n1sdp"'], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 4], ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], - ['RTE_LIBRTE_VHOST_NUMA', false]] + ['RTE_LIBRTE_VHOST_NUMA', false] +] flags_thunderx_extra = [ ['RTE_MACHINE', '"thunderx"'], - ['RTE_USE_C11_MEM_MODEL', false]] + ['RTE_USE_C11_MEM_MODEL', false] +] flags_thunderx2_extra = [ ['RTE_MACHINE', '"thunderx2"'], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true]] + ['RTE_USE_C11_MEM_MODEL', true] +] flags_octeontx2_extra = [ ['RTE_MACHINE', '"octeontx2"'], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 36], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_EAL_IGB_UIO', false], - ['RTE_USE_C11_MEM_MODEL', true]] - -machine_args_default = [ - ['default', ['-march=armv8-a+crc']], - ['native', ['-march=native']], - ['0xd03', ['-mcpu=cortex-a53']], - ['0xd04', ['-mcpu=cortex-a35']], - ['0xd07', ['-mcpu=cortex-a57']], - ['0xd08', ['-mcpu=cortex-a72']], - ['0xd09', ['-mcpu=cortex-a73']], - ['0xd0a', ['-mcpu=cortex-a75']], - ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], flags_n1sdp_extra]] - -machine_args_cavium = [ - ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], - ['native', ['-march=native']], - ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra], - ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], - ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], - ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_thunderx2_extra], - ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_octeontx2_extra]] - -machine_args_emag = [ - ['default', ['-march=armv8-a+crc+crypto', '-mtune=emag']], - ['native', ['-march=native']]] + ['RTE_USE_C11_MEM_MODEL', true] +] +# arm config (implementer 0x41) is the default config +pn_config_default = { + 'generic': [['-march=armv8-a+crc']], + '0xd03': [['-mcpu=cortex-a53']], + '0xd04': [['-mcpu=cortex-a35']], + '0xd07': [['-mcpu=cortex-a57']], + '0xd08': [['-mcpu=cortex-a72']], + '0xd09': [['-mcpu=cortex-a73']], + '0xd0a': [['-mcpu=cortex-a75']], + '0xd0b': [['-mcpu=cortex-a76']], + '0xd0c': [['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], flags_n1sdp_extra] +} +pn_config_cavium = { + 'generic': [['-march=armv8-a+crc+crypto', '-mcpu=thunderx']], + '0xa1': [['-mcpu=thunderxt88'], flags_thunderx_extra], + '0xa2': [['-mcpu=thunderxt81'], flags_thunderx_extra], + '0xa3': [['-mcpu=thunderxt83'], flags_thunderx_extra], + '0xaf': [['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_thunderx2_extra], + '0xb2': [['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_octeontx2_extra], +} +pn_config_emag = { + 'generic': [['-march=armv8-a+crc+crypto', '-mtune=emag']] +} ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) -impl_generic = ['Generic armv8', flags_generic, machine_args_default] -impl_0x41 = ['Arm', flags_arm, machine_args_default] -impl_0x42 = ['Broadcom', flags_generic, machine_args_default] -impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium] -impl_0x44 = ['DEC', flags_generic, machine_args_default] -impl_0x49 = ['Infineon', flags_generic, machine_args_default] -impl_0x4d = ['Motorola', flags_generic, machine_args_default] -impl_0x4e = ['NVIDIA', flags_generic, machine_args_default] -impl_0x50 = ['Ampere Computing', flags_emag, machine_args_emag] -impl_0x51 = ['Qualcomm', flags_generic, machine_args_default] -impl_0x53 = ['Samsung', flags_generic, machine_args_default] -impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_default] -impl_0x69 = ['Intel', flags_generic, machine_args_default] -impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_default] +impl_generic = ['Generic armv8', flags_generic, pn_config_default] +impl_0x41 = ['Arm', flags_arm, pn_config_default] +impl_0x42 = ['Broadcom', flags_generic, pn_config_default] +impl_0x43 = ['Cavium', flags_cavium, pn_config_cavium] +impl_0x44 = ['DEC', flags_generic, pn_config_default] +impl_0x49 = ['Infineon', flags_generic, pn_config_default] +impl_0x4d = ['Motorola', flags_generic, pn_config_default] +impl_0x4e = ['NVIDIA', flags_generic, pn_config_default] +impl_0x50 = ['Ampere Computing', flags_emag, pn_config_emag] +impl_0x51 = ['Qualcomm', flags_generic, pn_config_default] +impl_0x53 = ['Samsung', flags_generic, pn_config_default] +impl_0x56 = ['Marvell ARMADA', flags_armada, pn_config_default] +impl_0x69 = ['Intel', flags_generic, pn_config_default] +impl_dpaa = ['NXP DPAA', flags_dpaa, pn_config_default] dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) if not dpdk_conf.get('RTE_ARCH_64') + # armv7 build dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_ARCH_ARMv7', 1) @@ -139,73 +154,82 @@ if not dpdk_conf.get('RTE_ARCH_64') # mk/machine/armv7a/rte.vars.mk sets it too machine_args += '-mfpu=neon' else - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) - dpdk_conf.set('RTE_ARCH_ARM64', 1) + # aarch64 build + if not meson.is_cross_build() + if machine == 'default' or machine == 'generic-arvm8' + # default build + impl_config = impl_generic + part_number = 'generic' + else + # native build + # The script returns ['Implementer', 'Variant', 'Architecture', + # 'Primary Part number', 'Revision'] + detect_vendor = find_program(join_paths( + meson.current_source_dir(), 'armv8_machine.py')) + cmd = run_command(detect_vendor.path()) + if cmd.returncode() == 0 + cmd_output = cmd.stdout().to_lower().strip().split(' ') + endif + if arm_force_native_march == true + part_number = 'native' + else + part_number = cmd_output[3] + endif + # Set to generic implementer if implementer is not found + impl_config = get_variable('impl_' + cmd_output[0], 'impl_generic') + endif + else + # cross build + impl_id = meson.get_cross_property('implementer_id', 'generic') + part_number = meson.get_cross_property('part_number', 'generic') + impl_config = get_variable('impl_' + impl_id) + endif - machine = [] - cmd_generic = ['generic', '', '', 'default', ''] - cmd_output = cmd_generic # Set generic by default - machine_args = [] # Clear previous machine args - if arm_force_generic_march and not meson.is_cross_build() - machine = impl_generic - impl_pn = 'default' + message('Arm implementer: ' + impl_config[0]) + message('Arm part number: ' + part_number) + + implementer_flags = impl_config[1] + part_number_config = impl_config[2] + + if part_number_config.has_key(part_number) + # use the specified part_number machine args if found + part_number_config = part_number_config[part_number] + elif part_number == 'native' + # use native machine args + part_number_config = [[native_machine_args]] elif not meson.is_cross_build() - # The script returns ['Implementer', 'Variant', 'Architecture', - # 'Primary Part number', 'Revision'] - detect_vendor = find_program(join_paths( - meson.current_source_dir(), 'armv8_machine.py')) - cmd = run_command(detect_vendor.path()) - if cmd.returncode() == 0 - cmd_output = cmd.stdout().to_lower().strip().split(' ') - endif - # Set to generic if variable is not found - machine = get_variable('impl_' + cmd_output[0], ['generic']) - if machine[0] == 'generic' - machine = impl_generic - cmd_output = cmd_generic - endif - impl_pn = cmd_output[3] - if arm_force_native_march == true - impl_pn = 'native' - endif + # default to generic machine args if part_number is not found + # and not forcing native machine args + # but don't default in cross-builds; if part_number is specified + # incorrectly in a cross-file, it needs to be fixed there + part_number_config = part_number_config['generic'] else - impl_id = meson.get_cross_property('implementor_id', 'generic') - impl_pn = meson.get_cross_property('implementor_pn', 'default') - machine = get_variable('impl_' + impl_id) + # cross build and part number is not in part_number_config + error('Cross build part number 0@0 not found.'.format(part_number)) endif - # Apply Common Defaults. These settings may be overwritten by machine - # settings later. - foreach flag: flags_common_default - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) + dpdk_flags = flags_common_default + implementer_flags + + if part_number_config.length() > 1 + dpdk_flags += part_number_config[1] + endif + + machine_args = [] # Clear previous machine args + foreach flag: part_number_config[0] + if cc.has_argument(flag) + machine_args += flag endif endforeach - message('Implementer : ' + machine[0]) - foreach flag: machine[1] + foreach flag: dpdk_flags if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif endforeach - foreach marg: machine[2] - if marg[0] == impl_pn - foreach flag: marg[1] - if cc.has_argument(flag) - machine_args += flag - endif - endforeach - # Apply any extra machine specific flags. - foreach flag: marg.get(2, flags_default_extra) - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) - endif - endforeach - endif - endforeach + endif -message(machine_args) +message('Using machine args: @0@'.format(machine_args)) if (cc.get_define('__ARM_NEON', args: machine_args) != '' or cc.get_define('__aarch64__', args: machine_args) != '') From patchwork Tue Oct 13 14:54:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 80571 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8D725A04B7; Tue, 13 Oct 2020 16:55:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6DD481DCC4; Tue, 13 Oct 2020 16:54:58 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 4669A1DBAA for ; Tue, 13 Oct 2020 16:54:54 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 1596BAB04C; Tue, 13 Oct 2020 16:54:53 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sONB6uuchAj3; Tue, 13 Oct 2020 16:54:51 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id B51AFB6B43; Tue, 13 Oct 2020 16:54:47 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Tue, 13 Oct 2020 16:54:39 +0200 Message-Id: <1602600882-695-4-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> References: <1600867161-15673-1-git-send-email-juraj.linkes@pantheon.tech> <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v2 3/6] build: automatic NUMA and cpu counts detection X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The build machine's number of cpus and numa nodes vary, resulting in mismatched counts of RTE_MAX_LCORE and RTE_MAX_NUMA_NODES for many builds. Automatically discover the host's numa and cpu counts to remove this mismatch for native builds. Use current defaults for cross builds. Leave users the option to override both if the specify a non-zero amount on the command line. Signed-off-by: Juraj Linkeš --- buildtools/get_cpu_count.py | 7 +++++++ buildtools/get_numa_count.py | 17 +++++++++++++++++ buildtools/meson.build | 2 ++ config/meson.build | 20 ++++++++++++++++++-- meson_options.txt | 8 ++++---- 5 files changed, 48 insertions(+), 6 deletions(-) create mode 100644 buildtools/get_cpu_count.py create mode 100644 buildtools/get_numa_count.py diff --git a/buildtools/get_cpu_count.py b/buildtools/get_cpu_count.py new file mode 100644 index 000000000..386f85f8b --- /dev/null +++ b/buildtools/get_cpu_count.py @@ -0,0 +1,7 @@ +#!/usr/bin/python3 +# SPDX-License-Identifier: BSD-3-Clause +# Copyright (c) 2020 PANTHEON.tech s.r.o. + +import os + +print(os.cpu_count()) diff --git a/buildtools/get_numa_count.py b/buildtools/get_numa_count.py new file mode 100644 index 000000000..f2ad35532 --- /dev/null +++ b/buildtools/get_numa_count.py @@ -0,0 +1,17 @@ +#!/usr/bin/python3 +# SPDX-License-Identifier: BSD-3-Clause +# Copyright (c) 2020 PANTHEON.tech s.r.o. + +import ctypes +import glob +import os + +if os.name == 'posix': + print(len(glob.glob('/sys/devices/system/node/node*'))) +elif os.name == 'nt': + libkernel32 = ctypes.windll.kernel32 + + count = ctypes.c_ulong() + + libkernel32.GetNumaHighestNodeNumber(ctypes.pointer(count)) + print(count.value + 1) diff --git a/buildtools/meson.build b/buildtools/meson.build index 04808dabc..925e733b1 100644 --- a/buildtools/meson.build +++ b/buildtools/meson.build @@ -17,3 +17,5 @@ else endif map_to_win_cmd = py3 + files('map_to_win.py') sphinx_wrapper = py3 + files('call-sphinx-build.py') +get_cpu_count_cmd = py3 + files('get_cpu_count.py') +get_numa_count_cmd = py3 + files('get_numa_count.py') diff --git a/config/meson.build b/config/meson.build index 4bd65d98e..84c31c8e7 100644 --- a/config/meson.build +++ b/config/meson.build @@ -226,8 +226,24 @@ foreach arg: warning_flags endforeach # set other values pulled from the build options -dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores')) -dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes')) +max_lcores = get_option('max_lcores') +if max_lcores == 0 + if meson.is_cross_build() + max_lcores = 4 + else + max_lcores = run_command(get_cpu_count_cmd).stdout() + endif +endif +dpdk_conf.set('RTE_MAX_LCORE', max_lcores) +max_numa_nodes = get_option('max_numa_nodes') +if max_numa_nodes == 0 + if meson.is_cross_build() + max_numa_nodes = 128 + else + max_numa_nodes = run_command(get_numa_count_cmd).stdout() + endif +endif +dpdk_conf.set('RTE_MAX_NUMA_NODES', max_numa_nodes) dpdk_conf.set('RTE_MAX_ETHPORTS', get_option('max_ethports')) dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet')) dpdk_conf.set('RTE_ENABLE_TRACE_FP', get_option('enable_trace_fp')) diff --git a/meson_options.txt b/meson_options.txt index 9bf18ab6b..60a949fca 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -26,10 +26,10 @@ option('machine', type: 'string', value: 'native', description: 'set the target machine type') option('max_ethports', type: 'integer', value: 32, description: 'maximum number of Ethernet devices') -option('max_lcores', type: 'integer', value: 128, - description: 'maximum number of cores/threads supported by EAL') -option('max_numa_nodes', type: 'integer', value: 4, - description: 'maximum number of NUMA nodes supported by EAL') +option('max_lcores', type: 'integer', value: 0, + description: 'maximum number of cores/threads supported by EAL. Value 0 means the number of cpus on the host will be used') +option('max_numa_nodes', type: 'integer', value: 0, + description: 'maximum number of NUMA nodes supported by EAL. Value 0 means the number of numa nodes on the host will be used') option('enable_trace_fp', type: 'boolean', value: false, description: 'enable fast path trace points.') option('tests', type: 'boolean', value: true, From patchwork Tue Oct 13 14:54:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 80574 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A8AF4A04B7; Tue, 13 Oct 2020 16:56:47 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 590021DD13; Tue, 13 Oct 2020 16:55:05 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id B17C61DC6D for ; Tue, 13 Oct 2020 16:54:57 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 3B1BAB6B41; Tue, 13 Oct 2020 16:54:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VRS7cxfR3x1Z; Tue, 13 Oct 2020 16:54:54 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 6150DB6B44; Tue, 13 Oct 2020 16:54:48 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Tue, 13 Oct 2020 16:54:40 +0200 Message-Id: <1602600882-695-5-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> References: <1600867161-15673-1-git-send-email-juraj.linkes@pantheon.tech> <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v2 4/6] build: move core and NUMA counts to cross files X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The values of RTE_MAX_NUMA_NODES and RTE_MAX_LCORE are going to vary for different build machines, even for the same Implementer ID and Part Number combinations. Move the fixed values to cross files and use automatic discovery/values from cmdline options for native build. Use predefined values for generic-armv8 build, since that build is not tied to the build machine. Signed-off-by: Juraj Linkeš --- config/arm/arm64_armada_linux_gcc | 2 ++ config/arm/arm64_armv8_linux_gcc | 5 ++++ config/arm/arm64_bluefield_linux_gcc | 1 + config/arm/arm64_dpaa_linux_gcc | 2 ++ config/arm/arm64_emag_linux_gcc | 2 ++ config/arm/arm64_n1sdp_linux_gcc | 2 ++ config/arm/arm64_octeontx2_linux_gcc | 2 ++ config/arm/arm64_stingray_linux_gcc | 1 + config/arm/arm64_thunderx2_linux_gcc | 2 ++ config/arm/arm64_thunderx_linux_gcc | 2 ++ config/arm/meson.build | 36 +++++++++++++++------------- 11 files changed, 41 insertions(+), 16 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 52c5f4476..dca2b911e 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x56' +max_numa_nodes = 1 +max_lcore = 16 diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 13ee8b223..ac12fa62d 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -26,3 +26,8 @@ implementer_id = 'generic' # '0xd0a': cortex-a75 # '0xd0b': cortex-a76 part_number = 'generic' + +# Supported extra configuration +# max_numa_nodes = n # will set RTE_MAX_NUMA_NODES +# max_lcore = n # will set RTE_MAX_LCORE +max_lcore = 256 diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index b79389d85..40265ac34 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -15,3 +15,4 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_lcore = 16 diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 573ae7e42..c5f738006 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = 'dpaa' +max_numa_nodes = 1 +max_lcore = 16 diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 24f3d533e..a2c10133f 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -14,3 +14,5 @@ endian = 'little' [properties] implementer_id = '0x50' +max_numa_nodes = 1 +max_lcore = 32 diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 6fb3f02ea..05fad95e8 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd0c' +max_numa_nodes = 1 +max_lcore = 4 diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index ac1042806..2ed9fd03d 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xb2' +max_numa_nodes = 1 +max_lcore = 36 diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index b79389d85..40265ac34 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -15,3 +15,4 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_lcore = 16 diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index dd257745e..d538a59e1 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xaf' +max_numa_nodes = 2 +max_lcore = 256 diff --git a/config/arm/arm64_thunderx_linux_gcc b/config/arm/arm64_thunderx_linux_gcc index 670764437..656d103e3 100644 --- a/config/arm/arm64_thunderx_linux_gcc +++ b/config/arm/arm64_thunderx_linux_gcc @@ -14,3 +14,5 @@ endian = 'little' [properties] implementer_id = '0x43' +max_numa_nodes = 1 +max_lcore = 96 diff --git a/config/arm/meson.build b/config/arm/meson.build index 646438f09..f525403f6 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -33,44 +33,40 @@ flags_common_default = [ ['RTE_ARCH_ARM64', true] ] +# add these to defaults when machine='generic-armv8' +flags_force_generic = [ + ['RTE_MAX_NUMA_NODES', 4], + ['RTE_MAX_LCORE', 256] +] + # implementer specific aarch64 flags, with middle priority # (will overwrite common flags) flags_generic = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 128] ] flags_arm = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64] ] flags_cavium = [ ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_NUMA_NODES', 2], - ['RTE_MAX_LCORE', 96], ['RTE_MAX_VFIO_GROUPS', 128] ] flags_dpaa = [ ['RTE_MACHINE', '"dpaa"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16], ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false] ] flags_emag = [ ['RTE_MACHINE', '"emag"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 32], ['RTE_CACHE_LINE_SIZE', 64] ] flags_armada = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16], ['RTE_CACHE_LINE_SIZE', 64] ] @@ -78,8 +74,6 @@ flags_armada = [ # (will overwrite both common and implementer specific flags) flags_n1sdp_extra = [ ['RTE_MACHINE', '"n1sdp"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 4], ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], ['RTE_LIBRTE_VHOST_NUMA', false] ] @@ -90,15 +84,11 @@ flags_thunderx_extra = [ flags_thunderx2_extra = [ ['RTE_MACHINE', '"thunderx2"'], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 2], - ['RTE_MAX_LCORE', 256], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true] ] flags_octeontx2_extra = [ ['RTE_MACHINE', '"octeontx2"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 36], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true] @@ -160,6 +150,7 @@ else # default build impl_config = impl_generic part_number = 'generic' + flags_common_default += flags_force_generic else # native build # The script returns ['Implementer', 'Variant', 'Architecture', @@ -214,6 +205,19 @@ else dpdk_flags += part_number_config[1] endif + # apply cross-specific options + if meson.is_cross_build() + # configure RTE_MAX_NUMA_NODES and RTE_MAX_LCORE from cross file + # RFC: do we want defaults for these two? or should we require + # that all cross file define them? + dpdk_flags += [ + ['RTE_MAX_NUMA_NODES', meson.get_cross_property('max_numa_nodes', 1)] + ] + dpdk_flags += [ + ['RTE_MAX_LCORE', meson.get_cross_property('max_lcore', 16)] + ] + endif + machine_args = [] # Clear previous machine args foreach flag: part_number_config[0] if cc.has_argument(flag) From patchwork Tue Oct 13 14:54:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 80573 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A3190A04B7; Tue, 13 Oct 2020 16:56:27 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C10B51DD0E; Tue, 13 Oct 2020 16:55:03 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id A971B1DC59 for ; Tue, 13 Oct 2020 16:54:56 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 52A49B6B43; Tue, 13 Oct 2020 16:54:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vXK_x8DhFcKQ; Tue, 13 Oct 2020 16:54:54 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id E6EA7B6B46; Tue, 13 Oct 2020 16:54:48 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Tue, 13 Oct 2020 16:54:41 +0200 Message-Id: <1602600882-695-6-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> References: <1600867161-15673-1-git-send-email-juraj.linkes@pantheon.tech> <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v2 5/6] build: disable Arm drivers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" A few options that disabled drivers in the old makefiles were improperly ported to the meson build system. Fix this by adding a to the list of disabled drivers, similarly how the command line option works. Signed-off-by: Juraj Linkeš Acked-by: Bruce Richardson --- config/arm/meson.build | 9 +++++---- drivers/meson.build | 2 +- meson.build | 1 + 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index f525403f6..3a1e13f64 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -8,6 +8,11 @@ arm_force_native_march = false native_machine_args = ['-march=native', '-mtune=native'] +# RFC: do we want these drivers to be disabled by default on arm? +# The previous way to disable these drivers never worked +# RTE_LIBRTE_AVP_PMD and the rest would be overwritten to true if the necessary deps were found +disabled_drivers += ['net/avp', 'net/fm10k', 'net/sfc'] + # common flags to all aarch64 builds, with lowest priority flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -23,10 +28,6 @@ flags_common_default = [ # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], - ['RTE_LIBRTE_FM10K_PMD', false], - ['RTE_LIBRTE_SFC_EFX_PMD', false], - ['RTE_LIBRTE_AVP_PMD', false], - ['RTE_SCHED_VECTOR', false], ['RTE_ARM_USE_WFE', false], ['RTE_CACHE_LINE_SIZE', 128], diff --git a/drivers/meson.build b/drivers/meson.build index 5f9526557..f9250f3bb 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -17,7 +17,7 @@ subdirs = [ 'baseband', # depends on common and bus. ] -disabled_drivers = run_command(list_dir_globs, get_option('disable_drivers'), +disabled_drivers += run_command(list_dir_globs, get_option('disable_drivers'), ).stdout().split() default_cflags = machine_args diff --git a/meson.build b/meson.build index 61d9a4f5f..8dadd70dc 100644 --- a/meson.build +++ b/meson.build @@ -21,6 +21,7 @@ dpdk_drivers = [] dpdk_extra_ldflags = [] dpdk_libs_disabled = [] dpdk_drvs_disabled = [] +disabled_drivers = [] abi_version_file = files('ABI_VERSION') if host_machine.cpu_family().startswith('x86') From patchwork Tue Oct 13 14:54:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 80575 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BEA2CA04B7; Tue, 13 Oct 2020 16:57:13 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E73531DD20; Tue, 13 Oct 2020 16:55:06 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 4824B1DCD6 for ; Tue, 13 Oct 2020 16:54:58 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 6E3B0B6A8F; Tue, 13 Oct 2020 16:54:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Xhc7xspqbJvP; Tue, 13 Oct 2020 16:54:56 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 47119B6B49; Tue, 13 Oct 2020 16:54:50 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Tue, 13 Oct 2020 16:54:42 +0200 Message-Id: <1602600882-695-7-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> References: <1600867161-15673-1-git-send-email-juraj.linkes@pantheon.tech> <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v2 6/6] build: update Arm builds with makefile flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Not all flags were moved properly from the old Makefile build system. Disable corresponding drivers and libnuma in cross files and remove deprecated config. Signed-off-by: Juraj Linkeš --- config/arm/arm64_armada_linux_gcc | 2 ++ config/arm/arm64_armv8_linux_gcc | 8 ++++++-- config/arm/arm64_bluefield_linux_gcc | 1 + config/arm/arm64_dpaa_linux_gcc | 1 + config/arm/arm64_n1sdp_linux_gcc | 1 + config/arm/arm64_octeontx2_linux_gcc | 1 + config/arm/arm64_stingray_linux_gcc | 1 + config/arm/meson.build | 5 ++++- drivers/meson.build | 4 ++++ 9 files changed, 21 insertions(+), 3 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index dca2b911e..8fa856fed 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -17,3 +17,5 @@ endian = 'little' implementer_id = '0x56' max_numa_nodes = 1 max_lcore = 16 +has_libnuma = 0 +disabled_drivers = ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index ac12fa62d..797152b9e 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -28,6 +28,10 @@ implementer_id = 'generic' part_number = 'generic' # Supported extra configuration -# max_numa_nodes = n # will set RTE_MAX_NUMA_NODES -# max_lcore = n # will set RTE_MAX_LCORE +# max_numa_nodes = n # will set RTE_MAX_NUMA_NODES +# max_lcore = n # will set RTE_MAX_LCORE max_lcore = 256 + +# has_libnuma = 0 # set to 0 if the SoC is not a NUMA system +# disabled_drivers += ['bus/dpaa', 'crypto'] + # add to the set of disabled libraries diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 40265ac34..e25067b7e 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -16,3 +16,4 @@ endian = 'little' implementer_id = '0x41' part_number = '0xd08' max_lcore = 16 +has_libnuma = 0 diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index c5f738006..120e90ed9 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -17,3 +17,4 @@ endian = 'little' implementer_id = 'dpaa' max_numa_nodes = 1 max_lcore = 16 +has_libnuma = 0 diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 05fad95e8..0d249dffa 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd0c' max_numa_nodes = 1 max_lcore = 4 +has_libnuma = 0 diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 2ed9fd03d..56495d655 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x43' part_number = '0xb2' max_numa_nodes = 1 max_lcore = 36 +has_libnuma = 0 diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 40265ac34..e25067b7e 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -16,3 +16,4 @@ endian = 'little' implementer_id = '0x41' part_number = '0xd08' max_lcore = 16 +has_libnuma = 0 diff --git a/config/arm/meson.build b/config/arm/meson.build index 3a1e13f64..c1067dbb5 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -91,7 +91,6 @@ flags_thunderx2_extra = [ flags_octeontx2_extra = [ ['RTE_MACHINE', '"octeontx2"'], ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true] ] # arm config (implementer 0x41) is the default config @@ -217,6 +216,10 @@ else dpdk_flags += [ ['RTE_MAX_LCORE', meson.get_cross_property('max_lcore', 16)] ] + cross_has_libnuma = meson.get_cross_property('has_libnuma', '') + if cross_has_libnuma != '' + has_libnuma = cross_has_libnuma + endif endif machine_args = [] # Clear previous machine args diff --git a/drivers/meson.build b/drivers/meson.build index f9250f3bb..b14d62fe4 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -20,6 +20,10 @@ subdirs = [ disabled_drivers += run_command(list_dir_globs, get_option('disable_drivers'), ).stdout().split() +if meson.is_cross_build() + disabled_drivers += meson.get_cross_property('disabled_drivers', []) +endif + default_cflags = machine_args default_cflags += ['-DALLOW_EXPERIMENTAL_API'] default_cflags += ['-DALLOW_INTERNAL_API']