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This document introduces the enetc driver, supported platforms and supported features. Signed-off-by: Gagandeep Singh --- MAINTAINERS | 5 + doc/guides/nics/enetc.rst | 164 +++++++++++++++++++++++++++++ doc/guides/nics/features/enetc.ini | 8 ++ doc/guides/nics/index.rst | 1 + 4 files changed, 178 insertions(+) create mode 100644 doc/guides/nics/enetc.rst create mode 100644 doc/guides/nics/features/enetc.ini diff --git a/MAINTAINERS b/MAINTAINERS index 9fd258fad..eaf75b7bf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -627,6 +627,11 @@ F: drivers/net/nfp/ F: doc/guides/nics/nfp.rst F: doc/guides/nics/features/nfp*.ini +NXP enetc +M: Gagandeep Singh +F: doc/guides/nics/enetc.rst +F: doc/guides/nics/features/enetc.ini + NXP dpaa M: Hemant Agrawal M: Shreyansh Jain diff --git a/doc/guides/nics/enetc.rst b/doc/guides/nics/enetc.rst new file mode 100644 index 000000000..067cd474b --- /dev/null +++ b/doc/guides/nics/enetc.rst @@ -0,0 +1,164 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright 2018 NXP + +ENETC Poll Mode Driver +====================== + +The ENETC NIC PMD (**librte_pmd_enetc**) provides poll mode driver +support for the inbuilt NIC found in the **NXP LS1028** SoC. + +More information can be found at `NXP Official Website +`_. + +ENETC +----- + +This section provides an overview of the NXP ENETC +and how it is integrated into the DPDK. + +Contents summary + +- ENETC overview +- ENETC features +- PCI bus driver +- NIC driver +- Supported ENETC SoCs +- Prerequisites +- Driver compilation and testing + +ENETC Overview +~~~~~~~~~~~~~~ + +Reference: `NXP ENETC OVERVIEW `_. + +ENETC is a PCI Integrated End Point(IEP). IEP implements +peripheral devices in an SoC such that software sees them as PCIe device. +ENETC is an evolution of BDR(Buffer Descriptor Ring) based networking +IPs, introducing several changes intended to bring NXP IP up to date +with developments in the industry and support new areas like virtualization. +A major development is the use of a PCI bus for presentation of the IP +to software, which has implications to the software architecture. + +This infrastructure simplifies adding support for IEP and facilitates in following: + +- Device discovery and location +- Resource requirement discovery and allocation (e.g. interrupt assignment, + device register address) +- Event reporting + +ENETC Features +~~~~~~~~~~~~~~ + + +NIC Driver (PMD) +~~~~~~~~~~~~~~~~ + +ENETC PMD is traditional DPDK PMD which provides necessary interface between +RTE framework and ENETC internal drivers. + +- Driver registers the device vendor table in PCI subsystem. +- RTE framework scans the PCI bus for connected devices. +- This scanning will invoke the probe function of ENETC driver. +- The probe function will set the basic device registers and also setups BD rings. +- On packet Rx the respective BD Ring status bit is set which is then used for + packet processing. +- Then Tx is done first followed by Rx. + +Supported ENETC SoCs +~~~~~~~~~~~~~~~~~~~~ + +- LS1028 + +Prerequisites +~~~~~~~~~~~~~ + +There are three main pre-requisities for executing ENETC PMD on a ENETC +compatible board: + +1. **ARM 64 Tool Chain** + + For example, the `*aarch64* Linaro Toolchain `_. + +2. **Linux Kernel** + + It can be obtained from `NXP's Github hosting `_. + +3. **Rootfile system** + + Any *aarch64* supporting filesystem can be used. For example, + Ubuntu 15.10 (Wily) or 16.04 LTS (Xenial) userland which can be obtained + from `here `_. + +The following dependencies are not part of DPDK and must be installed +separately: + +- **NXP Linux LSDK** + + NXP Layerscape software development kit (LSDK) includes support for family + of QorIQ® ARM-Architecture-based system on chip (SoC) processors + and corresponding boards. + + It includes the Linux board support packages (BSPs) for NXP SoCs, + a fully operational tool chain, kernel and board specific modules. + + LSDK and related information can be obtained from: `LSDK `_ + +Driver compilation and testing +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +#. Please refer the document :ref:`compiling and testing a PMD for a NIC ` + to compile the driver. Please use target "arm64-armv8a-linuxapp-gcc" and disable the below config flags + while compilation: + + - ``CONFIG_RTE_EAL_IGB_UIO=n`` + - ``CONFIG_RTE_KNI_KMOD=n`` + - ``CONFIG_RTE_LIBRTE_VHOST_NUMA=n`` + - ``CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n`` + + Refer to the document :ref:`cross build dpdk for arm63 ` to + disable flags and for cross compilation + +#. To compile in performance mode, please also set ``CONFIG_RTE_CACHE_LINE_SIZE=64`` + +#. Running l2fwd: + + Follow instructions available in the document + :ref:`compiling and testing a PMD for a NIC ` + to run l2fwd. + + - First unbind the ports from kernel + + - echo vfio-pci > /sys/bus/pci/devices/0000\:00\:00.1/driver_override + - echo 0000:00:00.1 > /sys/bus/pci/drivers/fsl_enetc/unbind + - echo vfio-pci > /sys/bus/pci/devices/0000\:00\:00.0/driver_override + - echo 0000:00:00.0 > /sys/bus/pci/drivers/fsl_enetc/unbind + - Then bind them to VFIO, so that DPDK application can use them + + - echo 0000:00:00.1 > /sys/bus/pci/drivers/vfio-pci/bind + - echo 0000:00:00.0 > /sys/bus/pci/drivers/vfio-pci/bind + - Mount Hugepages + + - mkdir /mnt/hugepages + - mount -t hugetlbfs none /mnt/hugepages + - Run l2fwd application + +Example output: + + .. code-block:: console + + ./l2fwd -c 0x3 -n 1 --log-level=8 -- -p 0x3 -q 1 -T 0 + + ..... + EAL: Registered [pci] bus. + EAL: Detected 2 lcore(s) + ..... + EAL: Bus scan completed + ..... + Configuring Port 0 (socket 0) + Port 0: 00:00:00:00:00:01 + Configuring Port 1 (socket 0) + Port 1: 00:00:00:00:00:02 + ..... + Checking link statuses... + Port 0 Link Up - speed 0 Mbps - full-duplex + Port 1 Link Up - speed 0 Mbps - full-duplex diff --git a/doc/guides/nics/features/enetc.ini b/doc/guides/nics/features/enetc.ini new file mode 100644 index 000000000..fb1bf5989 --- /dev/null +++ b/doc/guides/nics/features/enetc.ini @@ -0,0 +1,8 @@ +; +; Supported features of the 'enetc' network poll mode driver. +; +; Refer to default.ini for the full list of available PMD features. +; +[Features] +ARMv8 = Y +Usage doc = Y diff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst index 59f6063dc..0323035d3 100644 --- a/doc/guides/nics/index.rst +++ b/doc/guides/nics/index.rst @@ -21,6 +21,7 @@ Network Interface Controller Drivers dpaa2 e1000em ena + enetc enic fm10k i40e From patchwork Thu Sep 6 05:54:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gagandeep Singh X-Patchwork-Id: 44317 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 13C7C4C91; Thu, 6 Sep 2018 07:55:42 +0200 (CEST) Received: from EUR02-HE1-obe.outbound.protection.outlook.com (mail-eopbgr10050.outbound.protection.outlook.com [40.107.1.50]) by dpdk.org (Postfix) with ESMTP id 0DBC8326C for ; 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AM4PR04MB1521; 6:usext6igaAJIxLF5gHJZtbJZF/3LyvbDwpNqZxp4NT0GbhJRSjJjCLbdIiZqezsVrYaB+0vVOQxZUQNi6fFV8SSXOkHX/P66IvhNyTjLoQubkS98aAs+PXzTvz4OZiiquhZiZyYAFPHWE5LpIUFyeNbWEs1NtVIGzdNQEZAHpaAeLVJtAFuIQ3qJFLwlw+MlmaSt+YDqPpqIPjtYfslPOBBLrtFZKazcAK1W+lh8UIg0KRxqgLrqbb/6KX2f3NBPCwRHSKMnd/3PXrCResBmivwDsi4m6DgQ0aeRamxSFL8wYyESxUevIYCTbr5WblrVo0HKVrkQwBa8RoQH7bY0jZ/896uJdw7V64t4ahN71+qQ27eGFbxUUZx1X+bbwwrZtc3KRQRBwOa8IjPFGTA9CZEYMAqz7CSspxb6AqREt6Ky0l/Q8lz1jej4cYaxJStwyHUTvAKKI9aU+ivFwebzXA==; 5:d5YuFjXI+mRROd6A55FBvnsR4bmrujYYIPCG25LBUiSZfiGhOtvAApM/7ilV6sZsIKiQmQh+TJ4+EpfY2Gwu4kmZS7DUlFdb439bJo3NDrtP7p+FYpRHT1HMkZ7zHULfOTfExP/Ekhorx8HooT8ezp2rUVOx5OqeOoMOXW0KBbs=; 7:1qw1Ol3/etaHIe5NclUiiOO02G2HNV4LN465q1heseAvv4BBqX4COjgqgUk1JZClAJG93g2W6heZmYdIAy9iTyh8sochWe/Y4VlOplYtJ8QWLLfacea79YNiurDKlDfEsqorvyo68EGinR/at7cJBQaJ8L1uyr0EV2joNDNasNDaOMOPPpYRxAJ2kj/dvt5gppHFy/4iG2R352oesyV3G6fSJTWCqjO5Z72Hd1pnAWBNuP22QqwJoLJBWtrnoBhQ SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Sep 2018 05:55:34.2822 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 76d22d51-e48f-47ac-218f-08d613bd5d45 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR04MB1521 Subject: [dpdk-dev] [PATCH 2/3] net/enetc: add ENETC PMD with basic operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch introduces the enetc PMD with basic initialisation functions includes probe, teardown, hardware intialisation Signed-off-by: Gagandeep Singh --- MAINTAINERS | 1 + config/common_base | 5 + config/common_linuxapp | 5 + doc/guides/nics/enetc.rst | 1 + doc/guides/nics/features/enetc.ini | 2 + drivers/net/Makefile | 1 + drivers/net/enetc/Makefile | 24 ++ drivers/net/enetc/base/enetc_hw.h | 220 ++++++++++++++++ drivers/net/enetc/enetc.h | 111 ++++++++ drivers/net/enetc/enetc_ethdev.c | 269 ++++++++++++++++++++ drivers/net/enetc/enetc_logs.h | 40 +++ drivers/net/enetc/meson.build | 10 + drivers/net/enetc/rte_pmd_enetc_version.map | 4 + drivers/net/meson.build | 1 + mk/rte.app.mk | 1 + 15 files changed, 695 insertions(+) create mode 100644 drivers/net/enetc/Makefile create mode 100644 drivers/net/enetc/base/enetc_hw.h create mode 100644 drivers/net/enetc/enetc.h create mode 100644 drivers/net/enetc/enetc_ethdev.c create mode 100644 drivers/net/enetc/enetc_logs.h create mode 100644 drivers/net/enetc/meson.build create mode 100644 drivers/net/enetc/rte_pmd_enetc_version.map diff --git a/MAINTAINERS b/MAINTAINERS index eaf75b7bf..fac43bd2a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -629,6 +629,7 @@ F: doc/guides/nics/features/nfp*.ini NXP enetc M: Gagandeep Singh +F: drivers/net/enetc/ F: doc/guides/nics/enetc.rst F: doc/guides/nics/features/enetc.ini diff --git a/config/common_base b/config/common_base index 4bcbaf923..474b1da4c 100644 --- a/config/common_base +++ b/config/common_base @@ -910,3 +910,8 @@ CONFIG_RTE_APP_CRYPTO_PERF=y # Compile the eventdev application # CONFIG_RTE_APP_EVENTDEV=y + +# +# Compile NXP ENETC PMD Driver +# +CONFIG_RTE_LIBRTE_ENETC_PMD=n diff --git a/config/common_linuxapp b/config/common_linuxapp index 9c5ea9d89..485e1467d 100644 --- a/config/common_linuxapp +++ b/config/common_linuxapp @@ -44,3 +44,8 @@ CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV=y CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=y + +# +# NXP ENETC PMD Driver +# +CONFIG_RTE_LIBRTE_ENETC_PMD=y diff --git a/doc/guides/nics/enetc.rst b/doc/guides/nics/enetc.rst index 067cd474b..688a2fa71 100644 --- a/doc/guides/nics/enetc.rst +++ b/doc/guides/nics/enetc.rst @@ -49,6 +49,7 @@ This infrastructure simplifies adding support for IEP and facilitates in followi ENETC Features ~~~~~~~~~~~~~~ +- Link Status NIC Driver (PMD) ~~~~~~~~~~~~~~~~ diff --git a/doc/guides/nics/features/enetc.ini b/doc/guides/nics/features/enetc.ini index fb1bf5989..83b20845a 100644 --- a/doc/guides/nics/features/enetc.ini +++ b/doc/guides/nics/features/enetc.ini @@ -4,5 +4,7 @@ ; Refer to default.ini for the full list of available PMD features. ; [Features] +Link status = Y +Linux VFIO = Y ARMv8 = Y Usage doc = Y diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 664398de9..3ad436045 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -24,6 +24,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2 endif DIRS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000 DIRS-$(CONFIG_RTE_LIBRTE_ENA_PMD) += ena +DIRS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += enetc DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic DIRS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += failsafe DIRS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k diff --git a/drivers/net/enetc/Makefile b/drivers/net/enetc/Makefile new file mode 100644 index 000000000..3f4ba97da --- /dev/null +++ b/drivers/net/enetc/Makefile @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright 2018 NXP + +include $(RTE_SDK)/mk/rte.vars.mk + +# +# library name +# +LIB = librte_pmd_enetc.a + +CFLAGS += -O3 +EXPORT_MAP := rte_pmd_enetc_version.map +LIBABIVER := 1 + +# +# all source are stored in SRCS-y +# +SRCS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += enetc_ethdev.c + +LDLIBS += -lrte_eal +LDLIBS += -lrte_ethdev +LDLIBS += -lrte_bus_pci + +include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/net/enetc/base/enetc_hw.h b/drivers/net/enetc/base/enetc_hw.h new file mode 100644 index 000000000..806b26a2c --- /dev/null +++ b/drivers/net/enetc/base/enetc_hw.h @@ -0,0 +1,220 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2018 NXP + */ + +#ifndef _ENETC_HW_H_ +#define _ENETC_HW_H_ +#include + +#define BIT(x) ((uint64_t)1 << ((x))) + +/* ENETC device IDs */ +#define ENETC_DEV_ID_VF 0xef00 +#define ENETC_DEV_ID 0xe100 + +/* ENETC register block BAR */ +#define ENETC_BAR_REGS 0x0 + +/* SI regs, offset: 0h */ +#define ENETC_SIMR 0x0 +#define ENETC_SIMR_EN BIT(31) + +#define ENETC_SIPMAR0 0x80 +#define ENETC_SIPMAR1 0x84 + +#define ENETC_SICAPR0 0x900 +#define ENETC_SICAPR1 0x904 + +#define ENETC_SIMSITRV(n) (0xB00 + (n) * 0x4) +#define ENETC_SIMSIRRV(n) (0xB80 + (n) * 0x4) + +#define ENETC_SICCAPR 0x1200 + +/* enum for BD type */ +enum enetc_bdr_type {TX, RX}; + +#define ENETC_BDR(type, n, off) (0x8000 + (type) * 0x100 + (n) * 0x200 \ + + (off)) +/* RX BDR reg offsets */ +#define ENETC_RBMR 0x0 /* RX BDR mode register*/ +#define ENETC_RBMR_EN BIT(31) + +#define ENETC_RBSR 0x4 /* Rx BDR status register*/ +#define ENETC_RBBSR 0x8 /* Rx BDR buffer size register*/ +#define ENETC_RBCIR 0xc /* Rx BDR consumer index register*/ +#define ENETC_RBBAR0 0x10 /* Rx BDR base address register 0 */ +#define ENETC_RBBAR1 0x14 /* Rx BDR base address register 1*/ +#define ENETC_RBPIR 0x18 /* Rx BDR producer index register*/ +#define ENETC_RBLENR 0x20 /* Rx BDR length register*/ +#define ENETC_RBIER 0xa0 /* Rx BDR interrupt enable register*/ +#define ENETC_RBIER_RXTIE BIT(0) +#define ENETC_RBIDR 0xa4 /* Rx BDR interrupt detect register*/ +#define ENETC_RBICIR0 0xa8 /* Rx BDR inetrrupt coalescing register 0*/ +#define ENETC_RBICIR0_ICEN BIT(31) + + +#define ENETC_TBMR 0x0 /* Tx BDR mode register (TBMR) 32 RW */ +#define ENETC_TBSR 0x4 /* x BDR status register (TBSR) 32 RO */ +#define ENETC_TBBAR0 0x10 /* Tx BDR base address register 0 (TBBAR0) 32 RW */ +#define ENETC_TBBAR1 0x14 /* Tx BDR base address register 1 (TBBAR1) 32 RW */ +#define ENETC_TBCIR 0x18 /* Tx BDR consumer index register (TBCIR) 32 RW */ +#define ENETC_TBCISR 0x1C /* Tx BDR consumer index shadow register 32 RW */ +#define ENETC_TBIER 0xA0 /* Tx BDR interrupt enable register 32 RW */ +#define ENETC_TBIDR 0xA4 /* Tx BDR interrupt detect register 32 RO */ +#define ENETC_TBICR0 0xA8 /* Tx BDR interrupt coalescing register 0 32 RW */ +#define ENETC_TBICR1 0xAC /* Tx BDR interrupt coalescing register 1 32 RW */ +#define ENETC_TBLENR 0x20 + +#define ENETC_TBCISR_IDX_MASK 0xffff +#define ENETC_TBIER_TXFIE BIT(1) + +#define ENETC_RTBLENR_LEN(n) ((n) & ~0x7) +#define ENETC_TBMR_EN BIT(31) + +/* Port regs, offset: 1_0000h */ +#define ENETC_PORT_BASE 0x10000 +#define ENETC_PMR 0x00000 +#define ENETC_PMR_EN (BIT(16) | BIT(17) | BIT(18)) +#define ENETC_PSR 0x00004 /* RO */ +#define ENETC_PSIPMR 0x00018 +#define ENETC_PSIPMR_SET_UP(n) (0x1 << (n)) /* n = SI index */ +#define ENETC_PSIPMR_SET_MP(n) (0x1 << ((n) + 8)) +#define ENETC_PSIPMR_SET_VLAN_MP(n) (0x1 << ((n) + 16)) +#define ENETC_PSIPMAR0(n) (0x00100 + (n) * 0x20) +#define ENETC_PSIPMAR1(n) (0x00104 + (n) * 0x20) +#define ENETC_PCAPR0 0x00900 +#define ENETC_PCAPR1 0x00904 + +#define ENETC_PV0CFGR(n) (0x00920 + (n) * 0x10) +#define ENETC_PVCFGR_SET_TXBDR(val) ((val) & 0xff) +#define ENETC_PVCFGR_SET_RXBDR(val) (((val) & 0xff) << 16) + +#define ENETC_PM0_CMD_CFG 0x08008 +#define ENETC_PM0_TX_EN BIT(0) +#define ENETC_PM0_RX_EN BIT(1) + +#define ENETC_PM0_MAXFRM 0x08014 +#define ENETC_SET_MAXFRM(val) ((val) << 16) + +/* Global regs, offset: 2_0000h */ +#define ENETC_GLOBAL_BASE 0x20000 +#define ENETC_G_EIPBRR0 0x00bf8 +#define ENETC_G_EIPBRR1 0x00bfc + +#define ETH_ADDR_LEN 6 + +/* general register accessors */ +#define enetc_rd_reg(reg) rte_read32((reg)) +#define enetc_wr_reg(reg, val) rte_write32((val), (reg)) +#define enetc_rd(hw, off) enetc_rd_reg((hw)->reg + (off)) +#define enetc_wr(hw, off, val) enetc_wr_reg((hw)->reg + (off), val) +/* port register accessors - PF only */ +#define enetc_port_rd(hw, off) enetc_rd_reg((hw)->port + (off)) +#define enetc_port_wr(hw, off, val) enetc_wr_reg((hw)->port + (off), val) +/* global register accessors - PF only */ +#define enetc_global_rd(hw, off) enetc_rd_reg((hw)->global + (off)) +#define enetc_global_wr(hw, off, val) enetc_wr_reg((hw)->global + (off), val) +/* BDR register accessors, see ENETC_BDR() */ +#define enetc_bdr_rd(hw, t, n, off) \ + enetc_rd(hw, ENETC_BDR(t, n, off)) +#define enetc_bdr_wr(hw, t, n, off, val) \ + enetc_wr(hw, ENETC_BDR(t, n, off), val) + +#define enetc_txbdr_rd(hw, n, off) enetc_bdr_rd(hw, TX, n, off) +#define enetc_rxbdr_rd(hw, n, off) enetc_bdr_rd(hw, RX, n, off) +#define enetc_txbdr_wr(hw, n, off, val) \ + enetc_bdr_wr(hw, TX, n, off, val) +#define enetc_rxbdr_wr(hw, n, off, val) \ + enetc_bdr_wr(hw, RX, n, off, val) + +#define ENETC_TX_ADDR(txq, addr) ((void *)(txq->enetc_txbdr + addr)) + +#define ENETC_TXBD_FLAGS_IE BIT(13) +#define ENETC_TXBD_FLAGS_F BIT(15) + +/* ENETC Parsed values (Little Endian) */ +#define ENETC_PKT_TYPE_ETHER 0x0060 +#define ENETC_PKT_TYPE_IPV4 0x0000 +#define ENETC_PKT_TYPE_IPV6 0x0020 +#define ENETC_PKT_TYPE_IPV4_TCP \ + (0x0010 | ENETC_PKT_TYPE_IPV4) +#define ENETC_PKT_TYPE_IPV6_TCP \ + (0x0010 | ENETC_PKT_TYPE_IPV6) +#define ENETC_PKT_TYPE_IPV4_UDP \ + (0x0011 | ENETC_PKT_TYPE_IPV4) +#define ENETC_PKT_TYPE_IPV6_UDP \ + (0x0011 | ENETC_PKT_TYPE_IPV6) +#define ENETC_PKT_TYPE_IPV4_SCTP \ + (0x0013 | ENETC_PKT_TYPE_IPV4) +#define ENETC_PKT_TYPE_IPV6_SCTP \ + (0x0013 | ENETC_PKT_TYPE_IPV6) +#define ENETC_PKT_TYPE_IPV4_ICMP \ + (0x0003 | ENETC_PKT_TYPE_IPV4) +#define ENETC_PKT_TYPE_IPV6_ICMP \ + (0x0003 | ENETC_PKT_TYPE_IPV6) + +/* PCI device info */ +struct enetc_hw { + /* SI registers, used by all PCI functions */ + void *reg; + /* Port registers, PF only */ + void *port; + /* IP global registers, PF only */ + void *global; +}; + +struct enetc_eth_mac_info { + uint8_t addr[ETH_ADDR_LEN]; + uint8_t perm_addr[ETH_ADDR_LEN]; + bool get_link_status; +}; + +struct enetc_eth_hw { + struct net_device *ndev; + struct enetc_hw hw; + uint16_t device_id; + uint16_t vendor_id; + uint8_t revision_id; + struct enetc_eth_mac_info mac; +}; + +/* Transmit Descriptor */ +struct enetc_tx_desc { + uint64_t addr; + uint16_t frm_len; + uint16_t buf_len; + uint32_t flags_errors; +}; + +/* TX Buffer Descriptors (BD) */ +struct enetc_tx_bd { + uint64_t addr; + uint16_t buf_len; + uint16_t frm_len; + uint16_t err_csum; + uint16_t flags; +}; + +/* RX buffer descriptor */ +union enetc_rx_bd { + struct { + uint64_t addr; + uint8_t reserved[8]; + } w; + struct { + uint16_t inet_csum; + uint16_t parse_summary; + uint32_t rss_hash; + uint16_t buf_len; + uint16_t vlan_opt; + union { + struct { + uint16_t flags; + uint16_t error; + }; + uint32_t lstatus; + }; + } r; +}; + +#endif diff --git a/drivers/net/enetc/enetc.h b/drivers/net/enetc/enetc.h new file mode 100644 index 000000000..2dc9f042a --- /dev/null +++ b/drivers/net/enetc/enetc.h @@ -0,0 +1,111 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2018 NXP + */ + +#ifndef _ENETC_H_ +#define _ENETC_H_ + +#include + +#include "base/enetc_hw.h" + +#define PCI_VENDOR_ID_FREESCALE 0x1957 + +/* Max TX rings per ENETC. */ +#define MAX_TX_RINGS 2 + +/* Max RX rings per ENTEC. */ +#define MAX_RX_RINGS 1 + +/* Max BD counts per Ring. */ +#define MAX_BD_COUNT 256 + +/* + * upper_32_bits - return bits 32-63 of a number + * @n: the number we're accessing + * + * A basic shift-right of a 64- or 32-bit quantity. Use this to suppress + * the "right shift count >= width of type" warning when that quantity is + * 32-bits. + */ +#define upper_32_bits(n) ((uint32_t)(((n) >> 16) >> 16)) + +/* + * lower_32_bits - return bits 0-31 of a number + * @n: the number we're accessing + */ +#define lower_32_bits(n) ((uint32_t)(n)) + +#define ENETC_TXBD(BDR, i) (&(((struct enetc_tx_bd *)((BDR).bd_base))[i])) +#define ENETC_RXBD(BDR, i) (&(((union enetc_rx_bd *)((BDR).bd_base))[i])) + +struct enetc_swbd { + struct rte_mbuf *buffer_addr; +}; + +struct enetc_bdr { + struct net_device *ndev; + struct rte_mempool *mb_pool; /* mbuf pool to populate RX ring. */ + void *bd_base; /* points to Rx or Tx BD ring */ + union { + void *tcir; + void *rcir; + }; + uint16_t index; + int bd_count; /* # of BDs */ + int next_to_use; + int next_to_clean; + struct enetc_swbd *q_swbd; + union { + void *tcisr; /* Tx */ + int next_to_alloc; /* Rx */ + }; +}; + +/* + * Structure to store private data for each driver instance (for each port). + */ +struct enetc_eth_adapter { + struct net_device *ndev; + struct enetc_eth_hw hw; + uint16_t num_rx_rings, num_tx_rings; + uint16_t rx_bd_count, tx_bd_count; + struct enetc_bdr *tx_ring[MAX_TX_RINGS]; + struct enetc_bdr *rx_ring[MAX_RX_RINGS]; +}; + +#define ENETC_DEV_PRIVATE(adapter) \ + ((struct enetc_eth_adapter *)adapter) + +#define ENETC_DEV_PRIVATE_TO_HW(adapter) \ + (&((struct enetc_eth_adapter *)adapter)->hw) + +#define ENETC_DEV_PRIVATE_TO_STATS(adapter) \ + (&((struct enetc_eth_adapter *)adapter)->stats) + +#define ENETC_DEV_PRIVATE_TO_INTR(adapter) \ + (&((struct enetc_eth_adapter *)adapter)->intr) + +#define ENETC_GET_HW_ADDR(reg, addr) ((void *)(reg + addr)) +#define ENETC_REG_READ(addr) (*(uint32_t *)addr) +#define ENETC_REG_WRITE(addr, val) (*(uint32_t *)addr = val) +#define ENETC_REG_WRITE_RELAXED(addr, val) (*(uint32_t *)addr = val) + +/* + * RX/TX ENETC function prototypes + */ +int enetc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, + uint16_t nb_rx_desc, unsigned int socket_id, + const struct rte_eth_rxconf *rx_conf, + struct rte_mempool *mb_pool); + +int enetc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, + uint16_t nb_tx_desc, unsigned int socket_id, + const struct rte_eth_txconf *tx_conf); + +uint16_t enetc_xmit_pkts(void *txq, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts); +uint16_t enetc_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts); + +#endif /* _ENETC_H_ */ diff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_ethdev.c new file mode 100644 index 000000000..06438835d --- /dev/null +++ b/drivers/net/enetc/enetc_ethdev.c @@ -0,0 +1,269 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2018 NXP + */ + +#include +#include + +#include "enetc_logs.h" +#include "enetc.h" + +int enetc_logtype_pmd; + +/* Functions Prototypes */ +static int enetc_dev_configure(struct rte_eth_dev *dev); +static int enetc_dev_start(struct rte_eth_dev *dev); +static void enetc_dev_stop(struct rte_eth_dev *dev); +static void enetc_dev_close(struct rte_eth_dev *dev); +static void enetc_dev_infos_get(struct rte_eth_dev *dev, + struct rte_eth_dev_info *dev_info); +static int enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete); +static int enetc_hardware_init(struct enetc_eth_hw *hw); + +/* + * The set of PCI devices this driver supports + */ +static const struct rte_pci_id pci_id_enetc_map[] = { + { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) }, + { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) }, + { .vendor_id = 0, /* sentinel */ }, +}; + +/* Features supported by this driver */ +static const struct eth_dev_ops enetc_ops = { + .dev_configure = enetc_dev_configure, + .dev_start = enetc_dev_start, + .dev_stop = enetc_dev_stop, + .dev_close = enetc_dev_close, + .link_update = enetc_link_update, + .dev_infos_get = enetc_dev_infos_get, +}; + +/** + * Initialisation of the enetc device + * + * @param eth_dev + * - Pointer to the structure rte_eth_dev + * + * @return + * - On success, zero. + * - On failure, negative value. + */ +static int +enetc_dev_init(struct rte_eth_dev *eth_dev) +{ + int error = 0, i; + struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); + struct enetc_eth_hw *hw = + ENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private); + struct enetc_eth_adapter *adapter = + ENETC_DEV_PRIVATE(eth_dev->data->dev_private); + + PMD_INIT_FUNC_TRACE(); + eth_dev->dev_ops = &enetc_ops; + eth_dev->rx_pkt_burst = NULL; + eth_dev->tx_pkt_burst = NULL; + + rte_eth_copy_pci_info(eth_dev, pci_dev); + + /* Retrieving and storing the HW base address of device */ + hw->hw.reg = (void *)pci_dev->mem_resource[0].addr; + + adapter->tx_bd_count = MAX_BD_COUNT; + adapter->rx_bd_count = MAX_BD_COUNT; + + adapter->num_rx_rings = MAX_RX_RINGS; + adapter->num_tx_rings = MAX_TX_RINGS; + + for (i = 0; i < adapter->num_rx_rings; i++) { + adapter->rx_ring[i] = rte_zmalloc(NULL, + sizeof(struct enetc_bdr), 0); + if (!adapter->rx_ring[i]) { + ENETC_PMD_ERR("Failed to allocate RX ring memory"); + while (--i >= 0) + rte_free(adapter->rx_ring[i]); + error = -ENOMEM; + goto err_late; + } + adapter->rx_ring[i]->bd_count = adapter->rx_bd_count; + } + + for (i = 0; i < adapter->num_tx_rings; i++) { + adapter->tx_ring[i] = rte_zmalloc(NULL, + sizeof(struct enetc_bdr), 0); + if (!adapter->tx_ring[i]) { + ENETC_PMD_ERR("Failed to allocate TX ring memory"); + while (--i >= 0) + rte_free(adapter->tx_ring[i]); + error = -ENOMEM; + goto err_second; + } + adapter->tx_ring[i]->bd_count = adapter->tx_bd_count; + } + + error = enetc_hardware_init(hw); + if (error != 0) { + ENETC_PMD_ERR("Hardware initialization failed"); + goto err_first; + } + + /* Allocate memory for storing MAC addresses */ + eth_dev->data->mac_addrs = rte_zmalloc("enetc_eth", + ETHER_ADDR_LEN, 0); + if (!eth_dev->data->mac_addrs) { + ENETC_PMD_ERR("Failed to allocate %d bytes needed to " + "store MAC addresses", + ETHER_ADDR_LEN * 1); + error = -ENOMEM; + goto err_first; + } + + /* Copy the permanent MAC address */ + ether_addr_copy((struct ether_addr *)hw->mac.addr, + ð_dev->data->mac_addrs[0]); + + ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x", + eth_dev->data->port_id, pci_dev->id.vendor_id, + pci_dev->id.device_id); + return 0; + +err_first: + for (i = 0; i < adapter->num_tx_rings; i++) + rte_free(adapter->tx_ring[i]); +err_second: + for (i = 0; i < adapter->num_rx_rings; i++) + rte_free(adapter->rx_ring[i]); +err_late: + return error; +} + +static int +enetc_dev_uninit(struct rte_eth_dev *eth_dev) +{ + return 0; +} + +static int +enetc_dev_configure(struct rte_eth_dev *dev) +{ + PMD_INIT_FUNC_TRACE(); + return 0; +} + +static int +enetc_dev_start(struct rte_eth_dev *dev) +{ + PMD_INIT_FUNC_TRACE(); + return 0; +} + +static void +enetc_dev_stop(struct rte_eth_dev *dev) +{ +} + +static void +enetc_dev_close(struct rte_eth_dev *dev) +{ +} + +/* return 0 means link status changed, -1 means not changed */ +static int +enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete) +{ + struct enetc_eth_hw *hw = + ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct rte_eth_link link; + + hw->mac.get_link_status = 1; + + memset(&link, 0, sizeof(link)); + rte_eth_linkstatus_get(dev, &link); + + link.link_duplex = ETH_LINK_FULL_DUPLEX; + link.link_status = ETH_LINK_UP; + rte_eth_linkstatus_set(dev, &link); + + return 0; +} + +static int +enetc_hardware_init(struct enetc_eth_hw *hw) +{ + uint32_t psipmr = 0; + + /* Calculating and storing the base HW addresses */ + hw->hw.port = hw->hw.reg + ENETC_PORT_BASE; + hw->hw.global = hw->hw.reg + ENETC_GLOBAL_BASE; + + /* Enabling Station Interface */ + ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.reg, ENETC_SIMR), + ENETC_SIMR_EN); + + /* Setting to accept broadcast packets for each inetrface */ + psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0) | + ENETC_PSIPMR_SET_VLAN_MP(0); + psipmr |= ENETC_PSIPMR_SET_UP(1) | ENETC_PSIPMR_SET_MP(1) | + ENETC_PSIPMR_SET_VLAN_MP(1); + psipmr |= ENETC_PSIPMR_SET_UP(2) | ENETC_PSIPMR_SET_MP(2) | + ENETC_PSIPMR_SET_VLAN_MP(2); + + ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMR), + psipmr); + + ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PM0_CMD_CFG), + ENETC_PM0_TX_EN | ENETC_PM0_RX_EN); + + /* Enable port */ + ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR), + ENETC_PMR_EN); + + /* Enabling broadcast address */ + ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMAR0(0)), + 0xFFFFFFFF); + ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMAR1(0)), + 0xFFFF << 16); + + return 0; +} + +static void +enetc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) +{ + struct enetc_eth_adapter *adapter = + ENETC_DEV_PRIVATE(dev->data->dev_private); + + dev_info->max_rx_queues = adapter->num_rx_rings; + dev_info->max_tx_queues = adapter->num_tx_rings; + dev_info->max_rx_pktlen = 1500; +} + +static int enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, + struct rte_pci_device *pci_dev) +{ + return rte_eth_dev_pci_generic_probe(pci_dev, + sizeof(struct enetc_eth_adapter), enetc_dev_init); +} + +static int enetc_pci_remove(struct rte_pci_device *pci_dev) +{ + return rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit); +} + +static struct rte_pci_driver rte_enetc_pmd = { + .id_table = pci_id_enetc_map, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA, + .probe = enetc_pci_probe, + .remove = enetc_pci_remove, +}; + +RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd); +RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map); +RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci"); + +RTE_INIT(enetc_pmd_init_log) +{ + enetc_logtype_pmd = rte_log_register("pmd.net.enetc"); + if (enetc_logtype_pmd >= 0) + rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE); +} diff --git a/drivers/net/enetc/enetc_logs.h b/drivers/net/enetc/enetc_logs.h new file mode 100644 index 000000000..c8a6c0cf3 --- /dev/null +++ b/drivers/net/enetc/enetc_logs.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2018 NXP + */ + +#ifndef _ENETC_LOGS_H_ +#define _ENETC_LOGS_H_ + +extern int enetc_logtype_pmd; + +#define ENETC_PMD_LOG(level, fmt, args...) \ + rte_log(RTE_LOG_ ## level, enetc_logtype_pmd, "enetc_net: " \ + fmt "\n", ##args) + +#define ENETC_PMD_DEBUG(fmt, args...) \ + rte_log(RTE_LOG_DEBUG, enetc_logtype_pmd, "enetc_net: %s(): "\ + fmt "\n", __func__, ##args) + +#define PMD_INIT_FUNC_TRACE() ENETC_PMD_DEBUG(">>") + +#define ENETC_PMD_CRIT(fmt, args...) \ + ENETC_PMD_LOG(CRIT, fmt, ## args) +#define ENETC_PMD_INFO(fmt, args...) \ + ENETC_PMD_LOG(INFO, fmt, ## args) +#define ENETC_PMD_ERR(fmt, args...) \ + ENETC_PMD_LOG(ERR, fmt, ## args) +#define ENETC_PMD_WARN(fmt, args...) \ + ENETC_PMD_LOG(WARNING, fmt, ## args) + +/* DP Logs, toggled out at compile time if level lower than current level */ +#define ENETC_PMD_DP_LOG(level, fmt, args...) \ + RTE_LOG_DP(level, PMD, fmt, ## args) + +#define ENETC_PMD_DP_DEBUG(fmt, args...) \ + ENETC_PMD_DP_LOG(DEBUG, fmt, ## args) +#define ENETC_PMD_DP_INFO(fmt, args...) \ + ENETC_PMD_DP_LOG(INFO, fmt, ## args) +#define ENETC_PMD_DP_WARN(fmt, args...) \ + ENETC_PMD_DP_LOG(WARNING, fmt, ## args) + +#endif /* _ENETC_LOGS_H_*/ diff --git a/drivers/net/enetc/meson.build b/drivers/net/enetc/meson.build new file mode 100644 index 000000000..506b174ed --- /dev/null +++ b/drivers/net/enetc/meson.build @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright 2018 NXP + +if host_machine.system() != 'linux' + build = false +endif + +sources = files('enetc_ethdev.c') + +includes += include_directories('base') diff --git a/drivers/net/enetc/rte_pmd_enetc_version.map b/drivers/net/enetc/rte_pmd_enetc_version.map new file mode 100644 index 000000000..521e51f41 --- /dev/null +++ b/drivers/net/enetc/rte_pmd_enetc_version.map @@ -0,0 +1,4 @@ +DPDK_18.11 { + + local: *; +}; diff --git a/drivers/net/meson.build b/drivers/net/meson.build index 9c28ed4da..65aa6f60c 100644 --- a/drivers/net/meson.build +++ b/drivers/net/meson.build @@ -11,6 +11,7 @@ drivers = ['af_packet', 'dpaa', 'dpaa2', 'e1000', 'ena', + 'enetc', 'enic', 'failsafe', 'fm10k', 'i40e', diff --git a/mk/rte.app.mk b/mk/rte.app.mk index de33883be..154ae3b2c 100644 --- a/mk/rte.app.mk +++ b/mk/rte.app.mk @@ -135,6 +135,7 @@ endif _LDLIBS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += -lrte_pmd_e1000 _LDLIBS-$(CONFIG_RTE_LIBRTE_ENA_PMD) += -lrte_pmd_ena _LDLIBS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += -lrte_pmd_enic +_LDLIBS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += -lrte_pmd_enetc _LDLIBS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += -lrte_pmd_fm10k _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += -lrte_pmd_failsafe _LDLIBS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += -lrte_pmd_i40e From patchwork Thu Sep 6 05:54:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gagandeep Singh X-Patchwork-Id: 44318 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 21D3A4F98; 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AM4PR04MB1521; 6:mzjvTGsLzYvuIiYcwbIPv3uNlkv35OrI2sgZo76jL6BDaDsDbGu2ceUrot1fQy/pGvin0EWe95JNaplQCcyKNA88+yXHrzxZBGSpQbsiBJAcuGUO0MErV98mwyukBf6dk+o7vzMNG3RY5A3HAYhb4NOEAew4sLQ6sAaD7NHS0VhTMTou3fILlKBVi6p7cZmwGUAsYGWpLrBCEm/VVmVqolzqdaiRsaeMa3Sjy61NCTtfClZ/nNBdzNeaI7loJkqNK5bEu2ARusld+wq+XSct6VDkFLHZZ3VN0YL1bUEb7/6yFV2K3vsu3JCcdJ2l4fhUnffKGF/mvVu8MN8Ccr3jSKN5ekAFgYNPGCOmTuf17SgbveBV2+QYG5ucuYacnIev8X4p6UVdQ4yCLjwmeL7D5yf11zpDjqjNo139pWN44i4z0EXxb9+9Salo4GyarHJ+EYubNcLmxou8b4RTIBs1uw==; 5:gD0rlTBo9QbvHj7ZfyvvIiSkKJPKb73cJE7qm4Ifln5Adp/bLzGJ4jmMvc0pE+0BJewetSEX0VGYw/hWtVEQ96vr+nxef+PVp4ywAvEIQCmz7/PdQdXs8lRYUo4bzKlGMlLCKigGJnaSHMTJ12WhxamZf98npujarZENEe1ruMM=; 7:sKv8KI2gurEPEi6qRmqIEoQhp9nuCIYECnaLxvrgqFEz3ABet69iVI/meG/+45HCGkD33q9cEcqiufsvcMT9m50YASo/t3oIt/3aTCWbmZCxH4Da4Cs/CLnBvhINYXTYyGPM1mFH3KqZMB8/EzWHk/lLVdcLXXEyqnG1Xywe0wEse9UlkVh6xHi3CNJR5RvOKvVtEaH+TZ0X/pt6HtPUPUUfA0xOSmwpbbTYMh/WqDre/P8msv+WmLN+Fg17Dp5E SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Sep 2018 05:55:35.7965 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e0fc342b-8418-4492-b6e2-08d613bd5e2d X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR04MB1521 Subject: [dpdk-dev] [PATCH 3/3] net/enetc: enable Rx and Tx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add RX and TX queue setup, datapath functions and enable the packet parsing Signed-off-by: Gagandeep Singh --- MAINTAINERS | 1 + drivers/net/enetc/Makefile | 3 +- drivers/net/enetc/enetc_ethdev.c | 6 +- drivers/net/enetc/enetc_rxtx.c | 447 +++++++++++++++++++++++++++++++ drivers/net/enetc/meson.build | 3 +- 5 files changed, 456 insertions(+), 4 deletions(-) create mode 100644 drivers/net/enetc/enetc_rxtx.c diff --git a/MAINTAINERS b/MAINTAINERS index fac43bd2a..353b5eebb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -629,6 +629,7 @@ F: doc/guides/nics/features/nfp*.ini NXP enetc M: Gagandeep Singh +M: Pankaj Chauhan F: drivers/net/enetc/ F: doc/guides/nics/enetc.rst F: doc/guides/nics/features/enetc.ini diff --git a/drivers/net/enetc/Makefile b/drivers/net/enetc/Makefile index 3f4ba97da..1f886831a 100644 --- a/drivers/net/enetc/Makefile +++ b/drivers/net/enetc/Makefile @@ -16,8 +16,9 @@ LIBABIVER := 1 # all source are stored in SRCS-y # SRCS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += enetc_ethdev.c +SRCS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += enetc_rxtx.c -LDLIBS += -lrte_eal +LDLIBS += -lrte_eal -lrte_mempool LDLIBS += -lrte_ethdev LDLIBS += -lrte_bus_pci diff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_ethdev.c index 06438835d..67106593f 100644 --- a/drivers/net/enetc/enetc_ethdev.c +++ b/drivers/net/enetc/enetc_ethdev.c @@ -37,6 +37,8 @@ static const struct eth_dev_ops enetc_ops = { .dev_close = enetc_dev_close, .link_update = enetc_link_update, .dev_infos_get = enetc_dev_infos_get, + .rx_queue_setup = enetc_rx_queue_setup, + .tx_queue_setup = enetc_tx_queue_setup, }; /** @@ -61,8 +63,8 @@ enetc_dev_init(struct rte_eth_dev *eth_dev) PMD_INIT_FUNC_TRACE(); eth_dev->dev_ops = &enetc_ops; - eth_dev->rx_pkt_burst = NULL; - eth_dev->tx_pkt_burst = NULL; + eth_dev->rx_pkt_burst = &enetc_recv_pkts; + eth_dev->tx_pkt_burst = &enetc_xmit_pkts; rte_eth_copy_pci_info(eth_dev, pci_dev); diff --git a/drivers/net/enetc/enetc_rxtx.c b/drivers/net/enetc/enetc_rxtx.c new file mode 100644 index 000000000..b01f64b0c --- /dev/null +++ b/drivers/net/enetc/enetc_rxtx.c @@ -0,0 +1,447 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2018 NXP + */ + +#include +#include +#include + +#include "rte_ethdev.h" +#include "rte_malloc.h" +#include "rte_memzone.h" + +#include "base/enetc_hw.h" +#include "enetc.h" +#include "enetc_logs.h" + +#define ENETC_RXBD_BUNDLE 8 /* Number of BDs to update at once */ + +static inline int enetc_bd_unused(struct enetc_bdr *bdr) +{ + if (bdr->next_to_clean > bdr->next_to_use) + return bdr->next_to_clean - bdr->next_to_use - 1; + + return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1; +} + +static bool enetc_clean_tx_ring(struct enetc_bdr *tx_ring) +{ + int tx_frm_cnt = 0; + struct enetc_swbd *tx_swbd; + int i; + + i = tx_ring->next_to_clean; + tx_swbd = &tx_ring->q_swbd[i]; + while ((int)(enetc_rd_reg(tx_ring->tcisr) & ENETC_TBCISR_IDX_MASK) != i) { + rte_pktmbuf_free(tx_swbd->buffer_addr); + tx_swbd->buffer_addr = NULL; + tx_swbd++; + i++; + if (unlikely(i == tx_ring->bd_count)) { + i = 0; + tx_swbd = &tx_ring->q_swbd[0]; + } + + tx_frm_cnt++; + } + tx_ring->next_to_clean = i; + return tx_frm_cnt++; +} + +uint16_t enetc_xmit_pkts(void *tx_queue, + struct rte_mbuf **tx_pkts, + uint16_t nb_pkts) +{ + struct enetc_swbd *tx_swbd; + int i, start; + struct enetc_tx_bd *txbd; + struct enetc_bdr *tx_ring = (struct enetc_bdr *)tx_queue; + + i = tx_ring->next_to_use; + start = 0; + while (nb_pkts--) { + enetc_clean_tx_ring(tx_ring); + + tx_ring->q_swbd[i].buffer_addr = tx_pkts[start]; + + txbd = ENETC_TXBD(*tx_ring, i); + tx_swbd = &tx_ring->q_swbd[i]; + txbd->frm_len = tx_pkts[start]->pkt_len; + txbd->buf_len = txbd->frm_len; + txbd->flags = rte_cpu_to_le_16(ENETC_TXBD_FLAGS_F); + txbd->addr = + (uint64_t)rte_cpu_to_le_64(tx_swbd->buffer_addr->buf_addr + + tx_swbd->buffer_addr->data_off); + i++; + start++; + if (unlikely(i == tx_ring->bd_count)) + i = 0; + } + tx_ring->next_to_use = i; + enetc_wr_reg(tx_ring->tcir, i); + return start; +} + +static int enetc_refill_rx_ring(struct enetc_bdr *rx_ring, const int buff_cnt) +{ + struct enetc_swbd *rx_swbd; + union enetc_rx_bd *rxbd; + int i, j; + + i = rx_ring->next_to_use; + rx_swbd = &rx_ring->q_swbd[i]; + rxbd = ENETC_RXBD(*rx_ring, i); + + for (j = 0; j < buff_cnt; j++) { + rx_swbd->buffer_addr = + rte_cpu_to_le_64(rte_mbuf_raw_alloc(rx_ring->mb_pool)); + rxbd->w.addr = (uint64_t)rx_swbd->buffer_addr->buf_addr + + rx_swbd->buffer_addr->data_off; + /* clear 'R" as well */ + rxbd->r.lstatus = 0; + rx_swbd++; + rxbd++; + i++; + + if (unlikely(i == rx_ring->bd_count)) { + i = 0; + rxbd = ENETC_RXBD(*rx_ring, 0); + rx_swbd = &rx_ring->q_swbd[i]; + } + } + if (likely(j)) { + rx_ring->next_to_alloc = i; + rx_ring->next_to_use = i; + enetc_wr_reg(rx_ring->rcir, i); + } + return j; +} + + +static inline void __attribute__((hot)) +enetc_dev_rx_parse(struct rte_mbuf *m, uint16_t parse_results) +{ + ENETC_PMD_DP_DEBUG("parse summary = 0x%x ", parse_results); + + m->packet_type = RTE_PTYPE_UNKNOWN; + switch (parse_results) { + case ENETC_PKT_TYPE_ETHER: + m->packet_type = RTE_PTYPE_L2_ETHER; + break; + case ENETC_PKT_TYPE_IPV4: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV4; + break; + case ENETC_PKT_TYPE_IPV6: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV6; + break; + case ENETC_PKT_TYPE_IPV4_TCP: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_TCP; + break; + case ENETC_PKT_TYPE_IPV6_TCP: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_TCP; + break; + case ENETC_PKT_TYPE_IPV4_UDP: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_UDP; + break; + case ENETC_PKT_TYPE_IPV6_UDP: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_UDP; + break; + case ENETC_PKT_TYPE_IPV4_SCTP: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_SCTP; + break; + case ENETC_PKT_TYPE_IPV6_SCTP: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_SCTP; + break; + case ENETC_PKT_TYPE_IPV4_ICMP: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_ICMP; + break; + case ENETC_PKT_TYPE_IPV6_ICMP: + m->packet_type = RTE_PTYPE_L2_ETHER | + RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_ICMP; + break; + /* More switch cases can be added */ + default: + m->packet_type = RTE_PTYPE_UNKNOWN; + } +} + +static int +enetc_clean_rx_ring(struct enetc_bdr *rx_ring, struct rte_mbuf **rx_pkts, + int work_limit) +{ + int rx_frm_cnt = 0; + int cleaned_cnt, i; + struct enetc_swbd *rx_swbd; + + cleaned_cnt = enetc_bd_unused(rx_ring); + + /* next descriptor to process */ + i = rx_ring->next_to_clean; + rx_swbd = &rx_ring->q_swbd[i]; + + while (likely(rx_frm_cnt < work_limit)) { + union enetc_rx_bd *rxbd; + uint32_t bd_status; + + if (cleaned_cnt >= ENETC_RXBD_BUNDLE) { + int count = enetc_refill_rx_ring(rx_ring, cleaned_cnt); + + cleaned_cnt -= count; + } + rxbd = ENETC_RXBD(*rx_ring, i); + bd_status = rte_le_to_cpu_32(rxbd->r.lstatus); + if (!bd_status) + break; + + rx_swbd->buffer_addr->pkt_len = rxbd->r.buf_len; + rx_swbd->buffer_addr->data_len = rxbd->r.buf_len; + rx_swbd->buffer_addr->hash.rss = rxbd->r.rss_hash; + rx_swbd->buffer_addr->ol_flags = 0; + enetc_dev_rx_parse(rx_swbd->buffer_addr, rxbd->r.parse_summary); + + rx_pkts[rx_frm_cnt] = rx_swbd->buffer_addr; + + cleaned_cnt++; + rx_swbd++; + i++; + if (unlikely(i == rx_ring->bd_count)) { + i = 0; + rx_swbd = &rx_ring->q_swbd[i]; + } + rx_ring->next_to_clean = i; + rx_frm_cnt++; + } + + return rx_frm_cnt; +} + +uint16_t enetc_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts) +{ + struct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq; + + return enetc_clean_rx_ring(rx_ring, rx_pkts, nb_pkts); +} + +static int enetc_alloc_txbdr(struct enetc_bdr *txr) +{ + int size; + + size = txr->bd_count * sizeof(struct enetc_swbd); + txr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE); + if (txr->q_swbd == NULL) + return -ENOMEM; + + size = txr->bd_count * sizeof(struct enetc_tx_bd); + txr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE); + + if (txr->bd_base == NULL) { + rte_free(txr->q_swbd); + txr->q_swbd = NULL; + return -ENOMEM; + } + txr->next_to_clean = 0; + txr->next_to_use = 0; + + return 0; +} + +static void enetc_free_bdr(struct enetc_bdr *rxr) +{ + rte_free(rxr->q_swbd); + rte_free(rxr->bd_base); + rxr->q_swbd = NULL; + rxr->bd_base = NULL; +} + +static int enetc_alloc_tx_resources(struct enetc_eth_adapter *priv) +{ + int i, err; + + for (i = 0; i < priv->num_tx_rings; i++) { + err = enetc_alloc_txbdr(priv->tx_ring[i]); + + if (err) + goto fail; + priv->tx_ring[i]->index = i; + } + + return 0; + +fail: + while (i-- > 0) + enetc_free_bdr(priv->tx_ring[i]); + + return err; +} + +static void enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring) +{ + int idx = tx_ring->index; + uint32_t tbmr; + + enetc_txbdr_wr(hw, idx, ENETC_TBBAR0, + lower_32_bits((uint64_t)tx_ring->bd_base)); + + enetc_txbdr_wr(hw, idx, ENETC_TBBAR1, + upper_32_bits((uint64_t)tx_ring->bd_base)); + enetc_txbdr_wr(hw, idx, ENETC_TBLENR, + ENETC_RTBLENR_LEN(tx_ring->bd_count)); + + tbmr = ENETC_TBMR_EN; + /* enable ring */ + enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr); + + enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0); + enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0); + tx_ring->tcir = hw->reg + ENETC_BDR(TX, idx, ENETC_TBCIR); + tx_ring->tcisr = hw->reg + ENETC_BDR(TX, idx, ENETC_TBCISR); +} + +static void enetc_setup_tx_bdrs(struct rte_eth_dev *dev) +{ + int i; + struct enetc_eth_adapter *priv = + ENETC_DEV_PRIVATE(dev->data->dev_private); + + for (i = 0; i < priv->num_tx_rings; i++) { + enetc_setup_txbdr(&priv->hw.hw, priv->tx_ring[i]); + dev->data->tx_queues[i] = priv->tx_ring[i]; + } +} + +int enetc_tx_queue_setup(struct rte_eth_dev *dev, + uint16_t queue_idx, + uint16_t nb_desc, + unsigned int socket_id, + const struct rte_eth_txconf *tx_conf) +{ + struct enetc_eth_adapter *adapter = + ENETC_DEV_PRIVATE(dev->data->dev_private); + int err = 0; + + err = enetc_alloc_tx_resources(adapter); + if (err) + goto err_alloc_tx; + + enetc_setup_tx_bdrs(dev); + +err_alloc_tx: + return err; +} + +static int enetc_alloc_rxbdr(struct enetc_bdr *rxr) +{ + int size; + + size = rxr->bd_count * sizeof(struct enetc_swbd); + rxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE); + if (rxr->q_swbd == NULL) + return -ENOMEM; + + size = rxr->bd_count * sizeof(union enetc_rx_bd); + rxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE); + + if (rxr->bd_base == NULL) { + rte_free(rxr->q_swbd); + rxr->q_swbd = NULL; + return -ENOMEM; + } + + rxr->next_to_clean = 0; + rxr->next_to_use = 0; + rxr->next_to_alloc = 0; + + return 0; +} + +static int enetc_alloc_rx_resources(struct enetc_eth_adapter *priv) +{ + int i, err; + + for (i = 0; i < priv->num_rx_rings; i++) { + err = enetc_alloc_rxbdr(priv->rx_ring[i]); + + if (err) + goto fail; + + priv->rx_ring[i]->index = i; + } + return 0; +fail: + while (i-- > 0) + enetc_free_bdr(priv->rx_ring[i]); + + return err; +} + +static void enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring, + struct rte_mempool *mb_pool) +{ + int idx = rx_ring->index; + uint16_t buf_size; + + enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0, + lower_32_bits((uint64_t)rx_ring->bd_base)); + + enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1, + upper_32_bits((uint64_t)rx_ring->bd_base)); + + enetc_rxbdr_wr(hw, idx, ENETC_RBLENR, + ENETC_RTBLENR_LEN(rx_ring->bd_count)); + + rx_ring->mb_pool = mb_pool; + + /* enable ring */ + enetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN); + enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0); + rx_ring->rcir = hw->reg + ENETC_BDR(RX, idx, ENETC_RBCIR); + + enetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring))); + buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) - + RTE_PKTMBUF_HEADROOM); + + enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size); +} + +static void enetc_setup_bdrs(struct rte_eth_dev *dev, + struct rte_mempool *mb_pool) +{ + int i; + struct enetc_eth_adapter *priv = + ENETC_DEV_PRIVATE(dev->data->dev_private); + + for (i = 0; i < priv->num_rx_rings; i++) { + enetc_setup_rxbdr(&priv->hw.hw, priv->rx_ring[i], mb_pool); + dev->data->rx_queues[i] = priv->rx_ring[i]; + } +} + + +int enetc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, + uint16_t nb_rx_desc, unsigned int socket_id, + const struct rte_eth_rxconf *rx_conf, + struct rte_mempool *mb_pool) +{ + struct enetc_eth_adapter *adapter = + ENETC_DEV_PRIVATE(dev->data->dev_private); + int err = 0; + + err = enetc_alloc_rx_resources(adapter); + if (err) + goto err_alloc_rx; + + enetc_setup_bdrs(dev, mb_pool); + +err_alloc_rx: + return err; +} diff --git a/drivers/net/enetc/meson.build b/drivers/net/enetc/meson.build index 506b174ed..733156bbf 100644 --- a/drivers/net/enetc/meson.build +++ b/drivers/net/enetc/meson.build @@ -5,6 +5,7 @@ if host_machine.system() != 'linux' build = false endif -sources = files('enetc_ethdev.c') +sources = files('enetc_ethdev.c', + 'enetc_rxtx.c') includes += include_directories('base')