From patchwork Thu Aug 27 16:12:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76097 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id CFC34A04B1; Thu, 27 Aug 2020 18:13:36 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B0FBE1BEC3; Thu, 27 Aug 2020 18:13:36 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 134F61BEC3 for ; Thu, 27 Aug 2020 18:13:34 +0200 (CEST) IronPort-SDR: 0SKRy4zdMeAxKmhKfVImDs357q89H2RkWSXs8HE0cUXoh69Ej2TBqzUDq9ARlZd3/MLSVAP7yp d9brXP91ryNA== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220766981" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220766981" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:15 -0700 IronPort-SDR: 5mL/rimbV4eHonS9TzTFMGprG1UBjV+XX81d6Xv4jSFwxg824Qcf4p82sIDWMLV9AIvUpQDP1a 3ksS7iL9sGSA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681407" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:14 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Ray Kinsella , Neil Horman Date: Thu, 27 Aug 2020 17:12:48 +0100 Message-Id: <20200827161304.32300-2-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 01/17] eal: add max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch adds a max SIMD bitwidth EAL configuration. The API allows for an app to set this value. It can also be set using EAL argument --force-max-simd-bitwidth, which will lock the value and override any modifications made by the app. Signed-off-by: Ciara Power --- v2: Added to Doxygen comment for API. --- lib/librte_eal/common/eal_common_options.c | 60 ++++++++++++++++++++++ lib/librte_eal/common/eal_internal_cfg.h | 8 +++ lib/librte_eal/common/eal_options.h | 2 + lib/librte_eal/include/rte_eal.h | 32 ++++++++++++ lib/librte_eal/rte_eal_version.map | 4 ++ 5 files changed, 106 insertions(+) diff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/common/eal_common_options.c index a5426e1234..90f4e8f5c3 100644 --- a/lib/librte_eal/common/eal_common_options.c +++ b/lib/librte_eal/common/eal_common_options.c @@ -102,6 +102,7 @@ eal_long_options[] = { {OPT_MATCH_ALLOCATIONS, 0, NULL, OPT_MATCH_ALLOCATIONS_NUM}, {OPT_TELEMETRY, 0, NULL, OPT_TELEMETRY_NUM }, {OPT_NO_TELEMETRY, 0, NULL, OPT_NO_TELEMETRY_NUM }, + {OPT_FORCE_MAX_SIMD_BITWIDTH, 1, NULL, OPT_FORCE_MAX_SIMD_BITWIDTH_NUM}, {0, 0, NULL, 0 } }; @@ -1309,6 +1310,32 @@ eal_parse_iova_mode(const char *name) return 0; } +static int +eal_parse_simd_bitwidth(const char *arg, bool locked) +{ + char *end; + uint16_t bitwidth; + int ret; + struct internal_config *internal_conf = + eal_get_internal_configuration(); + + if (arg == NULL || arg[0] == '\0') + return -1; + + errno = 0; + bitwidth = strtoul(arg, &end, 0); + + /* check for errors */ + if ((errno != 0) || end == NULL || (*end != '\0')) + return -1; + + ret = rte_set_max_simd_bitwidth(bitwidth); + if (ret < 0) + return -1; + internal_conf->max_simd_bitwidth.locked = locked; + return 0; +} + static int eal_parse_base_virtaddr(const char *arg) { @@ -1707,6 +1734,13 @@ eal_parse_common_option(int opt, const char *optarg, case OPT_NO_TELEMETRY_NUM: conf->no_telemetry = 1; break; + case OPT_FORCE_MAX_SIMD_BITWIDTH_NUM: + if (eal_parse_simd_bitwidth(optarg, 1) < 0) { + RTE_LOG(ERR, EAL, "invalid parameter for --" + OPT_FORCE_MAX_SIMD_BITWIDTH "\n"); + return -1; + } + break; /* don't know what to do, leave this to caller */ default: @@ -1903,6 +1937,31 @@ eal_check_common_options(struct internal_config *internal_cfg) return 0; } +uint16_t +rte_get_max_simd_bitwidth(void) +{ + const struct internal_config *internal_conf = + eal_get_internal_configuration(); + return internal_conf->max_simd_bitwidth.bitwidth; +} + +int +rte_set_max_simd_bitwidth(uint16_t bitwidth) +{ + struct internal_config *internal_conf = + eal_get_internal_configuration(); + if (internal_conf->max_simd_bitwidth.locked) { + RTE_LOG(NOTICE, EAL, "Cannot set max SIMD bitwidth - user runtime override enabled"); + return -EPERM; + } + if (bitwidth < RTE_NO_SIMD || !rte_is_power_of_2(bitwidth)) { + RTE_LOG(ERR, EAL, "Invalid bitwidth value!\n"); + return -EINVAL; + } + internal_conf->max_simd_bitwidth.bitwidth = bitwidth; + return 0; +} + void eal_common_usage(void) { @@ -1981,6 +2040,7 @@ eal_common_usage(void) " --"OPT_BASE_VIRTADDR" Base virtual address\n" " --"OPT_TELEMETRY" Enable telemetry support (on by default)\n" " --"OPT_NO_TELEMETRY" Disable telemetry support\n" + " --"OPT_FORCE_MAX_SIMD_BITWIDTH" Force the max SIMD bitwidth\n" "\nEAL options for DEBUG use only:\n" " --"OPT_HUGE_UNLINK" Unlink hugepage files after init\n" " --"OPT_NO_HUGE" Use malloc instead of hugetlbfs\n" diff --git a/lib/librte_eal/common/eal_internal_cfg.h b/lib/librte_eal/common/eal_internal_cfg.h index 13f93388a7..367e0cc19e 100644 --- a/lib/librte_eal/common/eal_internal_cfg.h +++ b/lib/librte_eal/common/eal_internal_cfg.h @@ -33,6 +33,12 @@ struct hugepage_info { int lock_descriptor; /**< file descriptor for hugepage dir */ }; +struct simd_bitwidth { + /**< flag indicating if bitwidth is locked from further modification */ + bool locked; + uint16_t bitwidth; /**< bitwidth value */ +}; + /** * internal configuration */ @@ -85,6 +91,8 @@ struct internal_config { volatile unsigned int init_complete; /**< indicates whether EAL has completed initialization */ unsigned int no_telemetry; /**< true to disable Telemetry */ + /** max simd bitwidth path to use */ + struct simd_bitwidth max_simd_bitwidth; }; void eal_reset_internal_config(struct internal_config *internal_cfg); diff --git a/lib/librte_eal/common/eal_options.h b/lib/librte_eal/common/eal_options.h index 89769d48b4..ef33979664 100644 --- a/lib/librte_eal/common/eal_options.h +++ b/lib/librte_eal/common/eal_options.h @@ -85,6 +85,8 @@ enum { OPT_TELEMETRY_NUM, #define OPT_NO_TELEMETRY "no-telemetry" OPT_NO_TELEMETRY_NUM, +#define OPT_FORCE_MAX_SIMD_BITWIDTH "force-max-simd-bitwidth" + OPT_FORCE_MAX_SIMD_BITWIDTH_NUM, OPT_LONG_MAX_NUM }; diff --git a/lib/librte_eal/include/rte_eal.h b/lib/librte_eal/include/rte_eal.h index ddcf6a2e7a..8148f650f2 100644 --- a/lib/librte_eal/include/rte_eal.h +++ b/lib/librte_eal/include/rte_eal.h @@ -43,6 +43,13 @@ enum rte_proc_type_t { RTE_PROC_INVALID }; +enum rte_max_simd_t { + RTE_NO_SIMD = 64, + RTE_MAX_128_SIMD = 128, + RTE_MAX_256_SIMD = 256, + RTE_MAX_512_SIMD = 512 +}; + /** * Get the process type in a multi-process setup * @@ -51,6 +58,31 @@ enum rte_proc_type_t { */ enum rte_proc_type_t rte_eal_process_type(void); +/** + * Get the supported SIMD bitwidth. + * + * @return + * uint16_t bitwidth. + */ +__rte_experimental +uint16_t rte_get_max_simd_bitwidth(void); + +/** + * Set the supported SIMD bitwidth. + * This API should only be called once at initialization, before EAL init. + * + * @param bitwidth + * uint16_t bitwidth. + * @return + * 0 on success. + * @return + * -EINVAL on invalid bitwidth parameter. + * @return + * -EPERM if bitwidth is locked. + */ +__rte_experimental +int rte_set_max_simd_bitwidth(uint16_t bitwidth); + /** * Request iopl privilege for all RPL. * diff --git a/lib/librte_eal/rte_eal_version.map b/lib/librte_eal/rte_eal_version.map index bf0c17c233..8059ea76b6 100644 --- a/lib/librte_eal/rte_eal_version.map +++ b/lib/librte_eal/rte_eal_version.map @@ -403,6 +403,10 @@ EXPERIMENTAL { rte_mp_disable; rte_thread_register; rte_thread_unregister; + + # added in 20.11 + rte_get_max_simd_bitwidth; + rte_set_max_simd_bitwidth; }; INTERNAL { From patchwork Thu Aug 27 16:12:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76098 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DEF71A04B1; Thu, 27 Aug 2020 18:13:43 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 31B551C0AD; Thu, 27 Aug 2020 18:13:40 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 781F31C065 for ; Thu, 27 Aug 2020 18:13:38 +0200 (CEST) IronPort-SDR: IU6OZvw/xGs+bwx0K08VTHWywdlmQqBoxONigQ9gWeqLlyhSK6DTBWp3wCHP6Cx81YgenHUzrt 6sslT3QEZDMw== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220766987" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220766987" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:18 -0700 IronPort-SDR: 6b4fTcO4BdcnuCug6/uUtxSzSQbxRfk4OHYm+2UKGGExW8PHHoRTJUbyuYc7MHsa8JgrjZyO62 Tr7R3OB8D2Wg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681436" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:16 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Ruifeng Wang , Jerin Jacob , Honnappa Nagarahalli , David Christensen , Jan Viktorin , Bruce Richardson , Konstantin Ananyev Date: Thu, 27 Aug 2020 17:12:49 +0100 Message-Id: <20200827161304.32300-3-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 02/17] eal: add default SIMD bitwidth values X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Each arch has a define for the default SIMD bitwidth value, this is used on EAL init to set the config max SIMD bitwidth. Cc: Ruifeng Wang Cc: Jerin Jacob Cc: Honnappa Nagarahalli Cc: David Christensen Signed-off-by: Ciara Power --- v2: Changed default bitwidth for Arm to 128. --- lib/librte_eal/arm/include/rte_vect.h | 2 ++ lib/librte_eal/common/eal_common_options.c | 3 +++ lib/librte_eal/include/generic/rte_vect.h | 2 ++ lib/librte_eal/ppc/include/rte_vect.h | 2 ++ lib/librte_eal/x86/include/rte_vect.h | 2 ++ 5 files changed, 11 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_vect.h b/lib/librte_eal/arm/include/rte_vect.h index 01c51712a1..2cd61d6279 100644 --- a/lib/librte_eal/arm/include/rte_vect.h +++ b/lib/librte_eal/arm/include/rte_vect.h @@ -14,6 +14,8 @@ extern "C" { #endif +#define RTE_DEFAULT_SIMD_BITWIDTH 128 + typedef int32x4_t xmm_t; #define XMM_SIZE (sizeof(xmm_t)) diff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/common/eal_common_options.c index 90f4e8f5c3..c2a9624f89 100644 --- a/lib/librte_eal/common/eal_common_options.c +++ b/lib/librte_eal/common/eal_common_options.c @@ -35,6 +35,7 @@ #ifndef RTE_EXEC_ENV_WINDOWS #include #endif +#include #include "eal_internal_cfg.h" #include "eal_options.h" @@ -344,6 +345,8 @@ eal_reset_internal_config(struct internal_config *internal_cfg) internal_cfg->user_mbuf_pool_ops_name = NULL; CPU_ZERO(&internal_cfg->ctrl_cpuset); internal_cfg->init_complete = 0; + internal_cfg->max_simd_bitwidth.bitwidth = RTE_DEFAULT_SIMD_BITWIDTH; + internal_cfg->max_simd_bitwidth.locked = 0; } static int diff --git a/lib/librte_eal/include/generic/rte_vect.h b/lib/librte_eal/include/generic/rte_vect.h index 3fc47979f8..e98f184a97 100644 --- a/lib/librte_eal/include/generic/rte_vect.h +++ b/lib/librte_eal/include/generic/rte_vect.h @@ -14,6 +14,8 @@ #include +#define RTE_DEFAULT_SIMD_BITWIDTH 256 + /* Unsigned vector types */ /** diff --git a/lib/librte_eal/ppc/include/rte_vect.h b/lib/librte_eal/ppc/include/rte_vect.h index b0545c878c..70fbd0c423 100644 --- a/lib/librte_eal/ppc/include/rte_vect.h +++ b/lib/librte_eal/ppc/include/rte_vect.h @@ -15,6 +15,8 @@ extern "C" { #endif +#define RTE_DEFAULT_SIMD_BITWIDTH 256 + typedef vector signed int xmm_t; #define XMM_SIZE (sizeof(xmm_t)) diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h index df5a607623..b1df75aca7 100644 --- a/lib/librte_eal/x86/include/rte_vect.h +++ b/lib/librte_eal/x86/include/rte_vect.h @@ -35,6 +35,8 @@ extern "C" { #endif +#define RTE_DEFAULT_SIMD_BITWIDTH 256 + typedef __m128i xmm_t; #define XMM_SIZE (sizeof(xmm_t)) From patchwork Thu Aug 27 16:12:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76099 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6E478A04B1; Thu, 27 Aug 2020 18:13:54 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1CE2A1C0B2; Thu, 27 Aug 2020 18:13:44 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 0FFC01C08C for ; Thu, 27 Aug 2020 18:13:38 +0200 (CEST) IronPort-SDR: QJk0dt63k0EYg1zn+FejVHOZbFeOU0aufi1XatdyhlXkFGvp3KSLtyjuElLXA9hk4vnWPvBL3i AHpHs84ZxO6g== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220766996" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220766996" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:20 -0700 IronPort-SDR: TR7ugFpoOE4EpWHvmvJV/QCjMJ7FTCJUguRo+qdq/+7CZq6hqAi/WHw6mMW5XGnI8odtfeGVLj +st0xtMM9EFA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681459" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:18 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Anatoly Burakov , John McNamara , Marko Kovacevic Date: Thu, 27 Aug 2020 17:12:50 +0100 Message-Id: <20200827161304.32300-4-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 03/17] doc: add detail on using max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch adds documentation on the usage of the max SIMD bitwidth EAL setting, and how to use it to enable AVX-512 at runtime. Cc: Anatoly Burakov Cc: John McNamara Cc: Marko Kovacevic Signed-off-by: Ciara Power --- doc/guides/howto/avx512.rst | 36 +++++++++++++++++++ doc/guides/linux_gsg/eal_args.include.rst | 12 +++++++ .../prog_guide/env_abstraction_layer.rst | 31 ++++++++++++++++ 3 files changed, 79 insertions(+) create mode 100644 doc/guides/howto/avx512.rst diff --git a/doc/guides/howto/avx512.rst b/doc/guides/howto/avx512.rst new file mode 100644 index 0000000000..ebae0f2b4f --- /dev/null +++ b/doc/guides/howto/avx512.rst @@ -0,0 +1,36 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2020 Intel Corporation. + + +Using AVX-512 with DPDK +======================= + +AVX-512 is not used by default in DPDK, but it can be selected at runtime by apps through the use of EAL API, +and by the user with a commandline argument. DPDK has a setting for max SIMD bitwidth, +which can be modified and will then limit the vector path taken by the code. + + +Using the API in apps +--------------------- + +Apps can request DPDK uses AVX-512 at runtime, if it provides improved application performance. +This can be done by modifying the EAL setting for max SIMD bitwidth to 512, as by default it is 256, +which does not allow for AVX-512. + +.. code-block:: c + + rte_set_max_simd_bitwidth(RTE_MAX_512_SIMD); + +This API should only be called once at initialization, before EAL init. +For more information on the possible enum values to use as a parameter, go to :ref:`max_simd_bitwidth`: + + +Using the command-line argument +--------------------------------------------- + +The user can select to use AVX-512 at runtime, using the following argument to set the max bitwidth:: + + ./app/dpdk-testpmd --force-max-simd-bitwidth=512 + +This will override any further changes to the max SIMD bitwidth in DPDK, +which is useful for testing purposes. diff --git a/doc/guides/linux_gsg/eal_args.include.rst b/doc/guides/linux_gsg/eal_args.include.rst index 0fe4457968..bab3e14e47 100644 --- a/doc/guides/linux_gsg/eal_args.include.rst +++ b/doc/guides/linux_gsg/eal_args.include.rst @@ -210,3 +210,15 @@ Other options * ``--no-telemetry``: Disable telemetry. + +* ``--force-max-simd-bitwidth=``: + + Specify the maximum SIMD bitwidth size to handle. This limits which vector paths, + if any, are taken, as any paths taken must use a bitwidth below the max bitwidth limit. + For example, to allow all SIMD bitwidths up to and including AVX-512:: + + --force-max-simd-bitwidth=512 + + The following example shows limiting the bitwidth to 64-bits to disable all vector code:: + + --force-max-simd-bitwidth=64 diff --git a/doc/guides/prog_guide/env_abstraction_layer.rst b/doc/guides/prog_guide/env_abstraction_layer.rst index f64ae953d1..74f26ed6c9 100644 --- a/doc/guides/prog_guide/env_abstraction_layer.rst +++ b/doc/guides/prog_guide/env_abstraction_layer.rst @@ -486,6 +486,37 @@ the desired addressing mode when virtual devices that are not directly attached To facilitate forcing the IOVA mode to a specific value the EAL command line option ``--iova-mode`` can be used to select either physical addressing('pa') or virtual addressing('va'). +.. _max_simd_bitwidth: + + +Max SIMD bitwidth +~~~~~~~~~~~~~~~~~ + +The EAL provides a single setting to limit the max SIMD bitwidth used by DPDK, +which is used in determining the vector path, if any, chosen by a component. +The value can be set at runtime by an application using the 'rte_set_max_simd_bitwidth(uint16_t bitwidth)' function, +which should only be called once at initialization, before EAL init. +The value can be overridden by the user using the EAL command-line option '--force-max-sim-bitwidth'. + +When choosing a vector path, along with checking the CPU feature support, +the value of the max SIMD bitwidth must also be checked, and can be retrieved using the 'rte_get_max_simd_bitwidth()' function. +The value should be compared against the enum values for accepted max SIMD bitwidths: + +.. code-block:: c + + enum rte_max_simd_t { + RTE_NO_SIMD = 64, + RTE_MAX_128_SIMD = 128, + RTE_MAX_256_SIMD = 256, + RTE_MAX_512_SIMD = 512 + }; + + if (rte_get_max_simd_bitwidth() >= RTE_MAX_512_SIMD) + /* Take AVX-512 vector path */ + else if (rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) + /* Take AVX2 vector path */ + + Memory Segments and Memory Zones (memzone) ------------------------------------------ From patchwork Thu Aug 27 16:12:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76100 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9C503A04B1; Thu, 27 Aug 2020 18:14:05 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0E4981C0B7; Thu, 27 Aug 2020 18:13:45 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 45DFA1C065 for ; Thu, 27 Aug 2020 18:13:39 +0200 (CEST) IronPort-SDR: 4wq64OiMpfsFCfYW2WyLKEQKdZ52ysWlCKYSwzwgOszrID04OLtCY7V1nHbBVe25+hSP1JMrV2 Z2aY6D2IfbKw== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767001" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767001" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:22 -0700 IronPort-SDR: t90duYw3tDTXzCsf3WZXl93GAEOIkJ86itjlAEQEDdHj0s18HmKrFRbsrav+oOmiAoLZ7Oc3aO /Ico3rLhkC+w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681467" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:20 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Beilei Xing , Jeff Guo Date: Thu, 27 Aug 2020 17:12:51 +0100 Message-Id: <20200827161304.32300-5-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 04/17] net/i40e: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Beilei Xing Cc: Jeff Guo Signed-off-by: Ciara Power --- drivers/net/i40e/i40e_rxtx.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index fe7f9200c1..90f4e26fb8 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -3098,7 +3098,8 @@ static eth_rx_burst_t i40e_get_latest_rx_vec(bool scatter) { #if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) return scatter ? i40e_recv_scattered_pkts_vec_avx2 : i40e_recv_pkts_vec_avx2; #endif @@ -3115,7 +3116,8 @@ i40e_get_recommend_rx_vec(bool scatter) * use of AVX2 version to later plaforms, not all those that could * theoretically run it. */ - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) return scatter ? i40e_recv_scattered_pkts_vec_avx2 : i40e_recv_pkts_vec_avx2; #endif @@ -3154,7 +3156,8 @@ i40e_set_rx_function(struct rte_eth_dev *dev) } } - if (ad->rx_vec_allowed) { + if (ad->rx_vec_allowed && rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { /* Vec Rx path */ PMD_INIT_LOG(DEBUG, "Vector Rx path will be used on port=%d.", dev->data->port_id); @@ -3268,7 +3271,8 @@ static eth_tx_burst_t i40e_get_latest_tx_vec(void) { #if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) return i40e_xmit_pkts_vec_avx2; #endif return i40e_xmit_pkts_vec; @@ -3283,7 +3287,8 @@ i40e_get_recommend_tx_vec(void) * use of AVX2 version to later plaforms, not all those that could * theoretically run it. */ - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) return i40e_xmit_pkts_vec_avx2; #endif return i40e_xmit_pkts_vec; @@ -3311,7 +3316,9 @@ i40e_set_tx_function(struct rte_eth_dev *dev) } if (ad->tx_simple_allowed) { - if (ad->tx_vec_allowed) { + if (ad->tx_vec_allowed && + rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { PMD_INIT_LOG(DEBUG, "Vector tx finally be used."); if (ad->use_latest_vec) dev->tx_pkt_burst = From patchwork Thu Aug 27 16:12:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76101 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 93A09A04B1; Thu, 27 Aug 2020 18:14:16 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 672991C0BF; Thu, 27 Aug 2020 18:13:46 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id C8A921C065 for ; Thu, 27 Aug 2020 18:13:39 +0200 (CEST) IronPort-SDR: Ssdth7RTUQ6cbwcOM/jWvDq7Hd7jZy8h/hDEqhek+bnaT1/Vvf7eDxd6HtYtvkkbYJo4o7de5N YFdz/kzKTWDw== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767006" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767006" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:23 -0700 IronPort-SDR: dNgXmz5eNU8BQ3cWGZSHhbyYG7URxLmXjM8UgmFDk7yK6NkTRt0kLbmGuJmx6SSg6lx56yCcVV EePWtuH/MIhA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681479" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:22 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Somalapuram Amaranath Date: Thu, 27 Aug 2020 17:12:52 +0100 Message-Id: <20200827161304.32300-6-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 05/17] net/axgbe: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Somalapuram Amaranath Signed-off-by: Ciara Power --- drivers/net/axgbe/axgbe_rxtx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c index 30c467db71..6200954caa 100644 --- a/drivers/net/axgbe/axgbe_rxtx.c +++ b/drivers/net/axgbe/axgbe_rxtx.c @@ -553,7 +553,8 @@ int axgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, if (!pdata->tx_queues) pdata->tx_queues = dev->data->tx_queues; - if (txq->vector_disable) + if (txq->vector_disable || rte_get_max_simd_bitwidth() + < RTE_MAX_128_SIMD) dev->tx_pkt_burst = &axgbe_xmit_pkts; else #ifdef RTE_ARCH_X86 From patchwork Thu Aug 27 16:12:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76102 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id AC11CA04B1; Thu, 27 Aug 2020 18:14:25 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A647D1C0C4; Thu, 27 Aug 2020 18:13:47 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 012481C08C for ; Thu, 27 Aug 2020 18:13:39 +0200 (CEST) IronPort-SDR: G40h/gSsf5idAO3+kGxQI4jQs2oN+QSikGmEc9Of/zpv5Do6oXEp6HjbHf6HsW5nU+XEnFYfFj 5G9EY54Wa8/A== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767009" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767009" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:24 -0700 IronPort-SDR: x87OSkGpS4cXCpiwNLf0Bnp5GJB0VZJ69HbUtfsOjipD3lG78T3PXUB/bKoKxd13G+0XKbwJZF VtSN/CCClgNg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681486" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:23 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Ajit Khaparde , Somnath Kotur Date: Thu, 27 Aug 2020 17:12:53 +0100 Message-Id: <20200827161304.32300-7-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 06/17] net/bnxt: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Ajit Khaparde Cc: Somnath Kotur Signed-off-by: Ciara Power --- drivers/net/bnxt/bnxt_ethdev.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 510a0d9e0a..626aae8881 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -1100,7 +1100,8 @@ bnxt_receive_function(struct rte_eth_dev *eth_dev) DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | DEV_RX_OFFLOAD_RSS_HASH | DEV_RX_OFFLOAD_VLAN_FILTER)) && - !BNXT_TRUFLOW_EN(bp)) { + !BNXT_TRUFLOW_EN(bp) && rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { PMD_DRV_LOG(INFO, "Using vector mode receive for port %d\n", eth_dev->data->port_id); bp->flags |= BNXT_FLAG_RX_VECTOR_PKT_MODE; @@ -1132,7 +1133,8 @@ bnxt_transmit_function(__rte_unused struct rte_eth_dev *eth_dev) */ if (!eth_dev->data->scattered_rx && !eth_dev->data->dev_conf.txmode.offloads && - !BNXT_TRUFLOW_EN(bp)) { + !BNXT_TRUFLOW_EN(bp) && + rte_get_max_simd_bitwidth() >= RTE_MAX_128_SIMD) { PMD_DRV_LOG(INFO, "Using vector mode transmit for port %d\n", eth_dev->data->port_id); return bnxt_xmit_pkts_vec; From patchwork Thu Aug 27 16:12:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76103 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id EF1A1A04B1; Thu, 27 Aug 2020 18:14:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BF0881C0D0; Thu, 27 Aug 2020 18:13:48 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 511121C0AF for ; Thu, 27 Aug 2020 18:13:40 +0200 (CEST) IronPort-SDR: FCCP92z1l9Y9Osp39/qxeV28q4f2f6DZByKnOeMOy5mH0k7/20+RrXo3ds3lfdkHzJ957+2UK/ Pn5LIITTQTnQ== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767016" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767016" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:26 -0700 IronPort-SDR: 2C7ijnTAPK7wg55al4rV+Q5XKG7oe3PpqBcP1VNAjqIQJB05lRgN7dw20bBURmm8dupQu1eD0+ Vp3M3og0HdrQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681495" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:25 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , John Daley , Hyong Youb Kim Date: Thu, 27 Aug 2020 17:12:54 +0100 Message-Id: <20200827161304.32300-8-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 07/17] net/enic: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: John Daley Cc: Hyong Youb Kim Acked-by: Hyong Youb Kim Signed-off-by: Ciara Power --- drivers/net/enic/enic_rxtx_vec_avx2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/enic/enic_rxtx_vec_avx2.c b/drivers/net/enic/enic_rxtx_vec_avx2.c index 676b9f5fdb..5db43bdbb8 100644 --- a/drivers/net/enic/enic_rxtx_vec_avx2.c +++ b/drivers/net/enic/enic_rxtx_vec_avx2.c @@ -821,7 +821,8 @@ enic_use_vector_rx_handler(struct rte_eth_dev *eth_dev) fconf = ð_dev->data->dev_conf.fdir_conf; if (fconf->mode != RTE_FDIR_MODE_NONE) return false; - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) { + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) { ENICPMD_LOG(DEBUG, " use the non-scatter avx2 Rx handler"); eth_dev->rx_pkt_burst = &enic_noscatter_vec_recv_pkts; enic->use_noscatter_vec_rx_handler = 1; From patchwork Thu Aug 27 16:12:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76104 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6637DA04B1; Thu, 27 Aug 2020 18:14:48 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0429F1C0D9; Thu, 27 Aug 2020 18:13:50 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 7BB291C0B0 for ; Thu, 27 Aug 2020 18:13:40 +0200 (CEST) IronPort-SDR: 8a0kXChYMU7l8q4HlTiDCuv9bGVxYGE11ra2/fj6dls9g1RMORYDjrIfVDk6VvHfHhDw9EtOD/ cdmTjyTTaH7Q== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767018" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767018" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:27 -0700 IronPort-SDR: Oi4FkF092IfUDtHwclcK2n5h5o5iU1jY/09qNV5j/+6H0tVasmNz3WSVl0SBBuTiqyYDYcW5p3 TI7xn5ENBuxg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681504" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:26 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Qi Zhang , Xiao Wang Date: Thu, 27 Aug 2020 17:12:55 +0100 Message-Id: <20200827161304.32300-9-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 08/17] net/fm10k: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Qi Zhang Cc: Xiao Wang Signed-off-by: Ciara Power Acked-by: Xiao Wang --- drivers/net/fm10k/fm10k_ethdev.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c index b574693bca..f7c41d4377 100644 --- a/drivers/net/fm10k/fm10k_ethdev.c +++ b/drivers/net/fm10k/fm10k_ethdev.c @@ -2937,7 +2937,9 @@ fm10k_set_tx_function(struct rte_eth_dev *dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) { /* primary process has set the ftag flag and offloads */ txq = dev->data->tx_queues[0]; - if (fm10k_tx_vec_condition_check(txq)) { + if (fm10k_tx_vec_condition_check(txq) || + rte_get_max_simd_bitwidth() + < RTE_MAX_128_SIMD) { dev->tx_pkt_burst = fm10k_xmit_pkts; dev->tx_pkt_prepare = fm10k_prep_pkts; PMD_INIT_LOG(DEBUG, "Use regular Tx func"); @@ -2956,7 +2958,8 @@ fm10k_set_tx_function(struct rte_eth_dev *dev) txq = dev->data->tx_queues[i]; txq->tx_ftag_en = tx_ftag_en; /* Check if Vector Tx is satisfied */ - if (fm10k_tx_vec_condition_check(txq)) + if (fm10k_tx_vec_condition_check(txq) || + rte_get_max_simd_bitwidth() < RTE_MAX_128_SIMD) use_sse = 0; } @@ -2990,7 +2993,9 @@ fm10k_set_rx_function(struct rte_eth_dev *dev) * conditions to be met. */ if (!fm10k_rx_vec_condition_check(dev) && - dev_info->rx_vec_allowed && !rx_ftag_en) { + dev_info->rx_vec_allowed && !rx_ftag_en && + rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { if (dev->data->scattered_rx) dev->rx_pkt_burst = fm10k_recv_scattered_pkts_vec; else From patchwork Thu Aug 27 16:12:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76105 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1286AA04B1; Thu, 27 Aug 2020 18:15:04 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2DE981C10C; Thu, 27 Aug 2020 18:13:51 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id A8BC51C08C for ; Thu, 27 Aug 2020 18:13:40 +0200 (CEST) IronPort-SDR: RpsqJqDOMISqR2vCh4w8QXCJ+eZsQqxMaIfRoC3J7tRzpIIIr+/DG+ktrDYjTovBlwuD9bSpuw Dacn74jx1i5g== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767025" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767025" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:28 -0700 IronPort-SDR: IZs+ucnv+imOBAdsBH7HIZH5FfZPLQvwiYGg+EjKssho2sT/0rjHArdcWCus9VZFf8ua2wuQOz H7Wpz9hNrUbA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681518" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:27 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Jingjing Wu , Beilei Xing Date: Thu, 27 Aug 2020 17:12:56 +0100 Message-Id: <20200827161304.32300-10-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 09/17] net/iavf: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Jingjing Wu Cc: Beilei Xing Signed-off-by: Ciara Power --- drivers/net/iavf/iavf_rxtx.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c index 05a7dd898a..b798d082a2 100644 --- a/drivers/net/iavf/iavf_rxtx.c +++ b/drivers/net/iavf/iavf_rxtx.c @@ -2105,14 +2105,16 @@ iavf_set_rx_function(struct rte_eth_dev *dev) int i; bool use_avx2 = false; - if (!iavf_rx_vec_dev_check(dev)) { + if (!iavf_rx_vec_dev_check(dev) && + rte_get_max_simd_bitwidth() >= RTE_MAX_128_SIMD) { for (i = 0; i < dev->data->nb_rx_queues; i++) { rxq = dev->data->rx_queues[i]; (void)iavf_rxq_vec_setup(rxq); } - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) + if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) use_avx2 = true; if (dev->data->scattered_rx) { @@ -2178,7 +2180,8 @@ iavf_set_tx_function(struct rte_eth_dev *dev) int i; bool use_avx2 = false; - if (!iavf_tx_vec_dev_check(dev)) { + if (!iavf_tx_vec_dev_check(dev) && + rte_get_max_simd_bitwidth() >= RTE_MAX_128_SIMD) { for (i = 0; i < dev->data->nb_tx_queues; i++) { txq = dev->data->tx_queues[i]; if (!txq) @@ -2186,8 +2189,9 @@ iavf_set_tx_function(struct rte_eth_dev *dev) iavf_txq_vec_setup(txq); } - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) + if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) use_avx2 = true; PMD_DRV_LOG(DEBUG, "Using %sVector Tx (port %d).", From patchwork Thu Aug 27 16:12:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76106 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8A96BA04B1; Thu, 27 Aug 2020 18:15:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5FD6E1C119; Thu, 27 Aug 2020 18:13:52 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 198121C0AF for ; Thu, 27 Aug 2020 18:13:40 +0200 (CEST) IronPort-SDR: 64tDxak4JnvRc1T2+C1ElJk1nS2Yx+hNRLI6vxgjq/Y/sdquyQZRR6RWtxlO6+CZJN7GZ8Qite Sop2S9XMO4DQ== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767028" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767028" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:30 -0700 IronPort-SDR: xdJL+DWlxWKXeO8z0Mnsz0DMJj0d27brkpfLocA5L7FdMgXRsyPkQ6V/HHbPiGFYX1L6bq3Hf+ z3oBgcajoB2w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681524" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:29 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Qiming Yang , Qi Zhang Date: Thu, 27 Aug 2020 17:12:57 +0100 Message-Id: <20200827161304.32300-11-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 10/17] net/ice: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Qiming Yang Cc: Qi Zhang Signed-off-by: Ciara Power --- drivers/net/ice/ice_rxtx.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index 2e1f06d2c0..eda2d9a8c7 100644 --- a/drivers/net/ice/ice_rxtx.c +++ b/drivers/net/ice/ice_rxtx.c @@ -2889,7 +2889,9 @@ ice_set_rx_function(struct rte_eth_dev *dev) bool use_avx2 = false; if (rte_eal_process_type() == RTE_PROC_PRIMARY) { - if (!ice_rx_vec_dev_check(dev) && ad->rx_bulk_alloc_allowed) { + if (!ice_rx_vec_dev_check(dev) && ad->rx_bulk_alloc_allowed && + rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { ad->rx_vec_allowed = true; for (i = 0; i < dev->data->nb_rx_queues; i++) { rxq = dev->data->rx_queues[i]; @@ -2899,8 +2901,10 @@ ice_set_rx_function(struct rte_eth_dev *dev) } } - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) + if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) && + rte_get_max_simd_bitwidth() + >= RTE_MAX_256_SIMD) use_avx2 = true; } else { @@ -3067,7 +3071,9 @@ ice_set_tx_function(struct rte_eth_dev *dev) bool use_avx2 = false; if (rte_eal_process_type() == RTE_PROC_PRIMARY) { - if (!ice_tx_vec_dev_check(dev)) { + if (!ice_tx_vec_dev_check(dev) && + rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { ad->tx_vec_allowed = true; for (i = 0; i < dev->data->nb_tx_queues; i++) { txq = dev->data->tx_queues[i]; @@ -3077,8 +3083,10 @@ ice_set_tx_function(struct rte_eth_dev *dev) } } - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) + if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) && + rte_get_max_simd_bitwidth() + >= RTE_MAX_256_SIMD) use_avx2 = true; } else { From patchwork Thu Aug 27 16:12:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76107 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 74E79A04B1; Thu, 27 Aug 2020 18:15:25 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5955A1C11E; Thu, 27 Aug 2020 18:13:53 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 98A451C0B2 for ; Thu, 27 Aug 2020 18:13:41 +0200 (CEST) IronPort-SDR: vN5ScbwME8E/Tbm4IQk0KRZ5QO3xQekftEoWZFCToNDghF05zD9Xs5+nV8vI9KhIFlv864nLc1 lYvSWUH6LUaw== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767034" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767034" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:31 -0700 IronPort-SDR: 0vuwzSq7nHeOimbsBPqmxhc2lzQpr59Bb7fQmBEqHZwOksKrMP1B0/A02qtssb1L3vmKfTDoAU Gw1lW/CZ0Cng== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681532" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:30 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Wei Zhao , Jeff Guo Date: Thu, 27 Aug 2020 17:12:58 +0100 Message-Id: <20200827161304.32300-12-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 11/17] net/ixgbe: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Wei Zhao Cc: Jeff Guo Signed-off-by: Ciara Power --- drivers/net/ixgbe/ixgbe_rxtx.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index 977ecf5137..eadc7183f2 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -2503,7 +2503,9 @@ ixgbe_set_tx_function(struct rte_eth_dev *dev, struct ixgbe_tx_queue *txq) dev->tx_pkt_prepare = NULL; if (txq->tx_rs_thresh <= RTE_IXGBE_TX_MAX_FREE_BUF_SZ && (rte_eal_process_type() != RTE_PROC_PRIMARY || - ixgbe_txq_vec_setup(txq) == 0)) { + ixgbe_txq_vec_setup(txq) == 0) && + rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { PMD_INIT_LOG(DEBUG, "Vector tx enabled."); dev->tx_pkt_burst = ixgbe_xmit_pkts_vec; } else @@ -4743,7 +4745,8 @@ ixgbe_set_rx_function(struct rte_eth_dev *dev) * conditions to be met and Rx Bulk Allocation should be allowed. */ if (ixgbe_rx_vec_dev_conf_condition_check(dev) || - !adapter->rx_bulk_alloc_allowed) { + !adapter->rx_bulk_alloc_allowed || + rte_get_max_simd_bitwidth() < RTE_MAX_128_SIMD) { PMD_INIT_LOG(DEBUG, "Port[%d] doesn't meet Vector Rx " "preconditions", dev->data->port_id); From patchwork Thu Aug 27 16:12:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76108 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4B8E0A04B1; Thu, 27 Aug 2020 18:15:37 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 968F41C123; Thu, 27 Aug 2020 18:13:54 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 923071C0B0 for ; Thu, 27 Aug 2020 18:13:41 +0200 (CEST) IronPort-SDR: ka23vjhKJILOadwciy36qMnFNqacQB6xqYVKBfDRf3QTKUcocXJlBX8FVUUN2FxHk3gwP+mcl8 iI4M4PI2ADmw== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767039" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767039" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:33 -0700 IronPort-SDR: mpV9JsaStZpiZef9I+/NkOtuYZZDADH4HAgBx3T1mislzIAqmsuFHP+pAn8le8TOk/Ynqq5BjP oD9pVfyDQ4ig== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681552" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:31 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko Date: Thu, 27 Aug 2020 17:12:59 +0100 Message-Id: <20200827161304.32300-13-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 12/17] net/mlx5: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Matan Azrad Cc: Shahaf Shuler Cc: Viacheslav Ovsiienko Signed-off-by: Ciara Power --- v2: Moved check for max bitwidth into existing check vec support function. --- drivers/net/mlx5/mlx5_rxtx_vec.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/mlx5/mlx5_rxtx_vec.c b/drivers/net/mlx5/mlx5_rxtx_vec.c index 711dcd35fa..c384c737dc 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec.c +++ b/drivers/net/mlx5/mlx5_rxtx_vec.c @@ -148,6 +148,8 @@ mlx5_check_vec_rx_support(struct rte_eth_dev *dev) struct mlx5_priv *priv = dev->data->dev_private; uint32_t i; + if (rte_get_max_simd_bitwidth() < RTE_MAX_128_SIMD) + return -ENOTSUP; if (!priv->config.rx_vec_en) return -ENOTSUP; if (mlx5_mprq_enabled(dev)) From patchwork Thu Aug 27 16:13:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76109 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5850AA04B1; Thu, 27 Aug 2020 18:15:49 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DF40F1C12A; Thu, 27 Aug 2020 18:13:55 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 033A91C0AF for ; Thu, 27 Aug 2020 18:13:41 +0200 (CEST) IronPort-SDR: 9ifqdkBSvxbZYyB+rJizRD3ReLExqwv29OcKID/YCyDUrXCyf0W53PcULl8Aq0C7xHSHItKwwl z4PQGYl5WIEQ== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767045" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767045" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:35 -0700 IronPort-SDR: HNCDfeQdwl10IBFFUmm50R8/a1EpQZ0WWh+rReFcZ3cLmDDx/9fmnRB+qciaJUZz3CgamNTKKP V5BiwWz/rurQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681568" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:33 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Maxime Coquelin , Chenbo Xia , Zhihong Wang Date: Thu, 27 Aug 2020 17:13:00 +0100 Message-Id: <20200827161304.32300-14-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 13/17] net/virtio: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Maxime Coquelin Cc: Chenbo Xia Cc: Zhihong Wang Signed-off-by: Ciara Power --- drivers/net/virtio/virtio_ethdev.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/net/virtio/virtio_ethdev.c b/drivers/net/virtio/virtio_ethdev.c index dc0093bdf0..f779ce8396 100644 --- a/drivers/net/virtio/virtio_ethdev.c +++ b/drivers/net/virtio/virtio_ethdev.c @@ -1517,9 +1517,11 @@ set_rxtx_funcs(struct rte_eth_dev *eth_dev) if (vtpci_packed_queue(hw)) { PMD_INIT_LOG(INFO, "virtio: using packed ring %s Tx path on port %u", - hw->use_vec_tx ? "vectorized" : "standard", + (hw->use_vec_tx && rte_get_max_simd_bitwidth() + > RTE_MAX_256_SIMD) ? "vectorized" : "standard", eth_dev->data->port_id); - if (hw->use_vec_tx) + if (hw->use_vec_tx && rte_get_max_simd_bitwidth() + > RTE_MAX_256_SIMD) eth_dev->tx_pkt_burst = virtio_xmit_pkts_packed_vec; else eth_dev->tx_pkt_burst = virtio_xmit_pkts_packed; @@ -1536,7 +1538,8 @@ set_rxtx_funcs(struct rte_eth_dev *eth_dev) } if (vtpci_packed_queue(hw)) { - if (hw->use_vec_rx) { + if (hw->use_vec_rx && rte_get_max_simd_bitwidth() + > RTE_MAX_256_SIMD) { PMD_INIT_LOG(INFO, "virtio: using packed ring vectorized Rx path on port %u", eth_dev->data->port_id); @@ -1555,7 +1558,8 @@ set_rxtx_funcs(struct rte_eth_dev *eth_dev) eth_dev->rx_pkt_burst = &virtio_recv_pkts_packed; } } else { - if (hw->use_vec_rx) { + if (hw->use_vec_rx && rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { PMD_INIT_LOG(INFO, "virtio: using vectorized Rx path on port %u", eth_dev->data->port_id); eth_dev->rx_pkt_burst = virtio_recv_pkts_vec; From patchwork Thu Aug 27 16:13:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76110 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DFA8EA04B1; Thu, 27 Aug 2020 18:15:59 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6073B1C12F; Thu, 27 Aug 2020 18:13:57 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id BFF731C0AF for ; Thu, 27 Aug 2020 18:13:42 +0200 (CEST) IronPort-SDR: o6f9i/8hhkMvFX9ft/jlNmdWCVHtuCwxGfznR4FtUFMbFCBTGPsG0lV9rTsdY4uFBFQYieqIBL IhyWu5gaN60w== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767050" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767050" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:37 -0700 IronPort-SDR: jSO74S3m6cdMAWdAIwX1ywVQ5GQAp90CGcx8qvOJmK+UJGvtgC8JmlEEZ3UIUpUzSYwCS0D0qZ k4ZMWFyHC+8Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681586" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:35 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , David Hunt Date: Thu, 27 Aug 2020 17:13:01 +0100 Message-Id: <20200827161304.32300-15-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 14/17] distributor: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: David Hunt Signed-off-by: Ciara Power --- lib/librte_distributor/rte_distributor.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/librte_distributor/rte_distributor.c b/lib/librte_distributor/rte_distributor.c index 1c047f065a..9f0a9b1d48 100644 --- a/lib/librte_distributor/rte_distributor.c +++ b/lib/librte_distributor/rte_distributor.c @@ -636,7 +636,8 @@ rte_distributor_create(const char *name, d->dist_match_fn = RTE_DIST_MATCH_SCALAR; #if defined(RTE_ARCH_X86) - d->dist_match_fn = RTE_DIST_MATCH_VECTOR; + if (rte_get_max_simd_bitwidth() >= RTE_MAX_128_SIMD) + d->dist_match_fn = RTE_DIST_MATCH_VECTOR; #endif /* From patchwork Thu Aug 27 16:13:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76111 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 619F1A04B1; Thu, 27 Aug 2020 18:16:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A3DC21C138; Thu, 27 Aug 2020 18:13:58 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 5E6311C0AF for ; Thu, 27 Aug 2020 18:13:43 +0200 (CEST) IronPort-SDR: AvBr7r/X5j8p5CCnrM+WAAMDO9Svt03PqHl1HRYWb+ImPIYB8Oqr5dGjaZeTmSc+FYWSPNxjwa LflD48DXLsOg== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767055" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767055" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:38 -0700 IronPort-SDR: rO5vkWGEeSo00+zKezWSe0ApwsNceEMWyHvfy3R+jVgz4TYr6pOr108R3pfyzoq4pyic8DsHRw 73hOZuzxmmLg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681608" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:37 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Yipeng Wang , Sameh Gobriel Date: Thu, 27 Aug 2020 17:13:02 +0100 Message-Id: <20200827161304.32300-16-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 15/17] member: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Yipeng Wang Cc: Sameh Gobriel Signed-off-by: Ciara Power --- lib/librte_member/rte_member_ht.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/librte_member/rte_member_ht.c b/lib/librte_member/rte_member_ht.c index cbcd0d4407..71e3cf7b52 100644 --- a/lib/librte_member/rte_member_ht.c +++ b/lib/librte_member/rte_member_ht.c @@ -113,7 +113,8 @@ rte_member_create_ht(struct rte_member_setsum *ss, } #if defined(RTE_ARCH_X86) if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && - RTE_MEMBER_BUCKET_ENTRIES == 16) + RTE_MEMBER_BUCKET_ENTRIES == 16 && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) ss->sig_cmp_fn = RTE_MEMBER_COMPARE_AVX2; else #endif From patchwork Thu Aug 27 16:13:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76112 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7B282A04B1; Thu, 27 Aug 2020 18:16:24 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 188991C192; Thu, 27 Aug 2020 18:14:00 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 6BB7C1C0B0 for ; Thu, 27 Aug 2020 18:13:43 +0200 (CEST) IronPort-SDR: +KqGqj3XHPuEMyPipIGb5Utr8Xi/ErYK5Ln+L44TSFwkMkpCKBbsQSGkYaK8XIc/docuNxPzww SuL4MKy2EW1Q== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767057" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767057" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:40 -0700 IronPort-SDR: 2z+PgT1K401wMVKnwYiwnwwMUjE8KwriRmlaFnFVcysoqjev/bgJz+lp3AJZAktz94VGcrwHO8 OHXAXapTCsQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681621" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:39 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Byron Marohn , Yipeng Wang Date: Thu, 27 Aug 2020 17:13:03 +0100 Message-Id: <20200827161304.32300-17-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 16/17] efd: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Byron Marohn Cc: Yipeng Wang Signed-off-by: Ciara Power --- lib/librte_efd/rte_efd.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/lib/librte_efd/rte_efd.c b/lib/librte_efd/rte_efd.c index 6a799556d4..509ecc8256 100644 --- a/lib/librte_efd/rte_efd.c +++ b/lib/librte_efd/rte_efd.c @@ -645,7 +645,9 @@ rte_efd_create(const char *name, uint32_t max_num_rules, uint32_t key_len, * For less than 4 bits, scalar function performs better * than vectorised version */ - if (RTE_EFD_VALUE_NUM_BITS > 3 && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) + if (RTE_EFD_VALUE_NUM_BITS > 3 + && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) + && rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) table->lookup_fn = EFD_LOOKUP_AVX2; else #endif @@ -655,7 +657,8 @@ rte_efd_create(const char *name, uint32_t max_num_rules, uint32_t key_len, * than vectorised version */ if (RTE_EFD_VALUE_NUM_BITS > 16 && - rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON)) + rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON) && + rte_get_max_simd_bitwidth() >= RTE_MAX_128_SIMD) table->lookup_fn = EFD_LOOKUP_NEON; else #endif From patchwork Thu Aug 27 16:13:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 76113 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0C952A04B1; Thu, 27 Aug 2020 18:16:42 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 47C2A1C1A5; Thu, 27 Aug 2020 18:14:02 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 0E0451C0AF for ; Thu, 27 Aug 2020 18:13:43 +0200 (CEST) IronPort-SDR: 6ZriZ5tpS8y35gBVms1zB0tyNTqcgwV6rItNeiRQd11+P8tpY99yKjkTpZ+m/ojfqB4bAeWZah aiCj8erkPP5g== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767065" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767065" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:42 -0700 IronPort-SDR: 6GlkRZUth5iAoXjjDeVVKZ5slXkZ7NHWovn+j9BYrgzWLMnAmpiPaZk0xKPIm2R/Qad+Y+EkAQ gs4nm6k8flIA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681637" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:41 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Jasvinder Singh , Olivier Matz Date: Thu, 27 Aug 2020 17:13:04 +0100 Message-Id: <20200827161304.32300-18-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 17/17] net: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. This check is done just before the handler is called, it cannot be done when setting the handlers initially as the EAL max simd bitwidth value has not yet been set. Cc: Jasvinder Singh Signed-off-by: Ciara Power --- lib/librte_net/rte_net_crc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/lib/librte_net/rte_net_crc.c b/lib/librte_net/rte_net_crc.c index 9fd4794a9d..d3d3206919 100644 --- a/lib/librte_net/rte_net_crc.c +++ b/lib/librte_net/rte_net_crc.c @@ -9,6 +9,7 @@ #include #include #include +#include #if defined(RTE_ARCH_X86_64) && defined(RTE_MACHINE_CPUFLAG_PCLMULQDQ) #define X86_64_SSE42_PCLMULQDQ 1 @@ -60,6 +61,8 @@ static rte_net_crc_handler handlers_neon[] = { }; #endif +static uint16_t max_simd_bitwidth; + /** * Reflect the bits about the middle * @@ -175,6 +178,11 @@ rte_net_crc_calc(const void *data, uint32_t ret; rte_net_crc_handler f_handle; + if (max_simd_bitwidth == 0) + max_simd_bitwidth = rte_get_max_simd_bitwidth(); + if (max_simd_bitwidth < RTE_MAX_128_SIMD && + handlers != handlers_scalar) + rte_net_crc_set_alg(RTE_NET_CRC_SCALAR); f_handle = handlers[type]; ret = f_handle(data, data_len);