From patchwork Tue Jul 21 05:49:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shougang Wang X-Patchwork-Id: 74516 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0B604A0527; Tue, 21 Jul 2020 08:03:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 127B01C010; Tue, 21 Jul 2020 08:03:12 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id CB6271BFEB; Tue, 21 Jul 2020 08:03:09 +0200 (CEST) IronPort-SDR: 68aDYteCOzI5KQgG0h1YTJMo355yjKSAMffvGx7S0g5qAdBqKYP4RD4GH+4rPreGo0rqBqu7UE XU2hOzVSXNuQ== X-IronPort-AV: E=McAfee;i="6000,8403,9688"; a="147572551" X-IronPort-AV: E=Sophos;i="5.75,377,1589266800"; d="scan'208";a="147572551" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2020 23:03:08 -0700 IronPort-SDR: rfBOdwdTBEsaFal/flT4zVYN4jn6wx2NdwAdyN5ST9gGhPv6sfcNlzc2S7FPzqEMeCzSY+SFBZ M0gw9E+EXUnA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,377,1589266800"; d="scan'208";a="392251263" Received: from intel.sh.intel.com ([10.239.255.20]) by fmsmga001.fm.intel.com with ESMTP; 20 Jul 2020 23:03:07 -0700 From: Shougang Wang To: dev@dpdk.org Cc: beilei.xing@intel.com, jia.guo@intel.com, Shougang Wang , stable@dpdk.org Date: Tue, 21 Jul 2020 05:49:20 +0000 Message-Id: <20200721054920.29749-1-shougangx.wang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200715063515.9262-1-shougangx.wang@intel.com> References: <20200715063515.9262-1-shougangx.wang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2] net/i40e: fix incorrect hash look up table X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The hash look up table(LUT) will not be initializing when starting testpmd with --disable-rss. So that some invalid queue indexes may still in the LUT. When enable RSS by creating RSS rule, some packets will not be into the valid queues. This patch fixes this issue by initializing the LUT when creating an RSS rule. Fixes: feaae285b342 ("net/i40e: support hash configuration in RSS flow") Cc: stable@dpdk.org Signed-off-by: Shougang Wang Tested-by: Zhang, XiX Signed-off-by: Shougang Wang --- drivers/net/i40e/i40e_ethdev.c | 134 ++++++++++++++++----------------- 1 file changed, 63 insertions(+), 71 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 393b5320f..e56543393 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -13070,6 +13070,55 @@ i40e_rss_conf_init(struct i40e_rte_flow_rss_conf *out, return 0; } +/* If conf is NULL, function will init hash LUT with default configration*/ +static int +i40e_rss_set_lut(struct i40e_pf *pf, + struct i40e_rte_flow_rss_conf *conf) +{ + struct i40e_hw *hw = I40E_PF_TO_HW(pf); + uint32_t lut = 0; + uint16_t j, num; + uint32_t i; + + /* If both VMDQ and RSS enabled, not all of PF queues are configured. + * It's necessary to calculate the actual PF queues that are configured. + */ + if (pf->dev_data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_VMDQ_FLAG) + num = i40e_pf_calc_configured_queues_num(pf); + else + num = pf->dev_data->nb_rx_queues; + + if (conf == NULL) + num = RTE_MIN(num, I40E_MAX_Q_PER_TC); + else + num = RTE_MIN(num, conf->conf.queue_num); + PMD_DRV_LOG(INFO, "Max of contiguous %u PF queues are configured", + num); + + if (num == 0) { + PMD_DRV_LOG(ERR, + "No PF queues are configured to enable RSS for port %u", + pf->dev_data->port_id); + return -ENOTSUP; + } + + /* Fill in redirection table */ + for (i = 0, j = 0; i < hw->func_caps.rss_table_size; i++, j++) { + if (j == num) + j = 0; + if (conf == NULL) + lut = (lut << 8) | (j & ((0x1 << + hw->func_caps.rss_table_entry_width) - 1)); + else + lut = (lut << 8) | (conf->conf.queue[j] & ((0x1 << + hw->func_caps.rss_table_entry_width) - 1)); + if ((i & 3) == 3) + I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), lut); + } + + return 0; +} + /* Write HENA register to enable hash */ static int i40e_rss_hash_set(struct i40e_pf *pf, struct i40e_rte_flow_rss_conf *rss_conf) @@ -13318,12 +13367,24 @@ static int i40e_rss_enable_hash(struct i40e_pf *pf, struct i40e_rte_flow_rss_conf *conf) { + enum rte_eth_rx_mq_mode mq_mode = pf->dev_data->dev_conf.rxmode.mq_mode; struct i40e_rte_flow_rss_conf *rss_info = &pf->rss_info; struct i40e_rte_flow_rss_conf rss_conf; + int ret; if (!(conf->conf.types & pf->adapter->flow_types_mask)) return -ENOTSUP; + /* If the RSS is disabled before this, the LUT is uninitialized.  + * So it is necessary to initialize it here. + */ + if (!(mq_mode & ETH_MQ_RX_RSS_FLAG) && !pf->rss_info.conf.queue_num && + !pf->adapter->rss_reta_updated) { + ret = i40e_rss_set_lut(pf, NULL); + if (ret) + return ret; + } + memset(&rss_conf, 0, sizeof(rss_conf)); rte_memcpy(&rss_conf, conf, sizeof(rss_conf)); @@ -13362,39 +13423,7 @@ static int i40e_rss_config_queue_region(struct i40e_pf *pf, struct i40e_rte_flow_rss_conf *conf) { - struct i40e_hw *hw = I40E_PF_TO_HW(pf); - uint32_t lut = 0; - uint16_t j, num; - uint32_t i; - - /* If both VMDQ and RSS enabled, not all of PF queues are configured. - * It's necessary to calculate the actual PF queues that are configured. - */ - if (pf->dev_data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_VMDQ_FLAG) - num = i40e_pf_calc_configured_queues_num(pf); - else - num = pf->dev_data->nb_rx_queues; - - num = RTE_MIN(num, conf->conf.queue_num); - PMD_DRV_LOG(INFO, "Max of contiguous %u PF queues are configured", - num); - - if (num == 0) { - PMD_DRV_LOG(ERR, - "No PF queues are configured to enable RSS for port %u", - pf->dev_data->port_id); - return -ENOTSUP; - } - - /* Fill in redirection table */ - for (i = 0, j = 0; i < hw->func_caps.rss_table_size; i++, j++) { - if (j == num) - j = 0; - lut = (lut << 8) | (conf->conf.queue[j] & ((0x1 << - hw->func_caps.rss_table_entry_width) - 1)); - if ((i & 3) == 3) - I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), lut); - } + i40e_rss_set_lut(pf, conf); i40e_rss_mark_invalid_rule(pf, conf); @@ -13491,46 +13520,9 @@ i40e_rss_disable_hash(struct i40e_pf *pf, static int i40e_rss_clear_queue_region(struct i40e_pf *pf) { - struct i40e_hw *hw = I40E_PF_TO_HW(pf); struct i40e_rte_flow_rss_conf *rss_info = &pf->rss_info; - uint16_t queue[I40E_MAX_Q_PER_TC]; - uint32_t num_rxq, i; - uint32_t lut = 0; - uint16_t j, num; - - num_rxq = RTE_MIN(pf->dev_data->nb_rx_queues, I40E_MAX_Q_PER_TC); - for (j = 0; j < num_rxq; j++) - queue[j] = j; - - /* If both VMDQ and RSS enabled, not all of PF queues are configured. - * It's necessary to calculate the actual PF queues that are configured. - */ - if (pf->dev_data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_VMDQ_FLAG) - num = i40e_pf_calc_configured_queues_num(pf); - else - num = pf->dev_data->nb_rx_queues; - - num = RTE_MIN(num, num_rxq); - PMD_DRV_LOG(INFO, "Max of contiguous %u PF queues are configured", - num); - - if (num == 0) { - PMD_DRV_LOG(ERR, - "No PF queues are configured to enable RSS for port %u", - pf->dev_data->port_id); - return -ENOTSUP; - } - - /* Fill in redirection table */ - for (i = 0, j = 0; i < hw->func_caps.rss_table_size; i++, j++) { - if (j == num) - j = 0; - lut = (lut << 8) | (queue[j] & ((0x1 << - hw->func_caps.rss_table_entry_width) - 1)); - if ((i & 3) == 3) - I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), lut); - } + i40e_rss_set_lut(pf, NULL); rss_info->conf.queue_num = 0; memset(&rss_info->conf.queue, 0, sizeof(uint16_t));