From patchwork Fri Aug 24 12:16:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 43848 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A498E4C99; Fri, 24 Aug 2018 14:17:04 +0200 (CEST) Received: from mail-lf1-f67.google.com (mail-lf1-f67.google.com [209.85.167.67]) by dpdk.org (Postfix) with ESMTP id B33282C0C for ; Fri, 24 Aug 2018 14:17:01 +0200 (CEST) Received: by mail-lf1-f67.google.com with SMTP id r4-v6so6517559lff.12 for ; Fri, 24 Aug 2018 05:17:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=whQCTFmUsFodd4jf4DSppMYjFlndEVDuT+eYk5+PsKU=; b=F3eJXwmtdNYmigGkDI9XvDT3V7aU7lKi5d6wmOXPtGnovMIVU/Vp4Shtc1BVzaAhYV R7rc15FWHcGqqYhoE4VLhd3Sx152DlkHoe7jvaTFoYSDCCsyZEH6/2Mb6gNeBFoCGhGF WbHkdeKic/EFyf0fFGfcPcVEZLOke1i3wrkkghMJi3UChQp+0U15ON0NV4+Io7tjVRiy 5lM6/P7LiPEWeuUtGE7TEhhw2y9Zzs1x81koqJi4Ujht9hRGOO7ZYA5fNJuJbNk3IrxT f5Z5IBRs35W5YTlCknRgypHwhB1/gnXVQnZnStwwis4oQYPy8m3B6q7jfLy5Sm+dCkHx ZlOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=whQCTFmUsFodd4jf4DSppMYjFlndEVDuT+eYk5+PsKU=; b=nspo1Jl9PGkg0YqQU6Nltfmt4nYERaH7KDqkM/r+VycZRrVpwDzcCjfVBKFF9z/fdU u0dK1mzWngtcpMv7jGxQUVSYa+9NyHC12Iy4uzSCmxGGTt8hZB5GpLxA4fWP0ZOXcw6S t/yngE0ee3gk6RvZp+4K9k6NXQznZJtY3yBqyf56vfE82UI3BsU3ZZxSU4VNGj4VZaDc Hjz3r0L3KWT72MU0XOg/Oh8QMvbH+w/9srEo3PiEyGKI2G6XI7z6YdXj1hOXlaJtgNSI bnjDFekkk6bDHDTNsyTwAUdGNfRxRH6dilTYfAxF3ELI09805NzxUcQC0+cAIQ0vDKSM 3p+Q== X-Gm-Message-State: APzg51AtcuOGreBiTxyLGEtEDgPqALKr8da4ERi14Sw/tkgIEpa/d/OK O/KDb2yxmgKFcuUdmxz8c2jk/k4PmEA= X-Google-Smtp-Source: ANB0VdZ7tjD9ygx6XsQthHaQHQuYFWMaWn7ysvglAlnkuCdwJ7dYD1i2a0pWfeuaKNlNGGr1r5gNcA== X-Received: by 2002:a19:3bd4:: with SMTP id d81-v6mr1170490lfl.96.1535113021127; Fri, 24 Aug 2018 05:17:01 -0700 (PDT) Received: from sh.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id a18-v6sm1177672ljk.47.2018.08.24.05.16.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Aug 2018 05:17:00 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com, Liron Himi , Tomasz Duszynski Date: Fri, 24 Aug 2018 14:16:41 +0200 Message-Id: <1535113006-9393-2-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535113006-9393-1-git-send-email-tdu@semihalf.com> References: <1535113006-9393-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH 1/6] drivers/common: add mvep common code for MRVL PMDs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Liron Himi Add MVEP (Marvell Embedded Processors) to drivers/common which will keep code reused by current and future MRVL PMDs. Right now we have only common DMA memory initialization routines there. Signed-off-by: Liron Himi Signed-off-by: Tomasz Duszynski Reviewed-by: Natalie Samsonov --- config/common_base | 5 +++ devtools/test-build.sh | 2 ++ drivers/common/Makefile | 4 +++ drivers/common/meson.build | 2 +- drivers/common/mvep/Makefile | 38 +++++++++++++++++++++ drivers/common/mvep/meson.build | 19 +++++++++++ drivers/common/mvep/mvep_common.c | 45 +++++++++++++++++++++++++ drivers/common/mvep/rte_common_mvep_version.map | 6 ++++ drivers/common/mvep/rte_mvep_common.h | 20 +++++++++++ mk/rte.app.mk | 4 +++ 10 files changed, 144 insertions(+), 1 deletion(-) create mode 100644 drivers/common/mvep/Makefile create mode 100644 drivers/common/mvep/meson.build create mode 100644 drivers/common/mvep/mvep_common.c create mode 100644 drivers/common/mvep/rte_common_mvep_version.map create mode 100644 drivers/common/mvep/rte_mvep_common.h diff --git a/config/common_base b/config/common_base index 4bcbaf9..978592d 100644 --- a/config/common_base +++ b/config/common_base @@ -395,6 +395,11 @@ CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y # +# Compile Marvell Embedded Processors Common +# +CONFIG_RTE_LIBRTE_MVEP_COMMON=n + +# # Compile Marvell PMD driver # CONFIG_RTE_LIBRTE_MVPP2_PMD=n diff --git a/devtools/test-build.sh b/devtools/test-build.sh index 1eee241..82861b2 100755 --- a/devtools/test-build.sh +++ b/devtools/test-build.sh @@ -182,6 +182,8 @@ config () # sed -ri 's,(PMD_MVSAM_CRYPTO=)n,\1y,' $1/.config test -z "$LIBMUSDK_PATH" || \ sed -ri 's,(MVPP2_PMD=)n,\1y,' $1/.config + test -z "$LIBMUSDK_PATH" || \ + sed -ri 's,(MVEP_COMMON=)n,\1y,' $1/.config build_config_hook $1 $2 $3 # Explicit enabler/disabler (uppercase) diff --git a/drivers/common/Makefile b/drivers/common/Makefile index 0fd2237..1795133 100644 --- a/drivers/common/Makefile +++ b/drivers/common/Makefile @@ -8,4 +8,8 @@ ifeq ($(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOO DIRS-y += octeontx endif +ifeq ($(CONFIG_RTE_LIBRTE_MVEP_COMMON),y) +DIRS-$(CONFIG_RTE_LIBRTE_MVEP_COMMON) += mvep +endif + include $(RTE_SDK)/mk/rte.subdir.mk diff --git a/drivers/common/meson.build b/drivers/common/meson.build index d7b7d8c..f828ce7 100644 --- a/drivers/common/meson.build +++ b/drivers/common/meson.build @@ -2,6 +2,6 @@ # Copyright(c) 2018 Cavium, Inc std_deps = ['eal'] -drivers = ['octeontx', 'qat'] +drivers = ['mvep', 'octeontx', 'qat'] config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON' driver_name_fmt = 'rte_common_@0@' diff --git a/drivers/common/mvep/Makefile b/drivers/common/mvep/Makefile new file mode 100644 index 0000000..845bb47 --- /dev/null +++ b/drivers/common/mvep/Makefile @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd. +# + +include $(RTE_SDK)/mk/rte.vars.mk + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(MAKECMDGOALS),config) +ifeq ($(LIBMUSDK_PATH),) +$(error "Please define LIBMUSDK_PATH environment variable") +endif +endif +endif + +# library name +LIB = librte_common_mvep.a + +# library version +LIBABIVER := 1 + +# versioning export map +EXPORT_MAP := rte_common_mvep_version.map + +# external library dependencies +CFLAGS += -I$($RTE_SDK)/drivers/common/mvep +CFLAGS += -I$(LIBMUSDK_PATH)/include +CFLAGS += -DMVCONF_TYPES_PUBLIC +CFLAGS += -DMVCONF_DMA_PHYS_ADDR_T_PUBLIC +CFLAGS += $(WERROR_FLAGS) +CFLAGS += -O3 +LDLIBS += -L$(LIBMUSDK_PATH)/lib +LDLIBS += -lmusdk +LDLIBS += -lrte_eal -lrte_kvargs + +# library source files +SRCS-$(CONFIG_RTE_LIBRTE_MVEP_COMMON) += mvep_common.c + +include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/common/mvep/meson.build b/drivers/common/mvep/meson.build new file mode 100644 index 0000000..8ccfacb --- /dev/null +++ b/drivers/common/mvep/meson.build @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd. +# Copyright(c) 2018 Semihalf. +# All rights reserved. +# +path = get_option('lib_musdk_dir') +lib_dir = path + '/lib' +inc_dir = path + '/include' + +lib = cc.find_library('libmusdk', dirs: [lib_dir], required: false) +if not lib.found() + build = false +else + ext_deps += lib + includes += include_directories(inc_dir) + cflags += ['-DMVCONF_TYPES_PUBLIC', '-DMVCONF_DMA_PHYS_ADDR_T_PUBLIC'] +endif + +sources = files('mvep_common.c') diff --git a/drivers/common/mvep/mvep_common.c b/drivers/common/mvep/mvep_common.c new file mode 100644 index 0000000..67fa65b --- /dev/null +++ b/drivers/common/mvep/mvep_common.c @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2018 Marvell International Ltd. + */ + +#include + +#include +#include + +#include "rte_mvep_common.h" + +/* Memory size (in bytes) for MUSDK dma buffers */ +#define MRVL_MUSDK_DMA_MEMSIZE (40 * 1024 * 1024) + +struct mvep { + uint32_t ref_count; +}; + +static struct mvep mvep; + +int rte_mvep_init(enum mvep_module_type module __rte_unused, + struct rte_kvargs *kvlist __rte_unused) +{ + int ret; + + if (!mvep.ref_count) { + ret = mv_sys_dma_mem_init(MRVL_MUSDK_DMA_MEMSIZE); + if (ret) + return ret; + } + + mvep.ref_count++; + + return 0; +} + +int rte_mvep_deinit(enum mvep_module_type module __rte_unused) +{ + mvep.ref_count--; + + if (!mvep.ref_count) + mv_sys_dma_mem_destroy(); + + return 0; +} diff --git a/drivers/common/mvep/rte_common_mvep_version.map b/drivers/common/mvep/rte_common_mvep_version.map new file mode 100644 index 0000000..fa1a1b8 --- /dev/null +++ b/drivers/common/mvep/rte_common_mvep_version.map @@ -0,0 +1,6 @@ +DPDK_18.08 { + global: + + rte_mvep_init; + rte_mvep_deinit; +}; diff --git a/drivers/common/mvep/rte_mvep_common.h b/drivers/common/mvep/rte_mvep_common.h new file mode 100644 index 0000000..ba47e16 --- /dev/null +++ b/drivers/common/mvep/rte_mvep_common.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2018 Marvell International Ltd. + */ + +#ifndef __RTE_MVEP_COMMON_H__ +#define __RTE_MVEP_COMMON_H__ + +#include + +enum mvep_module_type { + MVEP_MOD_T_NONE = 0, + MVEP_MOD_T_PP2, + MVEP_MOD_T_SAM, + MVEP_MOD_T_LAST +}; + +int rte_mvep_init(enum mvep_module_type module, struct rte_kvargs *kvlist); +int rte_mvep_deinit(enum mvep_module_type module); + +#endif /* __RTE_MVEP_COMMON_H__ */ diff --git a/mk/rte.app.mk b/mk/rte.app.mk index de33883..a9c9b4f 100644 --- a/mk/rte.app.mk +++ b/mk/rte.app.mk @@ -98,6 +98,10 @@ ifeq ($(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOO _LDLIBS-y += -lrte_common_octeontx endif +ifeq ($(CONFIG_RTE_LIBRTE_MVEP_COMMON),y) +_LDLIBS-$(CONFIG_RTE_LIBRTE_MVEP_COMMON) += -lrte_common_mvep -L$(LIBMUSDK_PATH)/lib -lmusdk +endif + _LDLIBS-$(CONFIG_RTE_LIBRTE_PCI_BUS) += -lrte_bus_pci _LDLIBS-$(CONFIG_RTE_LIBRTE_VDEV_BUS) += -lrte_bus_vdev _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_BUS) += -lrte_bus_dpaa From patchwork Fri Aug 24 12:16:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 43849 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C1B194CA7; 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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id a18-v6sm1177672ljk.47.2018.08.24.05.17.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Aug 2018 05:17:01 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com, Liron Himi Date: Fri, 24 Aug 2018 14:16:42 +0200 Message-Id: <1535113006-9393-3-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535113006-9393-1-git-send-email-tdu@semihalf.com> References: <1535113006-9393-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH 2/6] net/mvpp2: use common code to initialize DMA X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Liron Himi Use common code to initialize MUSDK DMA memory buffers. Signed-off-by: Liron Himi Reviewed-by: Natalie Samsonov --- drivers/net/Makefile | 3 +++ drivers/net/mvpp2/Makefile | 3 ++- drivers/net/mvpp2/meson.build | 2 +- drivers/net/mvpp2/mrvl_ethdev.c | 36 +++++++++++++----------------------- 4 files changed, 19 insertions(+), 25 deletions(-) diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 664398d..ecee7ba 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -68,6 +68,9 @@ ifeq ($(CONFIG_RTE_LIBRTE_MVPP2_PMD),y) ifeq ($(CONFIG_RTE_LIBRTE_CFGFILE),n) $(error "RTE_LIBRTE_CFGFILE must be enabled in configuration!") endif +ifeq ($(CONFIG_RTE_LIBRTE_MVEP_COMMON),n) +$(error "RTE_LIBRTE_MVEP_COMMON must be enabled in configuration!") +endif endif include $(RTE_SDK)/mk/rte.subdir.mk diff --git a/drivers/net/mvpp2/Makefile b/drivers/net/mvpp2/Makefile index 492aef9..211d398 100644 --- a/drivers/net/mvpp2/Makefile +++ b/drivers/net/mvpp2/Makefile @@ -23,6 +23,7 @@ LIBABIVER := 1 EXPORT_MAP := rte_pmd_mvpp2_version.map # external library dependencies +CFLAGS += -I$(RTE_SDK)/drivers/common/mvep CFLAGS += -I$(LIBMUSDK_PATH)/include CFLAGS += -DMVCONF_TYPES_PUBLIC CFLAGS += -DMVCONF_DMA_PHYS_ADDR_T_PUBLIC @@ -32,7 +33,7 @@ LDLIBS += -L$(LIBMUSDK_PATH)/lib LDLIBS += -lmusdk LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs -lrte_cfgfile -LDLIBS += -lrte_bus_vdev +LDLIBS += -lrte_bus_vdev -lrte_common_mvep # library source files SRCS-$(CONFIG_RTE_LIBRTE_MVPP2_PMD) += mrvl_ethdev.c diff --git a/drivers/net/mvpp2/meson.build b/drivers/net/mvpp2/meson.build index e139889..3620659 100644 --- a/drivers/net/mvpp2/meson.build +++ b/drivers/net/mvpp2/meson.build @@ -22,4 +22,4 @@ sources = files( 'mrvl_qos.c' ) -deps += ['cfgfile'] +deps += ['cfgfile', 'common_mvep'] diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index a2d0576..7ea8946 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -29,6 +29,7 @@ #include #include +#include #include "mrvl_ethdev.h" #include "mrvl_qos.h" @@ -63,9 +64,6 @@ #define MRVL_COOKIE_HIGH_ADDR_SHIFT (sizeof(pp2_cookie_t) * 8) #define MRVL_COOKIE_HIGH_ADDR_MASK (~0ULL << MRVL_COOKIE_HIGH_ADDR_SHIFT) -/* Memory size (in bytes) for MUSDK dma buffers */ -#define MRVL_MUSDK_DMA_MEMSIZE 41943040 - /** Port Rx offload capabilities */ #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \ DEV_RX_OFFLOAD_JUMBO_FRAME | \ @@ -2653,24 +2651,17 @@ rte_pmd_mrvl_probe(struct rte_vdev_device *vdev) if (mrvl_dev_num) goto init_devices; - MRVL_LOG(INFO, "Perform MUSDK initializations"); - /* - * ret == -EEXIST is correct, it means DMA - * has been already initialized (by another PMD). - */ - ret = mv_sys_dma_mem_init(MRVL_MUSDK_DMA_MEMSIZE); - if (ret < 0) { - if (ret != -EEXIST) - goto out_free_kvlist; - else - MRVL_LOG(INFO, - "DMA memory has been already initialized by a different driver."); - } + MRVL_LOG(INFO, "Perform MUSDK initializations\n"); + + ret = rte_mvep_init(MVEP_MOD_T_PP2, kvlist); + if (ret) + goto out_free_kvlist; ret = mrvl_init_pp2(); if (ret) { - MRVL_LOG(ERR, "Failed to init PP!"); - goto out_deinit_dma; + MRVL_LOG(ERR, "Failed to init PP!\n"); + rte_mvep_deinit(MVEP_MOD_T_PP2); + goto out_free_kvlist; } memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size)); @@ -2695,11 +2686,10 @@ rte_pmd_mrvl_probe(struct rte_vdev_device *vdev) for (; i > 0; i--) mrvl_eth_dev_destroy(ifnames.names[i]); - if (mrvl_dev_num == 0) + if (mrvl_dev_num == 0) { mrvl_deinit_pp2(); -out_deinit_dma: - if (mrvl_dev_num == 0) - mv_sys_dma_mem_destroy(); + rte_mvep_deinit(MVEP_MOD_T_PP2); + } out_free_kvlist: rte_kvargs_free(kvlist); @@ -2739,7 +2729,7 @@ rte_pmd_mrvl_remove(struct rte_vdev_device *vdev) MRVL_LOG(INFO, "Perform MUSDK deinit"); mrvl_deinit_hifs(); mrvl_deinit_pp2(); - mv_sys_dma_mem_destroy(); + rte_mvep_deinit(MVEP_MOD_T_PP2); } return 0; From patchwork Fri Aug 24 12:16:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 43850 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9AB534C97; Fri, 24 Aug 2018 14:17:08 +0200 (CEST) Received: from mail-lf1-f67.google.com (mail-lf1-f67.google.com [209.85.167.67]) by dpdk.org (Postfix) with ESMTP id 122744C99 for ; Fri, 24 Aug 2018 14:17:04 +0200 (CEST) Received: by mail-lf1-f67.google.com with SMTP id h64-v6so5033414lfi.10 for ; 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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id a18-v6sm1177672ljk.47.2018.08.24.05.17.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Aug 2018 05:17:02 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com, Tomasz Duszynski , stable@dpdk.org Date: Fri, 24 Aug 2018 14:16:43 +0200 Message-Id: <1535113006-9393-4-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535113006-9393-1-git-send-email-tdu@semihalf.com> References: <1535113006-9393-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH 3/6] net/mvpp2: fix array initialization X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Fix used_bpools array initialization by using range initializer. This way all necessary variables are properly initialized regardless of PP2_NUM_PKT_PROC value. Fixes: 0ddc9b815b11 ("net/mrvl: add net PMD skeleton") Cc: stable@dpdk.org Signed-off-by: Tomasz Duszynski --- drivers/net/mvpp2/mrvl_ethdev.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 7ea8946..60ca6e0 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -84,8 +84,7 @@ static const char * const valid_args[] = { static int used_hifs = MRVL_MUSDK_HIFS_RESERVED; static struct pp2_hif *hifs[RTE_MAX_LCORE]; static int used_bpools[PP2_NUM_PKT_PROC] = { - MRVL_MUSDK_BPOOLS_RESERVED, - MRVL_MUSDK_BPOOLS_RESERVED + [0 ... PP2_NUM_PKT_PROC - 1] = MRVL_MUSDK_BPOOLS_RESERVED }; struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS]; From patchwork Fri Aug 24 12:16:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 43851 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CAA3C4CC3; Fri, 24 Aug 2018 14:17:10 +0200 (CEST) Received: from mail-lf1-f67.google.com (mail-lf1-f67.google.com [209.85.167.67]) by dpdk.org (Postfix) with ESMTP id 8D4764CA1 for ; Fri, 24 Aug 2018 14:17:05 +0200 (CEST) Received: by mail-lf1-f67.google.com with SMTP id q13-v6so6552134lfc.2 for ; Fri, 24 Aug 2018 05:17:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DuNIJKs2ebfo80SbqgaSWcAxNGMIp5DumfTiALAK+uI=; b=uJY5kGQyXqocihMq/IZlrGHlls1nZpVpbreSaiLxw+DCzRuV/ayapKD0t7SzSjAikh 8TiHmJ7hVwSRlr5mHOsBmOd26di+dBTG9mF53/j/4uUZ647qz0JYhuklpbGyuubYQXSO H2qChE6iKfCbQA+daN5AyTIijsF5rwbayFkSJ5JN3fmr3tV7CI9ar9lWYl2Ut95UfONJ 8O+v4vxqZIbABjs1baSR8s3BYlgSklpPdADebLkgEGRuu2AjabDIny2wL9fwXtLowWku GeLLj4HLrkGNsUffvi++AQuAM51LP1f67PdyAKCqcfeDDjwTCXJtWifPVC2wB/XeA7Bj 8SOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DuNIJKs2ebfo80SbqgaSWcAxNGMIp5DumfTiALAK+uI=; b=uZppmkkECOTxo2faFLuXrqEPhfWDuAgVDJ/lNvJAq3enpC2/5MJycbBkVppJFxsmW4 Xo8n4jTl7yWp8Tms7T6ToanWDd6d28TkgkxrGncc5ZcSOMjDWZ8H2jYiT2ciOeROJtBS b/5/KPt/hLHPvRvWmq9sCdFBF4T6Qyq/j+YxUT2EpDP+u0hmaXkPiQWDOHWwoyOuN8aP j3ZtPyS9qWQr6pfp3k3igSjHchJNHLWVmzYeQO3SJe9vw1CDYF5Qjhj27W7hVl19nE1q nMVKzuZr2DecDftLsxoLioft0QBsVdlpdBvEuziZvPHOI3rwtFiugxa/SeTn6895lc0P EY8g== X-Gm-Message-State: APzg51B6RiQBud1Gnm1En2PF6cSW6fQYvrA5Yjskpt0lQFBxe5mK70DD RXikWrl5muMhV/gakSAqG8tcgR+cKr8= X-Google-Smtp-Source: ANB0VdZj8hzREZ56Bt4Kq+UEUWzD3s0JJubBKkYIpjead0XPoVpSrDLnQOX8JbVQReMhpCAZAK3bYw== X-Received: by 2002:a19:1a05:: with SMTP id a5-v6mr1198939lfa.54.1535113024947; Fri, 24 Aug 2018 05:17:04 -0700 (PDT) Received: from sh.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id a18-v6sm1177672ljk.47.2018.08.24.05.17.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Aug 2018 05:17:03 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com, tdu@semihalf.com Date: Fri, 24 Aug 2018 14:16:44 +0200 Message-Id: <1535113006-9393-5-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535113006-9393-1-git-send-email-tdu@semihalf.com> References: <1535113006-9393-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH 4/6] net/mvpp2: fix comments and error messages X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Natalie Samsonov Fix comments and error messages. Fixes: 7235341d7517 ("net/mrvl: support classifier") Cc: tdu@semihalf.com Signed-off-by: Natalie Samsonov Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_flow.c | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_flow.c b/drivers/net/mvpp2/mrvl_flow.c index ecc3419..13295e6 100644 --- a/drivers/net/mvpp2/mrvl_flow.c +++ b/drivers/net/mvpp2/mrvl_flow.c @@ -394,7 +394,8 @@ mrvl_parse_init(const struct rte_flow_item *item, * * @param spec Pointer to the specific flow item. * @param mask Pointer to the specific flow item's mask. - * @param mask Pointer to the flow. + * @param parse_dst Parse either destination or source mac address. + * @param flow Pointer to the flow. * @return 0 in case of success, negative error value otherwise. */ static int @@ -613,6 +614,7 @@ mrvl_parse_ip4_dscp(const struct rte_flow_item_ipv4 *spec, * * @param spec Pointer to the specific flow item. * @param mask Pointer to the specific flow item's mask. + * @param parse_dst Parse either destination or source ip address. * @param flow Pointer to the flow. * @return 0 in case of success, negative error value otherwise. */ @@ -726,6 +728,7 @@ mrvl_parse_ip4_proto(const struct rte_flow_item_ipv4 *spec, * * @param spec Pointer to the specific flow item. * @param mask Pointer to the specific flow item's mask. + * @param parse_dst Parse either destination or source ipv6 address. * @param flow Pointer to the flow. * @return 0 in case of success, negative error value otherwise. */ @@ -874,6 +877,7 @@ mrvl_parse_ip6_next_hdr(const struct rte_flow_item_ipv6 *spec, * * @param spec Pointer to the specific flow item. * @param mask Pointer to the specific flow item's mask. + * @param parse_dst Parse either destination or source port. * @param flow Pointer to the flow. * @return 0 in case of success, negative error value otherwise. */ @@ -949,6 +953,7 @@ mrvl_parse_tcp_dport(const struct rte_flow_item_tcp *spec, * * @param spec Pointer to the specific flow item. * @param mask Pointer to the specific flow item's mask. + * @param parse_dst Parse either destination or source port. * @param flow Pointer to the flow. * @return 0 in case of success, negative error value otherwise. */ @@ -1022,7 +1027,6 @@ mrvl_parse_udp_dport(const struct rte_flow_item_udp *spec, * @param item Pointer to the flow item. * @param flow Pointer to the flow. * @param error Pointer to the flow error. - * @param fields Pointer to the parsed parsed fields enum. * @returns 0 on success, negative value otherwise. */ static int @@ -1073,7 +1077,6 @@ mrvl_parse_eth(const struct rte_flow_item *item, struct rte_flow *flow, * @param item Pointer to the flow item. * @param flow Pointer to the flow. * @param error Pointer to the flow error. - * @param fields Pointer to the parsed parsed fields enum. * @returns 0 on success, negative value otherwise. */ static int @@ -1139,7 +1142,6 @@ mrvl_parse_vlan(const struct rte_flow_item *item, * @param item Pointer to the flow item. * @param flow Pointer to the flow. * @param error Pointer to the flow error. - * @param fields Pointer to the parsed parsed fields enum. * @returns 0 on success, negative value otherwise. */ static int @@ -1205,7 +1207,6 @@ mrvl_parse_ip4(const struct rte_flow_item *item, * @param item Pointer to the flow item. * @param flow Pointer to the flow. * @param error Pointer to the flow error. - * @param fields Pointer to the parsed parsed fields enum. * @returns 0 on success, negative value otherwise. */ static int @@ -1276,7 +1277,6 @@ mrvl_parse_ip6(const struct rte_flow_item *item, * @param item Pointer to the flow item. * @param flow Pointer to the flow. * @param error Pointer to the flow error. - * @param fields Pointer to the parsed parsed fields enum. * @returns 0 on success, negative value otherwise. */ static int @@ -1332,7 +1332,6 @@ mrvl_parse_tcp(const struct rte_flow_item *item, * @param item Pointer to the flow item. * @param flow Pointer to the flow. * @param error Pointer to the flow error. - * @param fields Pointer to the parsed parsed fields enum. * @returns 0 on success, negative value otherwise. */ static int @@ -1981,6 +1980,7 @@ mrvl_parse_pattern_ip6_tcp(const struct rte_flow_item pattern[], * @param pattern Pointer to the flow pattern table. * @param flow Pointer to the flow. * @param error Pointer to the flow error. + * @param ip6 1 to parse ip6 item, 0 to parse ip4 item. * @returns 0 in case of success, negative value otherwise. */ static int @@ -2350,6 +2350,12 @@ mrvl_flow_parse(struct mrvl_priv *priv, const struct rte_flow_attr *attr, return mrvl_flow_parse_actions(priv, actions, flow, error); } +/** + * Get engine type for the given flow. + * + * @param field Pointer to the flow. + * @returns The type of the engine. + */ static inline enum pp2_cls_tbl_type mrvl_engine_type(const struct rte_flow *flow) { @@ -2369,6 +2375,13 @@ mrvl_engine_type(const struct rte_flow *flow) return PP2_CLS_TBL_MASKABLE; } +/** + * Create classifier table. + * + * @param dev Pointer to the device. + * @param flow Pointer to the very first flow. + * @returns 0 in case of success, negative value otherwise. + */ static int mrvl_create_cls_table(struct rte_eth_dev *dev, struct rte_flow *first_flow) { @@ -2655,7 +2668,7 @@ mrvl_flow_remove(struct mrvl_priv *priv, struct rte_flow *flow, /** * DPDK flow destroy callback called when flow is to be removed. * - * @param priv Pointer to the port's private data. + * @param dev Pointer to the device. * @param flow Pointer to the flow. * @param error Pointer to the flow error. * @returns 0 in case of success, negative value otherwise. From patchwork Fri Aug 24 12:16:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 43852 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 80AC34D3A; Fri, 24 Aug 2018 14:17:12 +0200 (CEST) Received: from mail-lj1-f193.google.com (mail-lj1-f193.google.com [209.85.208.193]) by dpdk.org (Postfix) with ESMTP id 868954CA1 for ; Fri, 24 Aug 2018 14:17:06 +0200 (CEST) Received: by mail-lj1-f193.google.com with SMTP id 203-v6so6688778ljj.13 for ; Fri, 24 Aug 2018 05:17:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+ezLhpRVF5U+tAjBCZiE6ooH0HrjSolobZPKeVOd58M=; b=Zlq+Xh/T5zLLqtrv3VxtNLtGFkomWu4EFsvbX/C7x/FTXcwMnSACQ9Z9L0DLhxc+gC sVHueLFIZ8F+OLTlwl/Lg+gMZ3l9p0ud9bR32w4B6QWDk8vV5uPF0H0sHQTh/gn6Jgng EtylpilNSHdTU5nh4M+w4KYqL6QhgINXSTW8H/pGLDUocjdDMlmra3/TsZotYGITAThc 34jJ5d3SOjJgbFnkPP40gf2IG6OHgfDVWu79mKD7hp5OvYmt3greKCaeU9w6KUCS8Xzf vEyPoFKngFmEYcQrvh9FBgakRWxFgbj+THac3HQvHJRny6QH01lVz0jS/gBj/Lux7J++ kGyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+ezLhpRVF5U+tAjBCZiE6ooH0HrjSolobZPKeVOd58M=; b=Tz69toNB7b9KYmaJ9UmY2e4hMDCivbPQHpFdV3PYuG6RSGyHn7Xf202bR7yWMDclJE NfJPJeJb8OcZv6Kq9EWB/vbLrIyHY5skFQLDxLyxyC0bPJg4DqDT+OXG8AcE94kO4TkM 5qHIdTZmYynS4JZAyItSnM+/2Jtx4ssBobwovNidMi3WsgVxMrfIbZrMnnzeJ2pIR2nI Ab6MyG2dcZsS9RqXXWymhNMGI5Pn9CdNEWcsB19N5gLFo+mWbDsEV1ccMnPSe9XTI5I4 icG6zUSyMN3hnxYkfBFEUPyJZfrn/S5oTjlnhtxfUhHNeqAI4jbeIPyqfoxlT9oJLGy2 LamA== X-Gm-Message-State: APzg51BSv0XYvuxHeCyQ+BHQhcOINH8RS+RikBE/TSURSCgBMXo0bnmy tOhBquaIZzFyO+VwKulWX/gAffrUntQ= X-Google-Smtp-Source: ANB0VdYlwA1gIEddTRo3Zk2h/NT+4dsGY1WMe+exd7w9aFlLowmVGBDo6KC99LzCYh1cgDuAn8mb5Q== X-Received: by 2002:a2e:7a08:: with SMTP id v8-v6mr1193132ljc.121.1535113026098; Fri, 24 Aug 2018 05:17:06 -0700 (PDT) Received: from sh.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id a18-v6sm1177672ljk.47.2018.08.24.05.17.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Aug 2018 05:17:05 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com Date: Fri, 24 Aug 2018 14:16:45 +0200 Message-Id: <1535113006-9393-6-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535113006-9393-1-git-send-email-tdu@semihalf.com> References: <1535113006-9393-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH 5/6] net/mvpp2: make private variables static X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Natalie Samsonov Mark internal variables static to avoid potential redefinition errors later on. Signed-off-by: Natalie Samsonov Reviewed-by: Yelena Krivosheev --- drivers/net/mvpp2/mrvl_ethdev.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 60ca6e0..5cd84c1 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -87,9 +87,9 @@ static int used_bpools[PP2_NUM_PKT_PROC] = { [0 ... PP2_NUM_PKT_PROC - 1] = MRVL_MUSDK_BPOOLS_RESERVED }; -struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS]; -int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE]; -uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID; +static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS]; +static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE]; +static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID; int mrvl_logtype; From patchwork Fri Aug 24 12:16:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 43853 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8A3515398; Fri, 24 Aug 2018 14:17:14 +0200 (CEST) Received: from mail-lf1-f68.google.com (mail-lf1-f68.google.com [209.85.167.68]) by dpdk.org (Postfix) with ESMTP id A2E074CAD for ; Fri, 24 Aug 2018 14:17:07 +0200 (CEST) Received: by mail-lf1-f68.google.com with SMTP id z11-v6so6514384lff.9 for ; Fri, 24 Aug 2018 05:17:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RiHTFc5IROF+rR74not8nQ52o6A7SWEJIrPv9/aPEEA=; b=LETlJ86ME2I9cUqkzSVDukMkI2CaOqdxaQ5kKTtG9+c209Aqatgdr3+kkBqKcravi+ JQe8PoHfnUA94bTo4ZrYblZKYePss5z+5rpvmDzZ3MicFf/+sGVxthxLGq1cQSh7fifP Mmr9jYi0rVD7FyzASyhPOPsG7eH3bk6yyi3IdTNkVBwX2bateqOqSwYyakimE+K26yFq erBJ63zdRpbBPI6s7nQiNq/gI/4Rk3ckkfYMnxgjtOdEdjBoeftoujCXq47viYDkZDX4 uBgv2VD8b/Uci/vZ6G/v+oDAjR+uw1AZ0BzJnSHQVohAlL/xLAcMusEiIjtFV6c9nlrl Pu+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RiHTFc5IROF+rR74not8nQ52o6A7SWEJIrPv9/aPEEA=; b=ZbtE/MBQqhNbOl7fi+oSgsRWVbCSLjsefHPWNZnuudbw3GRE/GLiLES7QSLDCTBUdJ dwnXd5hvrVAoTKOT5LvwMRdfoHBK4w3/Tw5EuhVYndsvKXdlQep4ZhrqiYoIRshvQsGK 8uMjWf32QQh5p/d9af2gregsL5iUIzY3UgjUIHPANv2yTggkmW33cJe1KzdHsE1DGVdw 3shXSJEc7cjyvb9GyP9dUiFA9UXnb5feQOUXdl4xBjBAmBY6muhYPjM7/iNpE2EWlgmZ Wv8oO4M246NVb8USkpl4G69ddbc7Xyo44PJm0xl0tDg2e02vKF4DaNbCgFmujOyDOHaD Af5w== X-Gm-Message-State: APzg51AS7FC5d0oLlgZX6PGS0LsV8iGvv7hEaMR/KujlrC6mqkSPNBsB zC7lYG4cE7P/8FdDUA1+dOsq/mnQbi8= X-Google-Smtp-Source: ANB0VdYb+F26GkDTAOPECeiwoq6EZDDPpkuYayE5lwl/ggAfFlVfThb/pizLXOa4HTHbm8h3xPACSw== X-Received: by 2002:a19:8f8c:: with SMTP id s12-v6mr1225334lfk.83.1535113027181; Fri, 24 Aug 2018 05:17:07 -0700 (PDT) Received: from sh.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id a18-v6sm1177672ljk.47.2018.08.24.05.17.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Aug 2018 05:17:06 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com Date: Fri, 24 Aug 2018 14:16:46 +0200 Message-Id: <1535113006-9393-7-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535113006-9393-1-git-send-email-tdu@semihalf.com> References: <1535113006-9393-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH 6/6] net/mvpp2: add VLAN packet type support for parser offload X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Natalie Samsonov Add VLAN packet type support for parser offload. Signed-off-by: Natalie Samsonov Reviewed-by: Shlomi Gridish Reviewed-by: Dmitri Epshtein Reviewed-by: Yuval Caduri --- drivers/net/mvpp2/mrvl_ethdev.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 5cd84c1..5b92d82 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -1353,6 +1353,8 @@ mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) { static const uint32_t ptypes[] = { RTE_PTYPE_L2_ETHER, + RTE_PTYPE_L2_ETHER_VLAN, + RTE_PTYPE_L2_ETHER_QINQ, RTE_PTYPE_L3_IPV4, RTE_PTYPE_L3_IPV4_EXT, RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, @@ -1922,13 +1924,27 @@ mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc, { enum pp2_inq_l3_type l3_type; enum pp2_inq_l4_type l4_type; + enum pp2_inq_vlan_tag vlan_tag; uint64_t packet_type; pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset); pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset); + pp2_ppio_inq_desc_get_vlan_tag(desc, &vlan_tag); packet_type = RTE_PTYPE_L2_ETHER; + switch (vlan_tag) { + case PP2_INQ_VLAN_TAG_SINGLE: + packet_type |= RTE_PTYPE_L2_ETHER_VLAN; + break; + case PP2_INQ_VLAN_TAG_DOUBLE: + case PP2_INQ_VLAN_TAG_TRIPLE: + packet_type |= RTE_PTYPE_L2_ETHER_QINQ; + break; + default: + break; + } + switch (l3_type) { case PP2_INQ_L3_TYPE_IPV4_NO_OPTS: packet_type |= RTE_PTYPE_L3_IPV4;