From patchwork Fri Oct 27 06:50:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?N=C3=A9lio_Laranjeiro?= X-Patchwork-Id: 31000 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A945A1BB45; Fri, 27 Oct 2017 08:50:28 +0200 (CEST) Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by dpdk.org (Postfix) with ESMTP id 00AED1BB1D for ; Fri, 27 Oct 2017 08:50:26 +0200 (CEST) Received: by mail-wm0-f67.google.com with SMTP id b9so1615813wmh.0 for ; Thu, 26 Oct 2017 23:50:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=9svB+1I28npTdEa84ZBPtof+PJaYzsutShiLiwQ1LM4=; b=G6fFKb8DxeY2vsZA1oEKSFewjIdeBK9DwUmbiQ/oAjN2Z/pPl0eG4ggs09vWT0Q5l1 +HBt+Bdr+eWtCWbyBC4rFt4rdiVw2mzckIK0B7HWy+v1ve3yeo3c+zs8Q9gOCAoQdyeU UAyu4qHDiC3kh2ZMxUsfKOTgG5kfzFeDVtMGzraIANhVZx/Jx4gofnB0c4e4sCHsKhQ8 b1gltRgIxBO6dRCxcUiJk5nBdEKhDrz+1QEhXsYHrLVchg/IAH3gEplqZ3u+RXWeewBe vOVWORhhX92R9y8LFf0Ul4AfzMeiYuZk7joGR/n1mPuu5fcAldL72mB9Q7IwAqCjqSd+ NQNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=9svB+1I28npTdEa84ZBPtof+PJaYzsutShiLiwQ1LM4=; b=TaR8IsWczIfYUvBv95DkeiF1ApTcvwPhEKq0VbIY70Xr5cmIR1Vc4XdXL/gZZ3Vm1l ly7u+mQXbCXcottlMlcsQqFQFmhIMeCGnTq5xACzht2FxnhCO8mAlGmDROyce2UWkLoD vkPBlnXG0tqo5k+iTmuQqGZ188im+x2TYE+s9kqI11j/bNXKz5waMYrDQdS0Ji0vbTmB K1aimi42/h4SNLGldlz5tzQzRlCJS05aJhdHO4vXoFqXqsu0/PoDy6rtGXbkXG6wAX/9 OfBz2e3n3PzKwZdn7sRFqjkaWZEpgDghtirflKl98wt+1yCY/U6Lj2RWwRq1ek+LQ3cs bsCg== X-Gm-Message-State: AMCzsaWtJ+UjnxIQpGZ/TtTXFk4+CJYjkdWKUBf1Nbwh7EEzGYplm4mr 2Wl0zqg+tB1rErG6xjiXM49Qzy/InQ== X-Google-Smtp-Source: ABhQp+TapnyUChDTgzON9hkacSfp4InSiLxoIr7MCmAB3qTbyAehu1iBONlJcZkfpGN1OvloEU5B/A== X-Received: by 10.80.240.26 with SMTP id r26mr21129595edl.57.1509087026390; Thu, 26 Oct 2017 23:50:26 -0700 (PDT) Received: from laranjeiro-vm.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id h51sm4529244eda.56.2017.10.26.23.50.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 23:50:25 -0700 (PDT) From: Nelio Laranjeiro To: dev@dpdk.org Cc: Yongseok Koh , Adrien Mazarguil Date: Fri, 27 Oct 2017 08:50:00 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 Subject: [dpdk-dev] [PATCH] net/mlx5: fix flow director matching rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Flow director API does not provide a layer 2 configuration when the filter is for layer 3 and 4 causing the translation to generic flow API to be wrong, as not providing a mask for layer ends by using the default one. In this case, the Ethernet mask layer is full whereas it must be empty. Fixes: 4c3e9bcdd52e ("net/mlx5: support flow director") Signed-off-by: Nelio Laranjeiro Acked-by: Yongseok Koh --- drivers/net/mlx5/mlx5_flow.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index f392f1f65..567c7f675 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -479,6 +479,7 @@ struct mlx5_fdir { struct rte_flow_action actions[2]; struct rte_flow_item items[4]; struct rte_flow_item_eth l2; + struct rte_flow_item_eth l2_mask; union { struct rte_flow_item_ipv4 ipv4; struct rte_flow_item_ipv6 ipv6; @@ -2615,6 +2616,7 @@ priv_fdir_filter_convert(struct priv *priv, attributes->items[0] = (struct rte_flow_item) { .type = RTE_FLOW_ITEM_TYPE_ETH, .spec = &attributes->l2, + .mask = &attributes->l2_mask, }; switch (fdir_filter->action.behavior) { case RTE_ETH_FDIR_ACCEPT: @@ -2778,6 +2780,11 @@ priv_fdir_filter_add(struct priv *priv, { struct mlx5_fdir attributes = { .attr.group = 0, + .l2_mask = { + .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00", + .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", + .type = 0, + }, }; struct mlx5_flow_parse parser = { .layer = HASH_RXQ_ETH,