Message ID | C0759555-9A77-4AE2-B00F-79C123C0606C@mhcomputing.net (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers |
Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 969BBC368; Wed, 1 Jul 2015 07:18:10 +0200 (CEST) Received: from mail.mhcomputing.net (master.mhcomputing.net [74.208.46.186]) by dpdk.org (Postfix) with ESMTP id F3325C34A for <dev@dpdk.org>; Wed, 1 Jul 2015 07:18:08 +0200 (CEST) Received: from [192.168.1.160] (99-34-229-174.lightspeed.sntcca.sbcglobal.net [99.34.229.174]) by mail.mhcomputing.net (Postfix) with ESMTPSA id E255680B7BF; Tue, 30 Jun 2015 22:15:18 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 7.3 \(1878.6\)) From: Matthew Hall <mhall@mhcomputing.net> In-Reply-To: <F9A7424C-CB3A-44C2-9D2A-794C6E31B660@mhcomputing.net> Date: Tue, 30 Jun 2015 22:17:54 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: <C0759555-9A77-4AE2-B00F-79C123C0606C@mhcomputing.net> References: <1A87AD2E-38CD-4C61-A9FD-C52608FF9DAC@mhcomputing.net> <39879033.dIVnPGkh8l@xps13> <386858255.20150629121137@intel.com> <2576181.dRfjlrHRWI@xps13> <F9A7424C-CB3A-44C2-9D2A-794C6E31B660@mhcomputing.net> To: Thomas Monjalon <thomas.monjalon@6wind.com> X-Mailer: Apple Mail (2.1878.6) Cc: dev@dpdk.org Subject: Re: [dpdk-dev] RTM instruction compile failure for XABORT when AVX is active X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK <dev.dpdk.org> List-Unsubscribe: <http://dpdk.org/ml/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://dpdk.org/ml/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <http://dpdk.org/ml/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> |
Commit Message
Matthew Hall
July 1, 2015, 5:17 a.m. UTC
To be a bit more specific, this is what I had to do to fix it for clang 3.6 SVN snapshot release. I am not sure if there is a better way of handling this situation. I'd love to know where I could improve it. Matthew.
Comments
With those two items commented out, and these CFLAGS: "-g -O0 -fPIC -msse4.2" it looks like I can reproduce the issue in clang 2.6 series: /vagrant/external/dpdk/build/include/rte_rtm.h:56:15: error: invalid operand for inline asm constraint 'i' asm volatile(".byte 0xc6,0xf8,%P0" :: "i" (status) : "memory"); So there are definitely some corner cases that seem to be able to trigger it. On Jun 30, 2015, at 10:17 PM, Matthew Hall <mhall@mhcomputing.net> wrote: > To be a bit more specific, this is what I had to do to fix it for clang 3.6 SVN snapshot release. > > I am not sure if there is a better way of handling this situation. I'd love to know where I could improve it. > > Matthew. > > diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk > index f595cd0..8c883ee 100644 > --- a/mk/rte.cpuflags.mk > +++ b/mk/rte.cpuflags.mk > @@ -77,13 +77,13 @@ ifneq ($(filter $(AUTO_CPUFLAGS),__RDRND__),) > CPUFLAGS += RDRAND > endif > > -ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),) > -CPUFLAGS += FSGSBASE > -endif > +#ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),) > +#CPUFLAGS += FSGSBASE > +#endif > > -ifneq ($(filter $(AUTO_CPUFLAGS),__F16C__),) > -CPUFLAGS += F16C > -endif > +#ifneq ($(filter $(AUTO_CPUFLAGS),__F16C__),) > +#CPUFLAGS += F16C > +#endif > > ifneq ($(filter $(AUTO_CPUFLAGS),__AVX2__),) > CPUFLAGS += AVX2
On Tue, Jun 30, 2015 at 10:49:26PM -0700, Matthew Hall wrote: > With those two items commented out, and these CFLAGS: > > "-g -O0 -fPIC -msse4.2" > The recommended way of specifying a particular instruction set is via the RTE_MACHINE setting in your build time config. Can you perhaps reproduce the issue using a setting there? /Bruce > it looks like I can reproduce the issue in clang 2.6 series: > > /vagrant/external/dpdk/build/include/rte_rtm.h:56:15: error: invalid operand for inline asm constraint 'i' > asm volatile(".byte 0xc6,0xf8,%P0" :: "i" (status) : "memory"); > > So there are definitely some corner cases that seem to be able to trigger it. > > On Jun 30, 2015, at 10:17 PM, Matthew Hall <mhall@mhcomputing.net> wrote: > > > To be a bit more specific, this is what I had to do to fix it for clang 3.6 SVN snapshot release. > > > > I am not sure if there is a better way of handling this situation. I'd love to know where I could improve it. > > > > Matthew. > > > > diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk > > index f595cd0..8c883ee 100644 > > --- a/mk/rte.cpuflags.mk > > +++ b/mk/rte.cpuflags.mk > > @@ -77,13 +77,13 @@ ifneq ($(filter $(AUTO_CPUFLAGS),__RDRND__),) > > CPUFLAGS += RDRAND > > endif > > > > -ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),) > > -CPUFLAGS += FSGSBASE > > -endif > > +#ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),) > > +#CPUFLAGS += FSGSBASE > > +#endif > > > > -ifneq ($(filter $(AUTO_CPUFLAGS),__F16C__),) > > -CPUFLAGS += F16C > > -endif > > +#ifneq ($(filter $(AUTO_CPUFLAGS),__F16C__),) > > +#CPUFLAGS += F16C > > +#endif > > > > ifneq ($(filter $(AUTO_CPUFLAGS),__AVX2__),) > > CPUFLAGS += AVX2 >
Previously, with the -msse4.2 flag removed, the build failed for a different reason. I can retry without it and see if it's the case in the new DPDK. On Jul 1, 2015, at 4:10 AM, Bruce Richardson <bruce.richardson@intel.com> wrote: > On Tue, Jun 30, 2015 at 10:49:26PM -0700, Matthew Hall wrote: >> With those two items commented out, and these CFLAGS: >> >> "-g -O0 -fPIC -msse4.2" >> > > The recommended way of specifying a particular instruction set is via the > RTE_MACHINE setting in your build time config. Can you perhaps reproduce the > issue using a setting there? > > /Bruce
diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk index f595cd0..8c883ee 100644 --- a/mk/rte.cpuflags.mk +++ b/mk/rte.cpuflags.mk @@ -77,13 +77,13 @@ ifneq ($(filter $(AUTO_CPUFLAGS),__RDRND__),) CPUFLAGS += RDRAND endif -ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),) -CPUFLAGS += FSGSBASE -endif +#ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),) +#CPUFLAGS += FSGSBASE +#endif -ifneq ($(filter $(AUTO_CPUFLAGS),__F16C__),) -CPUFLAGS += F16C -endif +#ifneq ($(filter $(AUTO_CPUFLAGS),__F16C__),) +#CPUFLAGS += F16C +#endif ifneq ($(filter $(AUTO_CPUFLAGS),__AVX2__),) CPUFLAGS += AVX2