From patchwork Wed Dec 18 07:51:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dekel Peled X-Patchwork-Id: 63990 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0280EA0510; Wed, 18 Dec 2019 08:51:58 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8620C1C01; Wed, 18 Dec 2019 08:51:58 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id C103A1F5 for ; Wed, 18 Dec 2019 08:51:56 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from dekelp@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Dec 2019 09:51:55 +0200 Received: from mtl-vdi-280.wap.labs.mlnx. (mtl-vdi-280.wap.labs.mlnx [10.128.130.87]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id xBI7ptYD003695; Wed, 18 Dec 2019 09:51:55 +0200 From: Dekel Peled To: matan@mellanox.com, viacheslavo@mellanox.com, shahafs@mellanox.com Cc: orika@mellanox.com, dev@dpdk.org Date: Wed, 18 Dec 2019 09:51:39 +0200 Message-Id: <9e1ca71b1fd1da5830f44e74f8b12ba7a088a357.1576654991.git.dekelp@mellanox.com> X-Mailer: git-send-email 1.7.1 Subject: [dpdk-dev] [PATCH] net/mlx5: add define of LRO segment chunk size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Maximal size of coalesced LRO segment is set in TIR attributes as number of chunks of size 256 bytes each. Current implementation uses the hardcoded value 256 in several places. This patch adds a definition for this value, and uses this definition in all relevant places. A debug message is added to clearly notify the actual configured size. Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5.h | 5 ++++- drivers/net/mlx5/mlx5_rxq.c | 15 +++++++++++---- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 0c3a90e..c3df825 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -218,8 +218,11 @@ struct mlx5_hca_attr { #define MLX5_LRO_SUPPORTED(dev) \ (((struct mlx5_priv *)((dev)->data->dev_private))->config.lro.supported) +/* Maximal size of coalesced segment for LRO is set in chunks of 256 Bytes. */ +#define MLX5_LRO_SEG_CHUNK_SIZE 256u + /* Maximal size of aggregated LRO packet. */ -#define MLX5_MAX_LRO_SIZE (UINT8_MAX * 256u) +#define MLX5_MAX_LRO_SIZE (UINT8_MAX * MLX5_LRO_SEG_CHUNK_SIZE) /* LRO configurations structure. */ struct mlx5_lro_config { diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 986ec01..bbc07db 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1717,11 +1717,14 @@ struct mlx5_rxq_obj * * * @param dev * Pointer to Ethernet device. + * @param idx + * RX queue index. * @param max_lro_size * The maximum size for LRO packet. */ static void -mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint32_t max_lro_size) +mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx, + uint32_t max_lro_size) { struct mlx5_priv *priv = dev->data->dev_private; @@ -1730,13 +1733,17 @@ struct mlx5_rxq_obj * MLX5_MAX_TCP_HDR_OFFSET) max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET; max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE); - assert(max_lro_size >= 256u); - max_lro_size /= 256u; + assert(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE); + max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE; if (priv->max_lro_msg_size) priv->max_lro_msg_size = RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size); else priv->max_lro_msg_size = max_lro_size; + DRV_LOG(DEBUG, + "port %u Rx Queue %u max LRO message size adjusted to %u bytes", + dev->data->port_id, idx, + priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE); } /** @@ -1909,7 +1916,7 @@ struct mlx5_rxq_ctrl * rte_errno = EINVAL; goto error; } - mlx5_max_lro_msg_size_adjust(dev, max_lro_size); + mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size); /* Toggle RX checksum offload if hardware supports it. */ tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM); tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);