From patchwork Thu Nov 24 16:03:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?N=C3=A9lio_Laranjeiro?= X-Patchwork-Id: 17254 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id D68AC5A0A; Thu, 24 Nov 2016 17:04:33 +0100 (CET) Received: from mail-wj0-f173.google.com (mail-wj0-f173.google.com [209.85.210.173]) by dpdk.org (Postfix) with ESMTP id 929BA379B for ; Thu, 24 Nov 2016 17:04:07 +0100 (CET) Received: by mail-wj0-f173.google.com with SMTP id xy5so36870193wjc.0 for ; Thu, 24 Nov 2016 08:04:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=Gr2GhApmUrEtEqkEXpkO77tUa/pMIr4kL+FCbW2BSc8=; b=Bqb3SLQzFG/OQ0+wQUn3ODRorlNxuEWUfV9zzn16EhgP/MWFg9AzfuCbUiFwmiXiGi PL5Ku/lr55ayfb0gLlqv99YFrx4Q+95UhHx5Izw+jN9MsZK07f427klciTy7s0hMU/4D ImnbJSv8SnOZonTOevrrAsOfI7oYROxZZlcsQN4yfQllTlOtrajYmtWGMUaMHREfnpU8 kGY1JIpPnE2Nj8G3opAKnmrdUWzH+uiIDIPBsQ3e7ZsJPoU9e1cN83i+kTlxwX8YpS4z iCO5li3WiU4EHscNT/t+CrokUuzf+w0beq1OPmQ/1SLjxjYt0JA87zppN5SZ+vboO95E O58A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=Gr2GhApmUrEtEqkEXpkO77tUa/pMIr4kL+FCbW2BSc8=; b=bxrqciMcGcPqQ8HZdXcqiiOCsftqRjE2DGXVwKEMITDIBfO2UY4Hh6XSfVafkrLESM VRIK0RipwHGZnjdMnhAplS9ZgMZpVffRwFYB+UIQ+6OKq8uR+ujGLOr2vhUuygL4d+qH v3uo+BBprWhkW9B00RTNfnqRea6CJZjJn0LhoplYatCi3JYcZkYN79yMalI87duqf7iK ALztiPckBwggSkkPnYZVo//gMcJvo8NVzf+mi3ATRnoDn9kjekdKbuXlPwjVK2z8WBsc M9sreDf7Q2Lw4kJngGqugmWypMxqN2sDIw/0vW/AiHsepvOYI1z6/WAai896V4T8OyYO OzbA== X-Gm-Message-State: AKaTC00XFselt90pzRbURY8oWynMoQUFSFdPAcKMOVCWcXROoJ1KvLMbXEs+SMkXuNHYyRQJ X-Received: by 10.194.94.70 with SMTP id da6mr3337293wjb.180.1480003447280; Thu, 24 Nov 2016 08:04:07 -0800 (PST) Received: from ping.vm.6wind.com (guy78-3-82-239-227-177.fbx.proxad.net. [82.239.227.177]) by smtp.gmail.com with ESMTPSA id vr9sm42495142wjc.35.2016.11.24.08.04.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 24 Nov 2016 08:04:06 -0800 (PST) From: Nelio Laranjeiro To: dev@dpdk.org Cc: Thomas Monjalon , Adrien Mazarguil Date: Thu, 24 Nov 2016 17:03:36 +0100 Message-Id: <9c689005d303b22bd4704d226aff4782a5f5a00b.1479995764.git.nelio.laranjeiro@6wind.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 7/7] net/mlx5: remove inefficient prefetching X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Prefetching completion queue entries is inefficient because too few CPU cycles are spent before their use, which results into cache misses anyway. Signed-off-by: Nelio Laranjeiro Acked-by: Adrien Mazarguil --- drivers/net/mlx5/mlx5_rxtx.c | 21 --------------------- 1 file changed, 21 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index 4b8c197..9f74fd4 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -348,23 +348,6 @@ mlx5_tx_dbrec(struct txq *txq) } /** - * Prefetch a CQE. - * - * @param txq - * Pointer to TX queue structure. - * @param cqe_ci - * CQE consumer index. - */ -static inline void -tx_prefetch_cqe(struct txq *txq, uint16_t ci) -{ - volatile struct mlx5_cqe *cqe; - - cqe = &(*txq->cqes)[ci & ((1 << txq->cqe_n) - 1)]; - rte_prefetch0(cqe); -} - -/** * DPDK callback for TX. * * @param dpdk_txq @@ -395,8 +378,6 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) if (unlikely(!pkts_n)) return 0; /* Prefetch first packet cacheline. */ - tx_prefetch_cqe(txq, txq->cq_ci); - tx_prefetch_cqe(txq, txq->cq_ci + 1); rte_prefetch0(*pkts); /* Start processing. */ txq_complete(txq); @@ -733,7 +714,6 @@ mlx5_tx_burst_mpw(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) if (unlikely(!pkts_n)) return 0; /* Prefetch first packet cacheline. */ - tx_prefetch_cqe(txq, txq->cq_ci); rte_prefetch0(tx_mlx5_wqe(txq, txq->wqe_ci)); rte_prefetch0(tx_mlx5_wqe(txq, txq->wqe_ci + 1)); /* Start processing. */ @@ -938,7 +918,6 @@ mlx5_tx_burst_mpw_inline(void *dpdk_txq, struct rte_mbuf **pkts, if (unlikely(!pkts_n)) return 0; /* Prefetch first packet cacheline. */ - tx_prefetch_cqe(txq, txq->cq_ci); rte_prefetch0(tx_mlx5_wqe(txq, txq->wqe_ci)); rte_prefetch0(tx_mlx5_wqe(txq, txq->wqe_ci + 1)); /* Start processing. */