From patchwork Wed Mar 11 09:05:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Lakkireddy X-Patchwork-Id: 66531 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9303EA0567; Wed, 11 Mar 2020 10:16:56 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4DCCF1C012; Wed, 11 Mar 2020 10:16:45 +0100 (CET) Received: from stargate.chelsio.com (stargate.chelsio.com [12.32.117.8]) by dpdk.org (Postfix) with ESMTP id C05411C011 for ; Wed, 11 Mar 2020 10:16:43 +0100 (CET) Received: from localhost (scalar.blr.asicdesigners.com [10.193.185.94]) by stargate.chelsio.com (8.13.8/8.13.8) with ESMTP id 02B9GfRW014327; Wed, 11 Mar 2020 02:16:42 -0700 From: Rahul Lakkireddy To: dev@dpdk.org Cc: nirranjan@chelsio.com, kaara.satwik@chelsio.com Date: Wed, 11 Mar 2020 14:35:44 +0530 Message-Id: <87c0dcb4774b9b6dd2004c968dedcd3fbac62942.1583906144.git.kaara.satwik@chelsio.com> X-Mailer: git-send-email 2.5.3 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 2/9] net/cxgbe: add rte_flow support for matching IP TOS X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Karra Satwik Add support to match Type of Service (TOS) field in IPv4/IPv6 header Signed-off-by: Karra Satwik Signed-off-by: Rahul Lakkireddy --- drivers/net/cxgbe/base/common.h | 1 + drivers/net/cxgbe/base/t4_hw.c | 1 + drivers/net/cxgbe/cxgbe_filter.c | 7 +++++- drivers/net/cxgbe/cxgbe_flow.c | 42 +++++++++++++++++++++++++++----- 4 files changed, 44 insertions(+), 7 deletions(-) diff --git a/drivers/net/cxgbe/base/common.h b/drivers/net/cxgbe/base/common.h index 6047642c5..793cad11d 100644 --- a/drivers/net/cxgbe/base/common.h +++ b/drivers/net/cxgbe/base/common.h @@ -158,6 +158,7 @@ struct tp_params { int protocol_shift; int ethertype_shift; int macmatch_shift; + int tos_shift; u64 hash_filter_mask; }; diff --git a/drivers/net/cxgbe/base/t4_hw.c b/drivers/net/cxgbe/base/t4_hw.c index f6bf57c75..cd4da0b9f 100644 --- a/drivers/net/cxgbe/base/t4_hw.c +++ b/drivers/net/cxgbe/base/t4_hw.c @@ -5253,6 +5253,7 @@ int t4_init_tp_params(struct adapter *adap) F_ETHERTYPE); adap->params.tp.macmatch_shift = t4_filter_field_shift(adap, F_MACMATCH); + adap->params.tp.tos_shift = t4_filter_field_shift(adap, F_TOS); v = t4_read_reg(adap, LE_3_DB_HASH_MASK_GEN_IPV4_T6_A); adap->params.tp.hash_filter_mask = v; diff --git a/drivers/net/cxgbe/cxgbe_filter.c b/drivers/net/cxgbe/cxgbe_filter.c index d26be3cd7..193738f93 100644 --- a/drivers/net/cxgbe/cxgbe_filter.c +++ b/drivers/net/cxgbe/cxgbe_filter.c @@ -72,7 +72,8 @@ int cxgbe_validate_filter(struct adapter *adapter, if (U(F_PORT, iport) || U(F_ETHERTYPE, ethtype) || U(F_PROTOCOL, proto) || U(F_MACMATCH, macidx) || - U(F_VLAN, ivlan_vld) || U(F_VNIC_ID, ovlan_vld)) + U(F_VLAN, ivlan_vld) || U(F_VNIC_ID, ovlan_vld) || + U(F_TOS, tos)) return -EOPNOTSUPP; /* Ensure OVLAN match is enabled in hardware */ @@ -312,6 +313,8 @@ static u64 hash_filter_ntuple(const struct filter_entry *f) ntuple |= (u64)(f->fs.val.ovlan_vld << 16 | f->fs.val.ovlan) << tp->vnic_shift; } + if (tp->tos_shift >= 0 && f->fs.mask.tos) + ntuple |= (u64)f->fs.val.tos << tp->tos_shift; return ntuple; } @@ -806,6 +809,8 @@ static int set_filter_wr(struct rte_eth_dev *dev, unsigned int fidx) V_FW_FILTER_WR_PORTM(f->fs.mask.iport)); fwr->ptcl = f->fs.val.proto; fwr->ptclm = f->fs.mask.proto; + fwr->ttyp = f->fs.val.tos; + fwr->ttypm = f->fs.mask.tos; fwr->ivlan = cpu_to_be16(f->fs.val.ivlan); fwr->ivlanm = cpu_to_be16(f->fs.mask.ivlan); fwr->ovlan = cpu_to_be16(f->fs.val.ovlan); diff --git a/drivers/net/cxgbe/cxgbe_flow.c b/drivers/net/cxgbe/cxgbe_flow.c index cd833d095..c860b7886 100644 --- a/drivers/net/cxgbe/cxgbe_flow.c +++ b/drivers/net/cxgbe/cxgbe_flow.c @@ -157,6 +157,8 @@ cxgbe_fill_filter_region(struct adapter *adap, if (tp->vnic_shift >= 0 && fs->mask.ovlan_vld) ntuple_mask |= (u64)(F_FT_VLAN_VLD | fs->mask.ovlan) << tp->vnic_shift; + if (tp->tos_shift >= 0) + ntuple_mask |= (u64)fs->mask.tos << tp->tos_shift; if (ntuple_mask != hash_filter_mask) return; @@ -354,9 +356,9 @@ ch_rte_parsetype_ipv4(const void *dmask, const struct rte_flow_item *item, mask = umask ? umask : (const struct rte_flow_item_ipv4 *)dmask; - if (mask->hdr.time_to_live || mask->hdr.type_of_service) + if (mask->hdr.time_to_live) return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, - item, "ttl/tos are not supported"); + item, "ttl is not supported"); if (fs->mask.ethtype && (fs->val.ethtype != RTE_ETHER_TYPE_IPV4)) @@ -370,6 +372,7 @@ ch_rte_parsetype_ipv4(const void *dmask, const struct rte_flow_item *item, CXGBE_FILL_FS(val->hdr.next_proto_id, mask->hdr.next_proto_id, proto); CXGBE_FILL_FS_MEMCPY(val->hdr.dst_addr, mask->hdr.dst_addr, lip); CXGBE_FILL_FS_MEMCPY(val->hdr.src_addr, mask->hdr.src_addr, fip); + CXGBE_FILL_FS(val->hdr.type_of_service, mask->hdr.type_of_service, tos); return 0; } @@ -382,14 +385,17 @@ ch_rte_parsetype_ipv6(const void *dmask, const struct rte_flow_item *item, const struct rte_flow_item_ipv6 *val = item->spec; const struct rte_flow_item_ipv6 *umask = item->mask; const struct rte_flow_item_ipv6 *mask; + u32 vtc_flow, vtc_flow_mask; mask = umask ? umask : (const struct rte_flow_item_ipv6 *)dmask; - if (mask->hdr.vtc_flow || + vtc_flow_mask = be32_to_cpu(mask->hdr.vtc_flow); + + if (vtc_flow_mask & RTE_IPV6_HDR_FL_MASK || mask->hdr.payload_len || mask->hdr.hop_limits) return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, - "tc/flow/hop are not supported"); + "flow/hop are not supported"); if (fs->mask.ethtype && (fs->val.ethtype != RTE_ETHER_TYPE_IPV6)) @@ -401,6 +407,14 @@ ch_rte_parsetype_ipv6(const void *dmask, const struct rte_flow_item *item, return 0; /* ipv6 wild card */ CXGBE_FILL_FS(val->hdr.proto, mask->hdr.proto, proto); + + vtc_flow = be32_to_cpu(val->hdr.vtc_flow); + CXGBE_FILL_FS((vtc_flow & RTE_IPV6_HDR_TC_MASK) >> + RTE_IPV6_HDR_TC_SHIFT, + (vtc_flow_mask & RTE_IPV6_HDR_TC_MASK) >> + RTE_IPV6_HDR_TC_SHIFT, + tos); + CXGBE_FILL_FS_MEMCPY(val->hdr.dst_addr, mask->hdr.dst_addr, lip); CXGBE_FILL_FS_MEMCPY(val->hdr.src_addr, mask->hdr.src_addr, fip); @@ -871,12 +885,28 @@ static struct chrte_fparse parseitem[] = { [RTE_FLOW_ITEM_TYPE_IPV4] = { .fptr = ch_rte_parsetype_ipv4, - .dmask = &rte_flow_item_ipv4_mask, + .dmask = &(const struct rte_flow_item_ipv4) { + .hdr = { + .src_addr = RTE_BE32(0xffffffff), + .dst_addr = RTE_BE32(0xffffffff), + .type_of_service = 0xff, + }, + }, }, [RTE_FLOW_ITEM_TYPE_IPV6] = { .fptr = ch_rte_parsetype_ipv6, - .dmask = &rte_flow_item_ipv6_mask, + .dmask = &(const struct rte_flow_item_ipv6) { + .hdr = { + .src_addr = + "\xff\xff\xff\xff\xff\xff\xff\xff" + "\xff\xff\xff\xff\xff\xff\xff\xff", + .dst_addr = + "\xff\xff\xff\xff\xff\xff\xff\xff" + "\xff\xff\xff\xff\xff\xff\xff\xff", + .vtc_flow = RTE_BE32(0xff000000), + }, + }, }, [RTE_FLOW_ITEM_TYPE_UDP] = {