From patchwork Tue Feb 10 09:06:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xu, Qian Q" X-Patchwork-Id: 3114 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 4220F2C7A; Tue, 10 Feb 2015 10:10:35 +0100 (CET) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id EB03220F for ; Tue, 10 Feb 2015 10:10:32 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 10 Feb 2015 01:10:30 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,549,1418112000"; d="scan'208";a="683554998" Received: from pgsmsx108.gar.corp.intel.com ([10.221.44.103]) by orsmga002.jf.intel.com with ESMTP; 10 Feb 2015 01:10:30 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by PGSMSX108.gar.corp.intel.com (10.221.44.103) with Microsoft SMTP Server (TLS) id 14.3.195.1; Tue, 10 Feb 2015 17:06:47 +0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.62]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.46]) with mapi id 14.03.0195.001; Tue, 10 Feb 2015 17:06:40 +0800 From: "Xu, Qian Q" To: "Zhang, Helin" , "dev@dpdk.org" Thread-Topic: [PATCH v2] i40e: workaround for XL710 performance Thread-Index: AQHQIwiZGStFYszxhkqfhN7O9kpPopzp1LkQ Date: Tue, 10 Feb 2015 09:06:41 +0000 Message-ID: <82F45D86ADE5454A95A89742C8D1410E01CBD050@shsmsx102.ccr.corp.intel.com> References: <1419405248-14158-1-git-send-email-helin.zhang@intel.com> <1419817288-22957-1-git-send-email-helin.zhang@intel.com> In-Reply-To: <1419817288-22957-1-git-send-email-helin.zhang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] i40e: workaround for XL710 performance X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Tested-by: Qian Xu - Tested Commit: 2250cc5a191906c914221ff4f0da7b5d699b4175 - OS: Fedora20 3.18.0 - GCC: gcc version 4.8.3 20140911 - CPU: Intel(R) Xeon(R) CPU E5-2699 v3 @ 2.30GHz - NIC: Intel Ethernet Controller XL710 for 40GbE QSFP+ [8086:1583] - Default x86_64-native-linuxapp-gcc configuration - Total 1 case, 1 passed, 0 failed - Case: l3fwd_2port_perf Description: Check l3fwd of 2port on different card can achieve hardware limitation rate. Command / instruction: Bind 40G port to igb_uio .//tools/dpdk_nic_bind.py --bind=igb_uio 82:00.1 85:00.1 Run l3fwd ./l3fwd -c 0x3fc0000 -n 4 -w 82:00.1 -w 85:00.1 -- -p 0x3 --config '(0,0,18),(0,1,19),(1,0,20),(1,1,21)' Ixia send packets with IP Expected test result: Ixia can receive the packet with maximum hardware limitation rate. -----Original Message----- From: Zhang, Helin Sent: Monday, December 29, 2014 9:41 AM To: dev@dpdk.org Cc: nhorman@tuxdriver.com; Xu, Qian Q; Cao, Waterman; Lu, Patrick; Liu, Jijiang; Wu, Jingjing; Zhang, Helin Subject: [PATCH v2] i40e: workaround for XL710 performance On XL710, performance number is far from the expectation on recent firmware versions, if promiscuous mode is disabled, or promiscuous mode is enabled and port MAC address is equal to the packet destination MAC address. The fix for this issue may not be integrated in the following firmware version. So the workaround in software driver is needed. For XL710, it needs to modify the initial values of 3 internal only registers, which are the same as X710. Note that the values for X710 and XL710 registers could be different, and the workaround can be removed when it is fixed in firmware in the future. Signed-off-by: Helin Zhang --- lib/librte_pmd_i40e/i40e_ethdev.c | 44 ++++++++++++++++++++++++++------------- 1 file changed, 30 insertions(+), 14 deletions(-) v2 changes: * Supported modifying the address of 0x269FBC of XL710 during initialization, to fix the minor performance gap to expectation. That means XL710 can meet the performance expectation with this workaround. diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c index b47a3d2..8982920 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.c +++ b/lib/librte_pmd_i40e/i40e_ethdev.c @@ -5327,38 +5327,54 @@ i40e_debug_read_register(struct i40e_hw *hw, uint32_t addr, uint64_t *val) /* * On X710, performance number is far from the expectation on recent firmware - * versions. The fix for this issue may not be integrated in the following + * versions; on XL710, performance number is also far from the + expectation on + * recent firmware versions, if promiscuous mode is disabled, or + promiscuous + * mode is enabled and port MAC address is equal to the packet + destination MAC + * address. The fix for this issue may not be integrated in the + following * firmware version. So the workaround in software driver is needed. It needs - * to modify the initial values of 3 internal only registers. Note that the + * to modify the initial values of 3 internal only registers for both + X710 and + * XL710. Note that the values for X710 or XL710 could be different, + and the * workaround can be removed when it is fixed in firmware in the future. */ -static void -i40e_configure_registers(struct i40e_hw *hw) -{ + +/* For both X710 and XL710 */ +#define I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE 0x10000200 #define I40E_GL_SWR_PRI_JOIN_MAP_0 0x26CE00 + +#define I40E_GL_SWR_PRI_JOIN_MAP_2_VALUE 0x011f0200 #define I40E_GL_SWR_PRI_JOIN_MAP_2 0x26CE08 + +/* For X710 */ +#define I40E_GL_SWR_PM_UP_THR_EF_VALUE 0x03030303 +/* For XL710 */ +#define I40E_GL_SWR_PM_UP_THR_SF_VALUE 0x06060606 #define I40E_GL_SWR_PM_UP_THR 0x269FBC -#define I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE 0x10000200 -#define I40E_GL_SWR_PRI_JOIN_MAP_2_VALUE 0x011f0200 -#define I40E_GL_SWR_PM_UP_THR_VALUE 0x03030303 - static const struct { +static void +i40e_configure_registers(struct i40e_hw *hw) { + static struct { uint32_t addr; uint64_t val; } reg_table[] = { {I40E_GL_SWR_PRI_JOIN_MAP_0, I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE}, {I40E_GL_SWR_PRI_JOIN_MAP_2, I40E_GL_SWR_PRI_JOIN_MAP_2_VALUE}, - {I40E_GL_SWR_PM_UP_THR, I40E_GL_SWR_PM_UP_THR_VALUE}, + {I40E_GL_SWR_PM_UP_THR, 0}, /* Compute value dynamically */ }; uint64_t reg; uint32_t i; int ret; - /* Below fix is for X710 only */ - if (i40e_is_40G_device(hw->device_id)) - return; - for (i = 0; i < RTE_DIM(reg_table); i++) { + if (reg_table[i].addr == I40E_GL_SWR_PM_UP_THR) { + if (i40e_is_40G_device(hw->device_id)) /* For XL710 */ + reg_table[i].val = + I40E_GL_SWR_PM_UP_THR_SF_VALUE; + else /* For X710 */ + reg_table[i].val = + I40E_GL_SWR_PM_UP_THR_EF_VALUE; + } + ret = i40e_debug_read_register(hw, reg_table[i].addr, ®); if (ret < 0) { PMD_DRV_LOG(ERR, "Failed to read from 0x%"PRIx32, -- 1.9.3