diff mbox series

net/mlx5: fix match MPLS over GRE with key

Message ID 5cebc85325fbe3d9bcac626dd2838b8052c1c7bf.1625117923.git.jackmin@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers show
Series net/mlx5: fix match MPLS over GRE with key | expand

Checks

Context Check Description
ci/iol-abi-testing success Testing PASS
ci/iol-intel-Performance fail Performance Testing issues
ci/iol-mellanox-Functional fail Functional Testing issues
ci/Intel-compilation success Compilation OK
ci/iol-testing fail Testing issues
ci/iol-intel-Functional success Functional Testing PASS
ci/github-robot success github build: passed
ci/checkpatch success coding style OK

Commit Message

Jack Min July 1, 2021, 5:54 a.m. UTC
Currently PMD needs previous layer information in order to set
corresponding match field for MPLSoGRE or MPLSoUDP.

GRE_KEY item is missing as supported previous layer when translate
item MPLS, which causes flow[1] cannot match MPLS over GRE traffic.

According to RFC4023, MPLS over GRE tunnel with optional key
field needs to be supported too.

By adding missing GRE_KEY as supported previous layer fix problem.

[1]:
flow create 0 ingress pattern eth / ipv6 / gre k_bit is 1 / gre_key /
mpls label is 966138 / end actions queue index 1 / mark id 0xa / end

Fixes: a7a0365565a4 ("net/mlx5: match GRE key and present bits")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Matan Azrad July 1, 2021, 7:46 a.m. UTC | #1
From: Jack Min
> Currently PMD needs previous layer information in order to set
> corresponding match field for MPLSoGRE or MPLSoUDP.
> 
> GRE_KEY item is missing as supported previous layer when translate item
> MPLS, which causes flow[1] cannot match MPLS over GRE traffic.
> 
> According to RFC4023, MPLS over GRE tunnel with optional key field needs to
> be supported too.
> 
> By adding missing GRE_KEY as supported previous layer fix problem.
> 
> [1]:
> flow create 0 ingress pattern eth / ipv6 / gre k_bit is 1 / gre_key / mpls label is
> 966138 / end actions queue index 1 / mark id 0xa / end
> 
> Fixes: a7a0365565a4 ("net/mlx5: match GRE key and present bits")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Raslan Darawsheh July 6, 2021, 11:42 a.m. UTC | #2
Hi,

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Xiaoyu Min
> Sent: Thursday, July 1, 2021 8:55 AM
> To: Matan Azrad <matan@nvidia.com>; Shahaf Shuler
> <shahafs@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>; Jack Min
> <jackmin@nvidia.com>
> Cc: dev@dpdk.org; stable@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/mlx5: fix match MPLS over GRE with key
> 
> Currently PMD needs previous layer information in order to set
> corresponding match field for MPLSoGRE or MPLSoUDP.
> 
> GRE_KEY item is missing as supported previous layer when translate
> item MPLS, which causes flow[1] cannot match MPLS over GRE traffic.
> 
> According to RFC4023, MPLS over GRE tunnel with optional key
> field needs to be supported too.
> 
> By adding missing GRE_KEY as supported previous layer fix problem.
> 
> [1]:
> flow create 0 ingress pattern eth / ipv6 / gre k_bit is 1 / gre_key /
> mpls label is 966138 / end actions queue index 1 / mark id 0xa / end
> 
> Fixes: a7a0365565a4 ("net/mlx5: match GRE key and present bits")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index a04a3c2bb8..feeeaf6a1d 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -9027,6 +9027,8 @@  flow_dv_translate_item_mpls(void *matcher, void *key,
 			 MLX5_UDP_PORT_MPLS);
 		break;
 	case MLX5_FLOW_LAYER_GRE:
+		/* Fall-through. */
+	case MLX5_FLOW_LAYER_GRE_KEY:
 		MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
 		MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
 			 RTE_ETHER_TYPE_MPLS);