From patchwork Wed Mar 11 09:05:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Lakkireddy X-Patchwork-Id: 66535 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A3C89A0567; Wed, 11 Mar 2020 10:17:44 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C82F51C06A; Wed, 11 Mar 2020 10:16:56 +0100 (CET) Received: from stargate.chelsio.com (stargate.chelsio.com [12.32.117.8]) by dpdk.org (Postfix) with ESMTP id 85A6E1C02C for ; Wed, 11 Mar 2020 10:16:55 +0100 (CET) Received: from localhost (scalar.blr.asicdesigners.com [10.193.185.94]) by stargate.chelsio.com (8.13.8/8.13.8) with ESMTP id 02B9Gr2Q014339; Wed, 11 Mar 2020 02:16:54 -0700 From: Rahul Lakkireddy To: dev@dpdk.org Cc: nirranjan@chelsio.com, kaara.satwik@chelsio.com Date: Wed, 11 Mar 2020 14:35:48 +0530 Message-Id: <4c50f2a293a7dbb175584d9f98413aa31ca2f6ec.1583906144.git.kaara.satwik@chelsio.com> X-Mailer: git-send-email 2.5.3 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 6/9] net/cxgbe: add Source MAC Table (SMT) support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Karra Satwik Source MAC Table (SMT) is used for storing Source MAC addresses to be written in packets transmitted on the wire. Hence, the SMT table can be used for overwriting Source MAC addresses in packets, hitting corresponding filter rules inserted by the rte_flow API. Query firmware for SMT start and size information available to the underlying PF. Allocate and maintain the corresponding driver's copy of the hardware SMT table, with appropriate refcount mechanism. If SMT information is not available, then use the entire hardware SMT table. Signed-off-by: Karra Satwik Signed-off-by: Rahul Lakkireddy --- drivers/net/cxgbe/Makefile | 1 + drivers/net/cxgbe/base/adapter.h | 1 + drivers/net/cxgbe/base/t4fw_interface.h | 2 ++ drivers/net/cxgbe/cxgbe_main.c | 41 ++++++++++++++++++++++- drivers/net/cxgbe/meson.build | 1 + drivers/net/cxgbe/smt.c | 43 +++++++++++++++++++++++++ drivers/net/cxgbe/smt.h | 39 ++++++++++++++++++++++ 7 files changed, 127 insertions(+), 1 deletion(-) create mode 100644 drivers/net/cxgbe/smt.c create mode 100644 drivers/net/cxgbe/smt.h diff --git a/drivers/net/cxgbe/Makefile b/drivers/net/cxgbe/Makefile index 79c6e1d1f..53b2bb56d 100644 --- a/drivers/net/cxgbe/Makefile +++ b/drivers/net/cxgbe/Makefile @@ -51,6 +51,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += t4_hw.c SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += clip_tbl.c SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += mps_tcam.c SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += l2t.c +SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += smt.c SRCS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += t4vf_hw.c include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/net/cxgbe/base/adapter.h b/drivers/net/cxgbe/base/adapter.h index c6b8036fd..ae318ccf5 100644 --- a/drivers/net/cxgbe/base/adapter.h +++ b/drivers/net/cxgbe/base/adapter.h @@ -342,6 +342,7 @@ struct adapter { unsigned int l2t_end; /* Layer 2 table end */ struct clip_tbl *clipt; /* CLIP table */ struct l2t_data *l2t; /* Layer 2 table */ + struct smt_data *smt; /* Source mac table */ struct mpstcam_table *mpstcam; struct tid_info tids; /* Info used to access TID related tables */ diff --git a/drivers/net/cxgbe/base/t4fw_interface.h b/drivers/net/cxgbe/base/t4fw_interface.h index 39e02077f..3684c8006 100644 --- a/drivers/net/cxgbe/base/t4fw_interface.h +++ b/drivers/net/cxgbe/base/t4fw_interface.h @@ -695,6 +695,8 @@ enum fw_params_param_pfvf { FW_PARAMS_PARAM_PFVF_CPLFW4MSG_ENCAP = 0x31, FW_PARAMS_PARAM_PFVF_PORT_CAPS32 = 0x3A, FW_PARAMS_PARAM_PFVF_MAX_PKTS_PER_ETH_TX_PKTS_WR = 0x3D, + FW_PARAMS_PARAM_PFVF_GET_SMT_START = 0x3E, + FW_PARAMS_PARAM_PFVF_GET_SMT_SIZE = 0x3F, }; /* diff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c index a286d8557..1ab6f8fba 100644 --- a/drivers/net/cxgbe/cxgbe_main.c +++ b/drivers/net/cxgbe/cxgbe_main.c @@ -40,6 +40,7 @@ #include "cxgbe_pfvf.h" #include "clip_tbl.h" #include "l2t.h" +#include "smt.h" #include "mps_tcam.h" /** @@ -1735,6 +1736,7 @@ void cxgbe_close(struct adapter *adapter) t4_cleanup_mpstcam(adapter); t4_cleanup_clip_tbl(adapter); t4_cleanup_l2t(adapter); + t4_cleanup_smt(adapter); if (is_pf4(adapter)) t4_intr_disable(adapter); t4_sge_tx_monitor_stop(adapter); @@ -1753,13 +1755,45 @@ void cxgbe_close(struct adapter *adapter) t4_fw_bye(adapter, adapter->mbox); } +static void adap_smt_index(struct adapter *adapter, u32 *smt_start_idx, + u32 *smt_size) +{ + u32 params[2], smt_val[2]; + int ret; + + params[0] = CXGBE_FW_PARAM_PFVF(GET_SMT_START); + params[1] = CXGBE_FW_PARAM_PFVF(GET_SMT_SIZE); + + ret = t4_query_params(adapter, adapter->mbox, adapter->pf, 0, + 2, params, smt_val); + + /* if FW doesn't recognize this command then set it to default setting + * which is start index as 0 and size as 256. + */ + if (ret < 0) { + *smt_start_idx = 0; + *smt_size = SMT_SIZE; + } else { + *smt_start_idx = smt_val[0]; + /* smt size can be zero, if nsmt is not yet configured in + * the config file or set as zero, then configure all the + * remaining entries to this PF itself. + */ + if (!smt_val[1]) + *smt_size = SMT_SIZE - *smt_start_idx; + else + *smt_size = smt_val[1]; + } +} + int cxgbe_probe(struct adapter *adapter) { + u32 smt_start_idx, smt_size; struct port_info *pi; - int chip; int func, i; int err = 0; u32 whoami; + int chip; whoami = t4_read_reg(adapter, A_PL_WHOAMI); chip = t4_get_chip_type(adapter, @@ -1904,6 +1938,11 @@ int cxgbe_probe(struct adapter *adapter) dev_warn(adapter, "could not allocate CLIP. Continuing\n"); } + adap_smt_index(adapter, &smt_start_idx, &smt_size); + adapter->smt = t4_init_smt(smt_start_idx, smt_size); + if (!adapter->smt) + dev_warn(adapter, "could not allocate SMT, continuing\n"); + adapter->l2t = t4_init_l2t(adapter->l2t_start, adapter->l2t_end); if (!adapter->l2t) { /* We tolerate a lack of L2T, giving up some functionality */ diff --git a/drivers/net/cxgbe/meson.build b/drivers/net/cxgbe/meson.build index c51af26e9..3992aba44 100644 --- a/drivers/net/cxgbe/meson.build +++ b/drivers/net/cxgbe/meson.build @@ -11,6 +11,7 @@ sources = files('cxgbe_ethdev.c', 'clip_tbl.c', 'mps_tcam.c', 'l2t.c', + 'smt.c', 'base/t4_hw.c', 'base/t4vf_hw.c') includes += include_directories('base') diff --git a/drivers/net/cxgbe/smt.c b/drivers/net/cxgbe/smt.c new file mode 100644 index 000000000..cf40c8a8a --- /dev/null +++ b/drivers/net/cxgbe/smt.c @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2020 Chelsio Communications. + * All rights reserved. + */ + +#include "base/common.h" +#include "smt.h" + +/** + * Initialize Source MAC Table + */ +struct smt_data *t4_init_smt(u32 smt_start_idx, u32 smt_size) +{ + struct smt_data *s; + u32 i; + + s = t4_alloc_mem(sizeof(*s) + smt_size * sizeof(struct smt_entry)); + if (!s) + return NULL; + + s->smt_start = smt_start_idx; + s->smt_size = smt_size; + t4_os_rwlock_init(&s->lock); + + for (i = 0; i < s->smt_size; ++i) { + s->smtab[i].idx = i; + s->smtab[i].hw_idx = smt_start_idx + i; + s->smtab[i].state = SMT_STATE_UNUSED; + memset(&s->smtab[i].src_mac, 0, RTE_ETHER_ADDR_LEN); + t4_os_lock_init(&s->smtab[i].lock); + rte_atomic32_set(&s->smtab[i].refcnt, 0); + } + return s; +} + +/** + * Cleanup Source MAC Table + */ +void t4_cleanup_smt(struct adapter *adap) +{ + if (adap->smt) + t4_os_free(adap->smt); +} diff --git a/drivers/net/cxgbe/smt.h b/drivers/net/cxgbe/smt.h new file mode 100644 index 000000000..aa4afcce2 --- /dev/null +++ b/drivers/net/cxgbe/smt.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2020 Chelsio Communications. + * All rights reserved. + */ +#ifndef __CXGBE_SMT_H_ +#define __CXGBE_SMT_H_ + +enum { + SMT_STATE_SWITCHING, + SMT_STATE_UNUSED, + SMT_STATE_ERROR +}; + +enum { + SMT_SIZE = 256 +}; + +struct smt_entry { + u16 state; + u16 idx; + u16 pfvf; + u16 hw_idx; + u8 src_mac[RTE_ETHER_ADDR_LEN]; + rte_atomic32_t refcnt; + rte_spinlock_t lock; +}; + +struct smt_data { + unsigned int smt_size; + unsigned int smt_start; + rte_rwlock_t lock; + struct smt_entry smtab[0]; +}; + +struct smt_data *t4_init_smt(u32 smt_start_idx, u32 smt_size); +void t4_cleanup_smt(struct adapter *adap); + +#endif /* __CXGBE_SMT_H_ */ +