From patchwork Tue Sep 20 08:53:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?N=C3=A9lio_Laranjeiro?= X-Patchwork-Id: 15943 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 1850858D4; Tue, 20 Sep 2016 10:54:26 +0200 (CEST) Received: from mail-wm0-f42.google.com (mail-wm0-f42.google.com [74.125.82.42]) by dpdk.org (Postfix) with ESMTP id 7348758CB for ; Tue, 20 Sep 2016 10:54:14 +0200 (CEST) Received: by mail-wm0-f42.google.com with SMTP id w84so120633610wmg.1 for ; Tue, 20 Sep 2016 01:54:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1DO7GKozu824lcZ8rVoIZvRm7lTON0SOjGz+8/Z5B4k=; b=S4Y3UgzgOaYzzp6igrA+4kohqY5odCBuG2tLZuDNb+sw0hNyM82JIHZdb6Szqz4mpP 1CTQTU5kycCn87f2u4UuNLBJy7EwNeJf7WZcUTxic455Cf+ory74Cso4cp+UpqOvQ1Gm L3pobVJQl2yuZe52LG5ZK6fhS5ebB1LyopEnHws9wCPJAbQmb8xu+Kikx39V8jKQfQbV T17FV8iioNAl74ZLdDhJffnP3Z18n+SVFOQ62nkTmtMI+oG7tqiKcWTWapQg0mjR9SBT n1Yut6auXhTvb2iuAvA1bR7RBUD6KHQhsA2v1/VRToclO595VirM1SMAsb+jwjh+saD6 mnEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1DO7GKozu824lcZ8rVoIZvRm7lTON0SOjGz+8/Z5B4k=; b=mWcjYX8mpyg7R8YXQ78uy+h5eWSOrlGlVWWSS5LbaK2NbH0la3aUqMAPv5zwvlQKic GlCwiutn/leNiMLMR4AWPOB+GF7QRqbWC1syIg3fySzmkWC9BXdgi8zLyuka3S8PesW+ UmAu/jtxtMJ1Q59PKPUYE963ETb/3ofTpkJEodDP55K0Ntlj6jT/65PBpUwwUuPJzjGt dir5gCFbILAKWrEt+866FfrjmUtgpy0kewQaGMxQb5BxUYGEq3FPyKDbHaIi3rU1w3po 54uW0Yx1SwbT1HMpHme0X7EHiFxH8wSEoaoFSgkbps35waVd1jrT+o2h0ry/AX3l/wgR XcpQ== X-Gm-Message-State: AE9vXwOMRIq0IBvh8Bykrzu+25gR7upa2OvCwvYqBjO/csi0J7h5AtYSpAOqmOUUY0VjsB6C X-Received: by 10.194.5.230 with SMTP id v6mr31433494wjv.92.1474361654029; Tue, 20 Sep 2016 01:54:14 -0700 (PDT) Received: from ping.vm.6wind.com (guy78-3-82-239-227-177.fbx.proxad.net. [82.239.227.177]) by smtp.gmail.com with ESMTPSA id p13sm26252793wmd.1.2016.09.20.01.54.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Sep 2016 01:54:13 -0700 (PDT) From: Nelio Laranjeiro To: dev@dpdk.org Cc: Adrien Mazarguil , Bruce Richardson Date: Tue, 20 Sep 2016 10:53:49 +0200 Message-Id: <354d1f511b371427efe433a4fe8edd22f89a9eba.1474360134.git.nelio.laranjeiro@6wind.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: Subject: [dpdk-dev] [PATCH v3 4/6] net/mlx5: reduce memory overhead for BF handling X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Blue Flame (aka BF) is a buffer allocated with a power of two value, its size is returned by Verbs in log2. Signed-off-by: Nelio Laranjeiro --- drivers/net/mlx5/mlx5_rxtx.c | 2 +- drivers/net/mlx5/mlx5_rxtx.h | 2 +- drivers/net/mlx5/mlx5_txq.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index 4f28aa9..214922b 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -413,7 +413,7 @@ mlx5_tx_dbrec(struct txq *txq) /* Ensure ordering between DB record and BF copy. */ rte_wmb(); rte_mov16(dst, (uint8_t *)data); - txq->bf_offset ^= txq->bf_buf_size; + txq->bf_offset ^= (1 << txq->bf_buf_size); } /** diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index 224614e..3dca8ca 100644 --- a/drivers/net/mlx5/mlx5_rxtx.h +++ b/drivers/net/mlx5/mlx5_rxtx.h @@ -249,8 +249,8 @@ struct txq { uint16_t wqe_n; /* Number of WQ elements. */ uint16_t elts_n:4; /* (*elts)[] length (in log2). */ uint16_t cqe_n:4; /* Number of CQ elements (in log2). */ + uint16_t bf_buf_size:4; /* Log2 Blueflame size. */ uint16_t bf_offset; /* Blueflame offset. */ - uint16_t bf_buf_size; /* Blueflame size. */ uint16_t max_inline; /* Multiple of RTE_CACHE_LINE_SIZE to inline. */ uint32_t qp_num_8s; /* QP number shifted by 8. */ volatile struct mlx5_cqe (*cqes)[]; /* Completion queue. */ diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index 6145b69..9919e37 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -221,7 +221,7 @@ txq_setup(struct txq_ctrl *tmpl, struct txq_ctrl *txq_ctrl) tmpl->txq.qp_db = &qp->gen_data.db[MLX5_SND_DBR]; tmpl->txq.bf_reg = qp->gen_data.bf->reg; tmpl->txq.bf_offset = qp->gen_data.bf->offset; - tmpl->txq.bf_buf_size = qp->gen_data.bf->buf_size; + tmpl->txq.bf_buf_size = log2above(qp->gen_data.bf->buf_size); tmpl->txq.cq_db = cq->dbrec; tmpl->txq.cqes = (volatile struct mlx5_cqe (*)[])