@@ -37,7 +37,7 @@ evt_options_default(struct evt_options *opt)
opt->expiry_nsec = 1E4; /* 10000ns ~10us */
opt->prod_type = EVT_PROD_TYPE_SYNT;
opt->eth_queues = 1;
- opt->vector_size = 64;
+ opt->vector_size = RTE_OPTIMAL_BURST_SIZE;
opt->vector_tmo_nsec = 100E3;
opt->crypto_op_type = RTE_CRYPTO_OP_TYPE_SYMMETRIC;
opt->crypto_cipher_alg = RTE_CRYPTO_CIPHER_NULL;
@@ -100,7 +100,7 @@ static uint8_t max_priority;
static uint32_t rand_seed;
static uint64_t meter_profile_values[3]; /* CIR CBS EBS values. */
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define LCORE_MODE_PKT 1
#define LCORE_MODE_STATS 2
#define MAX_STREAMS 64
@@ -78,7 +78,7 @@ struct cmdline_file_info {
#define TX_DESC_MAX 2048
#define MAX_PKT_BURST 512
-#define DEF_PKT_BURST 32
+#define DEF_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define DEF_MBUF_CACHE 250
@@ -52,7 +52,7 @@
#define RX_DESC_MAX (2048)
#define TX_DESC_MAX (2048)
#define MAX_PKT_BURST (512)
-#define DEF_PKT_BURST (16)
+#define DEF_PKT_BURST (RTE_OPTIMAL_BURST_SIZE)
#define BONDING_DEV_NAME ("net_bonding_ut")
@@ -41,8 +41,8 @@
#define TEST_RX_DESC_MAX (2048)
#define TEST_TX_DESC_MAX (2048)
-#define MAX_PKT_BURST (32)
-#define DEF_PKT_BURST (16)
+#define MAX_PKT_BURST (RTE_OPTIMAL_BURST_SIZE)
+#define DEF_PKT_BURST (RTE_OPTIMAL_BURST_SIZE)
#define BONDING_DEV_NAME ("net_bonding_m4_bond_dev")
@@ -17,7 +17,7 @@
#define NB_ETHPORTS_USED (1)
#define NB_SOCKETS (2)
#define MEMPOOL_CACHE_SIZE 250
-#define MAX_PKT_BURST (32)
+#define MAX_PKT_BURST (RTE_OPTIMAL_BURST_SIZE)
#define RX_DESC_DEFAULT (1024)
#define TX_DESC_DEFAULT (1024)
#define RTE_PORT_ALL (~(uint16_t)0x0)
@@ -44,7 +44,7 @@ test_inline_ipsec_sg(void)
#define NB_ETHPORTS_USED 1
#define MEMPOOL_CACHE_SIZE 32
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define RX_DESC_DEFAULT 1024
#define TX_DESC_DEFAULT 1024
#define RTE_PORT_ALL (~(uint16_t)0x0)
@@ -39,7 +39,7 @@
#define LLR_1_BIT 0x81
#define LLR_0_BIT 0x7F
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define NB_MBUF 8191
#define MEMPOOL_CACHE_SIZE 256
@@ -52,7 +52,7 @@
#define NB_MBUF (1024*8)
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
#define BURST_RX_INTERVAL_NS (10) /* RX poll interval ~100ns */
@@ -23,10 +23,10 @@
#define TX_RING_SIZE 1024
#define NUM_MBUFS ((64*1024)-1)
#define MBUF_CACHE_SIZE 128
-#define BURST_SIZE 64
+#define BURST_SIZE RTE_OPTIMAL_BURST_SIZE
#define SCHED_RX_RING_SZ 8192
#define SCHED_TX_RING_SZ 65536
-#define BURST_SIZE_TX 32
+#define BURST_SIZE_TX RTE_OPTIMAL_BURST_SIZE
#define RTE_LOGTYPE_DISTRAPP RTE_LOGTYPE_USER1
@@ -15,7 +15,7 @@
/* size of ring used for software copying between rx and tx. */
#define RTE_LOGTYPE_DMA RTE_LOGTYPE_USER1
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define MEMPOOL_CACHE_SIZE 512
#define MIN_POOL_SIZE 65536U
#define CMD_LINE_OPT_PORTMASK_INDEX 1
@@ -19,7 +19,7 @@
#include "ethapp.h"
#define MAX_PORTS RTE_MAX_ETHPORTS
-#define MAX_BURST_LENGTH 32
+#define MAX_BURST_LENGTH RTE_OPTIMAL_BURST_SIZE
#define PORT_RX_QUEUE_SIZE 1024
#define PORT_TX_QUEUE_SIZE 1024
#define PKTPOOL_EXTRA_SIZE 512
@@ -75,7 +75,7 @@
#define NB_MBUF 8192
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
/* Configure how many packets ahead to prefetch, when reading packets */
@@ -44,8 +44,7 @@
#include <rte_ip_frag.h>
-#define MAX_PKT_BURST 32
-
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define RTE_LOGTYPE_IP_RSMBL RTE_LOGTYPE_USER1
@@ -11,8 +11,8 @@
#define NB_SOCKETS 4
-#define MAX_PKT_BURST 32
-#define MAX_PKT_BURST_VEC 256
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
+#define MAX_PKT_BURST_VEC RTE_OPTIMAL_BURST_SIZE
#define MAX_PKTS \
((MAX_PKT_BURST_VEC > MAX_PKT_BURST ? \
@@ -54,7 +54,7 @@
/* allow max jumbo frame 9.5 KB */
#define JUMBO_FRAME_MAX_SIZE 0x2600
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
/* Configure how many packets ahead to prefetch, when reading packets */
@@ -17,7 +17,7 @@
#define NUM_MBUFS 8191
#define MBUF_CACHE_SIZE 250
-#define BURST_SIZE 32
+#define BURST_SIZE RTE_OPTIMAL_BURST_SIZE
/* l2fwd-cat.c: CAT enabled, basic DPDK skeleton forwarding example. */
@@ -61,7 +61,7 @@ enum cdev_type {
#define MAX_KEY_SIZE 128
#define MAX_IV_SIZE 16
#define MAX_AAD_SIZE 65535
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
#define SESSION_POOL_CACHE_SIZE 0
@@ -42,7 +42,7 @@
#include <rte_mbuf.h>
#include <rte_spinlock.h>
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define MAX_RX_QUEUE_PER_LCORE 16
#define MAX_TX_QUEUE_PER_PORT 16
@@ -39,7 +39,7 @@
#define NB_MBUF 8192
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
/*
@@ -43,7 +43,7 @@
#define NB_MBUF_PER_PORT 3000
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
/*
@@ -49,7 +49,7 @@ static int promiscuous_on = 1;
#define RTE_LOGTYPE_L2FWD RTE_LOGTYPE_USER1
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
#define MEMPOOL_CACHE_SIZE 256
#define SESSION_POOL_CACHE_SIZE 0
@@ -48,7 +48,7 @@ static int promiscuous_on;
#define RTE_LOGTYPE_L2FWD RTE_LOGTYPE_USER1
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
#define MEMPOOL_CACHE_SIZE 256
@@ -55,7 +55,7 @@
RTE_LOG_REGISTER(l3fwd_power_logtype, l3fwd.power, INFO);
#define RTE_LOGTYPE_L3FWD_POWER l3fwd_power_logtype
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define MIN_ZERO_POLL_COUNT 10
@@ -23,14 +23,14 @@
#define RX_DESC_DEFAULT 1024
#define TX_DESC_DEFAULT 1024
-#define DEFAULT_PKT_BURST 32
+#define DEFAULT_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define MAX_PKT_BURST 512
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
#define MEMPOOL_CACHE_SIZE RTE_MEMPOOL_CACHE_MAX_SIZE
#define MAX_RX_QUEUE_PER_LCORE 16
-#define VECTOR_SIZE_DEFAULT MAX_PKT_BURST
+#define VECTOR_SIZE_DEFAULT RTE_OPTIMAL_BURST_SIZE
#define VECTOR_TMO_NS_DEFAULT 1E6 /* 1ms */
#define NB_SOCKETS 8
@@ -1074,17 +1074,26 @@ parse_args(int argc, char **argv)
return -1;
}
- if (evt_rsrc->vector_enabled && !evt_rsrc->vector_size) {
- evt_rsrc->vector_size = VECTOR_SIZE_DEFAULT;
- fprintf(stderr, "vector size set to default (%" PRIu16 ")\n",
- evt_rsrc->vector_size);
+ if (evt_rsrc->vector_enabled) {
+ if (!evt_rsrc->vector_size) {
+ evt_rsrc->vector_size = VECTOR_SIZE_DEFAULT;
+ fprintf(stderr, "vector size set to default (%" PRIu16 ")\n",
+ evt_rsrc->vector_size);
+ } else {
+ fprintf(stderr, "vector size set to (%" PRIu16 ")\n",
+ evt_rsrc->vector_size);
+ }
}
- if (evt_rsrc->vector_enabled && !evt_rsrc->vector_tmo_ns) {
- evt_rsrc->vector_tmo_ns = VECTOR_TMO_NS_DEFAULT;
- fprintf(stderr,
- "vector timeout set to default (%" PRIu64 " ns)\n",
- evt_rsrc->vector_tmo_ns);
+ if (evt_rsrc->vector_enabled) {
+ if (!evt_rsrc->vector_tmo_ns) {
+ evt_rsrc->vector_tmo_ns = VECTOR_TMO_NS_DEFAULT;
+ fprintf(stderr, "vector timeout set to default (%" PRIu64 " ns)\n",
+ evt_rsrc->vector_tmo_ns);
+ } else {
+ fprintf(stderr, "vector timeout set to (%" PRIu64 " ns)\n",
+ evt_rsrc->vector_tmo_ns);
+ }
}
#endif
@@ -1687,7 +1696,9 @@ main(int argc, char **argv)
if (ret < 0)
rte_exit(EXIT_FAILURE, "Invalid L3FWD parameters\n");
+#ifndef RTE_LIB_EVENTDEV
RTE_LOG(INFO, L3FWD, "Using Rx burst %u Tx burst %u\n", rx_burst_size, tx_burst_size);
+#endif
/* Setup function pointers for lookup method. */
setup_l3fwd_lookup_tables();
@@ -39,7 +39,7 @@
#define NB_MBUF 8192
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
/*
@@ -61,7 +61,7 @@ static unsigned int lsi_rx_queue_per_lcore = 1;
/* destination port for L2 forwarding */
static unsigned lsi_dst_ports[RTE_MAX_ETHPORTS] = {0};
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define MAX_RX_QUEUE_PER_LCORE 16
#define MAX_TX_QUEUE_PER_PORT 16
@@ -46,7 +46,7 @@
#define NB_MBUFS 64*1024 /* use 64k mbufs */
#define MBUF_CACHE_SIZE 256
-#define PKT_BURST 32
+#define PKT_BURST RTE_OPTIMAL_BURST_SIZE
#define RX_RING_SIZE 1024
#define TX_RING_SIZE 1024
@@ -83,8 +83,8 @@ static uint16_t nb_desc = NTB_DEFAULT_NUM_DESCS;
static uint16_t tx_free_thresh;
-#define NTB_MAX_PKT_BURST 32
-#define NTB_DFLT_PKT_BURST 32
+#define NTB_MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
+#define NTB_DFLT_PKT_BURST RTE_OPTIMAL_BURST_SIZE
static uint16_t pkt_burst = NTB_DFLT_PKT_BURST;
#define BURST_TX_RETRIES 64
@@ -21,7 +21,7 @@
#define RX_DESC_PER_QUEUE 1024
#define TX_DESC_PER_QUEUE 1024
-#define MAX_PKTS_BURST 32
+#define MAX_PKTS_BURST RTE_OPTIMAL_BURST_SIZE
#define REORDER_BUFFER_SIZE 8192
#define MBUF_PER_POOL 65535
#define MBUF_POOL_CACHE_SIZE 250
@@ -76,8 +76,8 @@ static struct rte_eth_conf port_conf = {
* Packet RX/TX
*
***/
-#define RTE_MBUF_F_RX_BURST_MAX 32
-#define RTE_MBUF_F_TX_BURST_MAX 32
+#define RTE_MBUF_F_RX_BURST_MAX RTE_OPTIMAL_BURST_SIZE
+#define RTE_MBUF_F_TX_BURST_MAX RTE_OPTIMAL_BURST_SIZE
#define TIME_TX_DRAIN 200000ULL
static uint16_t port_rx;
@@ -24,10 +24,10 @@ extern "C" {
#define APP_RING_SIZE (8*1024)
#define NB_MBUF (2*1024*1024)
-#define MAX_PKT_RX_BURST 64
+#define MAX_PKT_RX_BURST RTE_OPTIMAL_BURST_SIZE
#define PKT_ENQUEUE 64
#define PKT_DEQUEUE 63
-#define MAX_PKT_TX_BURST 64
+#define MAX_PKT_TX_BURST RTE_OPTIMAL_BURST_SIZE
#define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */
#define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */
@@ -19,7 +19,7 @@
#define NUM_MBUFS 8191
#define MBUF_CACHE_SIZE 250
-#define BURST_SIZE 32
+#define BURST_SIZE RTE_OPTIMAL_BURST_SIZE
static int hwts_dynfield_offset = -1;
@@ -16,7 +16,7 @@
#define NUM_MBUFS 8191
#define MBUF_CACHE_SIZE 250
-#define BURST_SIZE 32
+#define BURST_SIZE RTE_OPTIMAL_BURST_SIZE
/* basicfwd.c: Basic DPDK skeleton forwarding example. */
@@ -17,7 +17,7 @@
enum {VIRTIO_RXQ, VIRTIO_TXQ, VIRTIO_QNUM};
-#define MAX_PKT_BURST 32 /* Max burst size for RX/TX */
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE /* Max burst size for RX/TX */
struct device_statistics {
uint64_t tx;
@@ -23,7 +23,7 @@
#include <cmdline.h>
#define NB_VIRTIO_QUEUES (1)
-#define MAX_PKT_BURST (64)
+#define MAX_PKT_BURST (RTE_OPTIMAL_BURST_SIZE)
#define MAX_IV_LEN (32)
#define NB_MEMPOOL_OBJS (8192)
#define NB_CRYPTO_DESCRIPTORS (4096)
@@ -45,7 +45,7 @@
#define NUM_MBUFS 8191
#define MBUF_CACHE_SIZE 250
-#define BURST_SIZE 32
+#define BURST_SIZE RTE_OPTIMAL_BURST_SIZE
static uint32_t enabled_port_mask;
static volatile bool force_quit;
@@ -42,7 +42,7 @@
TX_DESC_DEFAULT))
#define MBUF_CACHE_SIZE 64
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
/*
* Configurable number of RX/TX ring descriptors
@@ -43,7 +43,7 @@
TX_DESC_DEFAULT))
#define MBUF_CACHE_SIZE 64
-#define MAX_PKT_BURST 32
+#define MAX_PKT_BURST RTE_OPTIMAL_BURST_SIZE
/*
* Configurable number of RX/TX ring descriptors