[2/2] net/mlx5: support PF representor suppresion in multi-port E-Switch
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Commit Message
In multi-port E-Switch setup, the MLX5 PMD always added
PF representor port.
For example, `representor=pf1vf[0,1]` implicitly added PF1 representor
port:
```
Port Name
0 p0
1 p1
2 representor_c0pf1vf0
3 representor_c0pf1vf1
```
The patch adds support for the new representor format that suppresses
PF representor attachment:
Example: `representor=(pf1)vf[0,1]`
```
Port Name
0 p0
1 representor_c0pf1vf0
2 representor_c0pf1vf1
```
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
---
drivers/net/mlx5/linux/mlx5_os.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
@@ -2284,6 +2284,12 @@ mlx5_device_mpesw_pci_match(struct ibv_device *ibv,
return -1;
}
+static inline bool
+mlx5_ingnore_pf_representor(const struct rte_eth_devargs *eth_da)
+{
+ return (eth_da->port_flags & RTE_ETH_DEVARG_IGNORE_PF_REPRESENTOR) != 0;
+}
+
/**
* Register a PCI device within bonding.
*
@@ -2593,8 +2599,12 @@ mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
list[ns].info.master = 1;
list[ns].info.representor = 0;
} else {
- list[ns].info.master = 0;
- list[ns].info.representor = 1;
+ if (mlx5_ingnore_pf_representor(req_eth_da)) {
+ continue;
+ } else {
+ list[ns].info.master = 0;
+ list[ns].info.representor = 1;
+ }
}
/*
* Ports of this type have uplink port index