diff mbox series

crypto/mlx5: log when num of segs exceed max segs

Message ID 20250209120851.254695-1-getelson@nvidia.com (mailing list archive)
State Rejected
Delegated to: Raslan Darawsheh
Headers
Series crypto/mlx5: log when num of segs exceed max segs |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Performance fail Performance Testing issues
ci/iol-unit-amd64-testing pending Testing pending
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ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-marvell-Functional success Functional Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS

Commit Message

Etelson, Gregory Feb. 9, 2025, 12:08 p.m. UTC 
From: Shani Peretz <shperetz@nvidia.com>

This patch logs and aborts when mbuf segment count exceeding max_segs_num.
The log message suggests the user to either increase the segment size
or set a higher value for the max_segs_num devarg.

Fixes: b01095830734 ("crypto/mlx5: add GCM enqueue/dequeue operations")

Signed-off-by: Shani Peretz <shperetz@nvidia.com>
---
 drivers/crypto/mlx5/mlx5_crypto_gcm.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

Comments

Stephen Hemminger Feb. 10, 2025, 5:04 p.m. UTC | #1 
On Sun, 9 Feb 2025 14:08:51 +0200
Gregory Etelson <getelson@nvidia.com> wrote:

> -	MLX5_ASSERT(nb_segs <= qp->priv->max_segs_num);
> +	if (nb_segs > qp->priv->max_segs_num) {
> +		DRV_LOG(WARNING, "Segment count exceeds limit. "
> +				"Current segments: %d, Maximum allowed: %d. "
> +				"To resolve, either increase the segment size "
> +				"or set a higher value for the devargs max_segs_num parameter.",
> +			nb_segs, qp->priv->max_segs_num);
> +		RTE_VERIFY(nb_segs <= qp->priv->max_segs_num);
> +		return 0;
> +	}

Way to verbose.
RTE_VERIFY never returns since it calls rte_panic().

Would it be better to just use RTE_VERIFY()?
Maybe MLX5 should have MLX5_ASSERT() and MLX5_VERIFY() macro.

Je n’ai fait celle-ci plus longue que parce que je n’ai pas eu le loisir de la faire plus courte.
I have made this longer than usual because I have not had time to make it shorter.
diff mbox series

Patch

diff --git a/drivers/crypto/mlx5/mlx5_crypto_gcm.c b/drivers/crypto/mlx5/mlx5_crypto_gcm.c
index 89f32c7722..d7156a6abc 100644
--- a/drivers/crypto/mlx5/mlx5_crypto_gcm.c
+++ b/drivers/crypto/mlx5/mlx5_crypto_gcm.c
@@ -554,7 +554,15 @@  mlx5_crypto_gcm_build_mbuf_chain_klms(struct mlx5_crypto_qp *qp,
 	uint32_t klm_n = 0;
 
 	/* mbuf seg num should be less than max_segs_num. */
-	MLX5_ASSERT(nb_segs <= qp->priv->max_segs_num);
+	if (nb_segs > qp->priv->max_segs_num) {
+		DRV_LOG(WARNING, "Segment count exceeds limit. "
+				"Current segments: %d, Maximum allowed: %d. "
+				"To resolve, either increase the segment size "
+				"or set a higher value for the devargs max_segs_num parameter.",
+			nb_segs, qp->priv->max_segs_num);
+		RTE_VERIFY(nb_segs <= qp->priv->max_segs_num);
+		return 0;
+	}
 	/* First mbuf needs to take the data offset. */
 	if (unlikely(_mlx5_crypto_gcm_umr_build_mbuf_klm(qp, mbuf, klm,
 		     op->sym->aead.data.offset, &remain_len) == UINT32_MAX)) {