diff mbox series

[v5,63/80] net/ntnic: add scrub registers

Message ID 20241030213940.3470062-64-sil-plv@napatech.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series Provide flow filter and statistics support |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Serhii Iliushyk Oct. 30, 2024, 9:39 p.m. UTC 
From: Danylo Vodopianov <dvo-plv@napatech.com>

Scrub fields were added to the fpga map file
Remove duplicated macro

Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
---
 .../supported/nthw_fpga_9563_055_049_0000.c     | 17 ++++++++++++++++-
 drivers/net/ntnic/ntnic_ethdev.c                |  3 ---
 2 files changed, 16 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c
index 620968ceb6..f1033ca949 100644
--- a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c
@@ -728,7 +728,7 @@  static nthw_fpga_field_init_s flm_lrn_data_fields[] = {
 	{ FLM_LRN_DATA_PRIO, 2, 691, 0x0000 }, { FLM_LRN_DATA_PROT, 8, 320, 0x0000 },
 	{ FLM_LRN_DATA_QFI, 6, 704, 0x0000 }, { FLM_LRN_DATA_QW0, 128, 192, 0x0000 },
 	{ FLM_LRN_DATA_QW4, 128, 64, 0x0000 }, { FLM_LRN_DATA_RATE, 16, 416, 0x0000 },
-	{ FLM_LRN_DATA_RQI, 1, 710, 0x0000 },
+	{ FLM_LRN_DATA_RQI, 1, 710, 0x0000 }, { FLM_LRN_DATA_SCRUB_PROF, 4, 712, 0x0000 },
 	{ FLM_LRN_DATA_SIZE, 16, 432, 0x0000 }, { FLM_LRN_DATA_STAT_PROF, 4, 687, 0x0000 },
 	{ FLM_LRN_DATA_SW8, 32, 32, 0x0000 }, { FLM_LRN_DATA_SW9, 32, 0, 0x0000 },
 	{ FLM_LRN_DATA_TEID, 32, 368, 0x0000 }, { FLM_LRN_DATA_VOL_IDX, 3, 684, 0x0000 },
@@ -782,6 +782,18 @@  static nthw_fpga_field_init_s flm_scan_fields[] = {
 	{ FLM_SCAN_I, 16, 0, 0 },
 };
 
+static nthw_fpga_field_init_s flm_scrub_ctrl_fields[] = {
+	{ FLM_SCRUB_CTRL_ADR, 4, 0, 0x0000 },
+	{ FLM_SCRUB_CTRL_CNT, 16, 16, 0x0000 },
+};
+
+static nthw_fpga_field_init_s flm_scrub_data_fields[] = {
+	{ FLM_SCRUB_DATA_DEL, 1, 12, 0 },
+	{ FLM_SCRUB_DATA_INF, 1, 13, 0 },
+	{ FLM_SCRUB_DATA_R, 4, 8, 0 },
+	{ FLM_SCRUB_DATA_T, 8, 0, 0 },
+};
+
 static nthw_fpga_field_init_s flm_status_fields[] = {
 	{ FLM_STATUS_CACHE_BUFFER_CRITICAL, 1, 12, 0x0000 },
 	{ FLM_STATUS_CALIB_FAIL, 3, 3, 0 },
@@ -921,6 +933,8 @@  static nthw_fpga_register_init_s flm_registers[] = {
 	{ FLM_RCP_CTRL, 8, 32, NTHW_FPGA_REG_TYPE_WO, 0, 2, flm_rcp_ctrl_fields },
 	{ FLM_RCP_DATA, 9, 403, NTHW_FPGA_REG_TYPE_WO, 0, 19, flm_rcp_data_fields },
 	{ FLM_SCAN, 2, 16, NTHW_FPGA_REG_TYPE_WO, 0, 1, flm_scan_fields },
+	{ FLM_SCRUB_CTRL, 10, 32, NTHW_FPGA_REG_TYPE_WO, 0, 2, flm_scrub_ctrl_fields },
+	{ FLM_SCRUB_DATA, 11, 14, NTHW_FPGA_REG_TYPE_WO, 0, 4, flm_scrub_data_fields },
 	{ FLM_STATUS, 1, 17, NTHW_FPGA_REG_TYPE_MIXED, 0, 9, flm_status_fields },
 	{ FLM_STAT_AUL_DONE, 41, 32, NTHW_FPGA_REG_TYPE_RO, 0, 1, flm_stat_aul_done_fields },
 	{ FLM_STAT_AUL_FAIL, 43, 32, NTHW_FPGA_REG_TYPE_RO, 0, 1, flm_stat_aul_fail_fields },
@@ -3058,6 +3072,7 @@  static nthw_fpga_prod_param_s product_parameters[] = {
 	{ NT_FLM_PRESENT, 1 },
 	{ NT_FLM_PRIOS, 4 },
 	{ NT_FLM_PST_PROFILES, 16 },
+	{ NT_FLM_SCRUB_PROFILES, 16 },
 	{ NT_FLM_SIZE_MB, 12288 },
 	{ NT_FLM_STATEFUL, 1 },
 	{ NT_FLM_VARIANT, 2 },
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c
index 4a0dafeff0..a212b3ab07 100644
--- a/drivers/net/ntnic/ntnic_ethdev.c
+++ b/drivers/net/ntnic/ntnic_ethdev.c
@@ -47,9 +47,6 @@  const rte_thread_attr_t thread_attr = { .priority = RTE_THREAD_PRIORITY_NORMAL }
 #define SG_HW_RX_PKT_BUFFER_SIZE (1024 << 1)
 #define SG_HW_TX_PKT_BUFFER_SIZE (1024 << 1)
 
-/* Max RSS queues */
-#define MAX_QUEUES 125
-
 #define NUM_VQ_SEGS(_data_size_)                                                                  \
 	({                                                                                        \
 		size_t _size = (_data_size_);                                                     \