fib6: add runtime checks for vector lookup
Checks
Commit Message
AVX512 lookup function requires CPU to support RTE_CPUFLAG_AVX512DQ and
RTE_CPUFLAG_AVX512BW. Add runtime checks of these two flags when deciding
if vector function can be used.
Fixes: c3e12e0f0354 ("fib: add dataplane algorithm for IPv6")
Cc: stable@dpdk.org
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
lib/fib/trie.c | 2 ++
1 file changed, 2 insertions(+)
Comments
On Tue, Oct 8, 2024 at 7:31 PM Vladimir Medvedkin
<vladimir.medvedkin@intel.com> wrote:
>
> AVX512 lookup function requires CPU to support RTE_CPUFLAG_AVX512DQ and
> RTE_CPUFLAG_AVX512BW. Add runtime checks of these two flags when deciding
> if vector function can be used.
>
Fixes: 1e5630e40d95 ("fib6: add AVX512 lookup")
> Cc: stable@dpdk.org
>
> Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
I wish we had a build check for those.
Or maybe a tool/script that would look at libraries/drivers, catch
_mmXXXXX intrinsics and warn if such a library/driver has no call to
corresponding runtime check.
That would save us from having to go to
https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html
...
Could someone from Intel work on this?
In any case, adjusted indent, fixed Fixes: tag, removed superfluous
parenthesis, and applied, thanks.
@@ -47,6 +47,8 @@ get_vector_fn(enum rte_fib_trie_nh_sz nh_sz)
{
#ifdef CC_TRIE_AVX512_SUPPORT
if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) <= 0) ||
+ (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512DQ) <= 0) ||
+ (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) <= 0) ||
(rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_512))
return NULL;
switch (nh_sz) {