@@ -57,6 +57,7 @@ sources = files(
'nthw/flow_filter/flow_nthw_qsl.c',
'nthw/flow_filter/flow_nthw_rpp_lr.c',
'nthw/flow_filter/flow_nthw_slc_lr.c',
+ 'nthw/flow_filter/flow_nthw_tx_cpy.c',
'nthw/model/nthw_fpga_model.c',
'nthw/nthw_platform.c',
'nthw/nthw_rac.c',
@@ -16,6 +16,7 @@
#include "flow_nthw_slc_lr.h"
#include "flow_nthw_pdb.h"
#include "flow_nthw_rpp_lr.h"
+#include "flow_nthw_tx_cpy.h"
#include "ntnic_mod_reg.h"
#include "nthw_fpga_model.h"
#include "hw_mod_backend.h"
@@ -40,6 +41,7 @@ static struct backend_dev_s {
struct pdb_nthw *p_pdb_nthw;
struct hfu_nthw *p_hfu_nthw; /* TPE module */
struct rpp_lr_nthw *p_rpp_lr_nthw; /* TPE module */
+ struct tx_cpy_nthw *p_tx_cpy_nthw; /* TPE module */
struct ifr_nthw *p_ifr_nthw; /* TPE module */
} be_devs[MAX_PHYS_ADAPTERS];
@@ -1807,6 +1809,16 @@ const struct flow_api_backend_ops *bin_flow_backend_init(nthw_fpga_t *p_fpga, vo
be_devs[physical_adapter_no].p_rpp_lr_nthw = NULL;
}
+ /* Init nthw TX_CPY */
+ if (tx_cpy_nthw_init(NULL, p_fpga, physical_adapter_no) == 0) {
+ struct tx_cpy_nthw *ptr = tx_cpy_nthw_new();
+ tx_cpy_nthw_init(ptr, p_fpga, physical_adapter_no);
+ be_devs[physical_adapter_no].p_tx_cpy_nthw = ptr;
+
+ } else {
+ be_devs[physical_adapter_no].p_tx_cpy_nthw = NULL;
+ }
+
be_devs[physical_adapter_no].adapter_no = physical_adapter_no;
*dev = (void *)&be_devs[physical_adapter_no];
@@ -1826,6 +1838,7 @@ static void bin_flow_backend_done(void *dev)
pdb_nthw_delete(be_dev->p_pdb_nthw);
hfu_nthw_delete(be_dev->p_hfu_nthw);
rpp_lr_nthw_delete(be_dev->p_rpp_lr_nthw);
+ tx_cpy_nthw_delete(be_dev->p_tx_cpy_nthw);
}
static const struct flow_backend_ops ops = {
new file mode 100644
@@ -0,0 +1,339 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "ntlog.h"
+#include "nthw_drv.h"
+#include "nthw_register.h"
+
+#include "flow_nthw_tx_cpy.h"
+
+struct tx_cpy_nthw *tx_cpy_nthw_new(void)
+{
+ struct tx_cpy_nthw *p = malloc(sizeof(struct tx_cpy_nthw));
+
+ if (p)
+ (void)memset(p, 0, sizeof(*p));
+
+ return p;
+}
+
+void tx_cpy_nthw_delete(struct tx_cpy_nthw *p)
+{
+ if (p) {
+ free(p->m_writers);
+ (void)memset(p, 0, sizeof(*p));
+ free(p);
+ }
+}
+
+int tx_cpy_nthw_init(struct tx_cpy_nthw *p, nthw_fpga_t *p_fpga, int n_instance)
+{
+ const char *const p_adapter_id_str = p_fpga->p_fpga_info->mp_adapter_id_str;
+ nthw_module_t *p_mod = nthw_fpga_query_module(p_fpga, MOD_TX_CPY, n_instance);
+
+ assert(n_instance >= 0 && n_instance < 256);
+
+ if (p == NULL)
+ return p_mod == NULL ? -1 : 0;
+
+ if (p_mod == NULL) {
+ NT_LOG(ERR, NTHW, "%s: TxCpy %d: no such instance\n", p_adapter_id_str,
+ n_instance);
+ return -1;
+ }
+
+ p->mp_fpga = p_fpga;
+ p->m_physical_adapter_no = (uint8_t)n_instance;
+ p->m_tx_cpy = nthw_fpga_query_module(p_fpga, MOD_TX_CPY, n_instance);
+
+ const int writers_cnt = nthw_fpga_get_product_param(p->mp_fpga, NT_TX_CPY_WRITERS, 0);
+
+ if (writers_cnt < 1)
+ return -1;
+
+ p->m_writers_cnt = (unsigned int)writers_cnt;
+ p->m_writers = calloc(p->m_writers_cnt, sizeof(struct tx_cpy_writers_s));
+
+ if (p->m_writers == NULL)
+ return -1;
+
+ const int variant = nthw_fpga_get_product_param(p->mp_fpga, NT_TX_CPY_VARIANT, 0);
+
+ switch (p->m_writers_cnt) {
+ default:
+ case 6:
+ p->m_writers[5].mp_writer_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER5_CTRL);
+ p->m_writers[5].mp_writer_ctrl_addr =
+ nthw_register_get_field(p->m_writers[5].mp_writer_ctrl,
+ CPY_WRITER5_CTRL_ADR);
+ p->m_writers[5].mp_writer_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[5].mp_writer_ctrl,
+ CPY_WRITER5_CTRL_CNT);
+ p->m_writers[5].mp_writer_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER5_DATA);
+ p->m_writers[5].mp_writer_data_reader_select =
+ nthw_register_get_field(p->m_writers[5].mp_writer_data,
+ CPY_WRITER5_DATA_READER_SELECT);
+ p->m_writers[5].mp_writer_data_dyn =
+ nthw_register_get_field(p->m_writers[5].mp_writer_data,
+ CPY_WRITER5_DATA_DYN);
+ p->m_writers[5].mp_writer_data_ofs =
+ nthw_register_get_field(p->m_writers[5].mp_writer_data,
+ CPY_WRITER5_DATA_OFS);
+ p->m_writers[5].mp_writer_data_len =
+ nthw_register_get_field(p->m_writers[5].mp_writer_data,
+ CPY_WRITER5_DATA_LEN);
+
+ if (variant != 0) {
+ p->m_writers[5].mp_writer_data_mask_pointer =
+ nthw_register_get_field(p->m_writers[5].mp_writer_data,
+ CPY_WRITER5_DATA_MASK_POINTER);
+ p->m_writers[5].mp_writer_mask_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER5_MASK_CTRL);
+ p->m_writers[5].mp_writer_mask_ctrl_addr =
+ nthw_register_get_field(p->m_writers[5].mp_writer_mask_ctrl,
+ CPY_WRITER5_MASK_CTRL_ADR);
+ p->m_writers[5].mp_writer_mask_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[5].mp_writer_mask_ctrl,
+ CPY_WRITER5_MASK_CTRL_CNT);
+ p->m_writers[5].mp_writer_mask_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER5_MASK_DATA);
+ p->m_writers[5].mp_writer_mask_data_byte_mask =
+ nthw_register_get_field(p->m_writers[5].mp_writer_mask_data,
+ CPY_WRITER5_MASK_DATA_BYTE_MASK);
+ }
+
+ /* Fallthrough */
+ case 5:
+ p->m_writers[4].mp_writer_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER4_CTRL);
+ p->m_writers[4].mp_writer_ctrl_addr =
+ nthw_register_get_field(p->m_writers[4].mp_writer_ctrl,
+ CPY_WRITER4_CTRL_ADR);
+ p->m_writers[4].mp_writer_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[4].mp_writer_ctrl,
+ CPY_WRITER4_CTRL_CNT);
+ p->m_writers[4].mp_writer_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER4_DATA);
+ p->m_writers[4].mp_writer_data_reader_select =
+ nthw_register_get_field(p->m_writers[4].mp_writer_data,
+ CPY_WRITER4_DATA_READER_SELECT);
+ p->m_writers[4].mp_writer_data_dyn =
+ nthw_register_get_field(p->m_writers[4].mp_writer_data,
+ CPY_WRITER4_DATA_DYN);
+ p->m_writers[4].mp_writer_data_ofs =
+ nthw_register_get_field(p->m_writers[4].mp_writer_data,
+ CPY_WRITER4_DATA_OFS);
+ p->m_writers[4].mp_writer_data_len =
+ nthw_register_get_field(p->m_writers[4].mp_writer_data,
+ CPY_WRITER4_DATA_LEN);
+
+ if (variant != 0) {
+ p->m_writers[4].mp_writer_data_mask_pointer =
+ nthw_register_get_field(p->m_writers[4].mp_writer_data,
+ CPY_WRITER4_DATA_MASK_POINTER);
+ p->m_writers[4].mp_writer_mask_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER4_MASK_CTRL);
+ p->m_writers[4].mp_writer_mask_ctrl_addr =
+ nthw_register_get_field(p->m_writers[4].mp_writer_mask_ctrl,
+ CPY_WRITER4_MASK_CTRL_ADR);
+ p->m_writers[4].mp_writer_mask_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[4].mp_writer_mask_ctrl,
+ CPY_WRITER4_MASK_CTRL_CNT);
+ p->m_writers[4].mp_writer_mask_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER4_MASK_DATA);
+ p->m_writers[4].mp_writer_mask_data_byte_mask =
+ nthw_register_get_field(p->m_writers[4].mp_writer_mask_data,
+ CPY_WRITER4_MASK_DATA_BYTE_MASK);
+ }
+
+ /* Fallthrough */
+ case 4:
+ p->m_writers[3].mp_writer_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER3_CTRL);
+ p->m_writers[3].mp_writer_ctrl_addr =
+ nthw_register_get_field(p->m_writers[3].mp_writer_ctrl,
+ CPY_WRITER3_CTRL_ADR);
+ p->m_writers[3].mp_writer_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[3].mp_writer_ctrl,
+ CPY_WRITER3_CTRL_CNT);
+ p->m_writers[3].mp_writer_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER3_DATA);
+ p->m_writers[3].mp_writer_data_reader_select =
+ nthw_register_get_field(p->m_writers[3].mp_writer_data,
+ CPY_WRITER3_DATA_READER_SELECT);
+ p->m_writers[3].mp_writer_data_dyn =
+ nthw_register_get_field(p->m_writers[3].mp_writer_data,
+ CPY_WRITER3_DATA_DYN);
+ p->m_writers[3].mp_writer_data_ofs =
+ nthw_register_get_field(p->m_writers[3].mp_writer_data,
+ CPY_WRITER3_DATA_OFS);
+ p->m_writers[3].mp_writer_data_len =
+ nthw_register_get_field(p->m_writers[3].mp_writer_data,
+ CPY_WRITER3_DATA_LEN);
+
+ if (variant != 0) {
+ p->m_writers[3].mp_writer_data_mask_pointer =
+ nthw_register_get_field(p->m_writers[3].mp_writer_data,
+ CPY_WRITER3_DATA_MASK_POINTER);
+ p->m_writers[3].mp_writer_mask_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER3_MASK_CTRL);
+ p->m_writers[3].mp_writer_mask_ctrl_addr =
+ nthw_register_get_field(p->m_writers[3].mp_writer_mask_ctrl,
+ CPY_WRITER3_MASK_CTRL_ADR);
+ p->m_writers[3].mp_writer_mask_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[3].mp_writer_mask_ctrl,
+ CPY_WRITER3_MASK_CTRL_CNT);
+ p->m_writers[3].mp_writer_mask_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER3_MASK_DATA);
+ p->m_writers[3].mp_writer_mask_data_byte_mask =
+ nthw_register_get_field(p->m_writers[3].mp_writer_mask_data,
+ CPY_WRITER3_MASK_DATA_BYTE_MASK);
+ }
+
+ /* Fallthrough */
+ case 3:
+ p->m_writers[2].mp_writer_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER2_CTRL);
+ p->m_writers[2].mp_writer_ctrl_addr =
+ nthw_register_get_field(p->m_writers[2].mp_writer_ctrl,
+ CPY_WRITER2_CTRL_ADR);
+ p->m_writers[2].mp_writer_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[2].mp_writer_ctrl,
+ CPY_WRITER2_CTRL_CNT);
+ p->m_writers[2].mp_writer_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER2_DATA);
+ p->m_writers[2].mp_writer_data_reader_select =
+ nthw_register_get_field(p->m_writers[2].mp_writer_data,
+ CPY_WRITER2_DATA_READER_SELECT);
+ p->m_writers[2].mp_writer_data_dyn =
+ nthw_register_get_field(p->m_writers[2].mp_writer_data,
+ CPY_WRITER2_DATA_DYN);
+ p->m_writers[2].mp_writer_data_ofs =
+ nthw_register_get_field(p->m_writers[2].mp_writer_data,
+ CPY_WRITER2_DATA_OFS);
+ p->m_writers[2].mp_writer_data_len =
+ nthw_register_get_field(p->m_writers[2].mp_writer_data,
+ CPY_WRITER2_DATA_LEN);
+
+ if (variant != 0) {
+ p->m_writers[2].mp_writer_data_mask_pointer =
+ nthw_register_get_field(p->m_writers[2].mp_writer_data,
+ CPY_WRITER2_DATA_MASK_POINTER);
+ p->m_writers[2].mp_writer_mask_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER2_MASK_CTRL);
+ p->m_writers[2].mp_writer_mask_ctrl_addr =
+ nthw_register_get_field(p->m_writers[2].mp_writer_mask_ctrl,
+ CPY_WRITER2_MASK_CTRL_ADR);
+ p->m_writers[2].mp_writer_mask_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[2].mp_writer_mask_ctrl,
+ CPY_WRITER2_MASK_CTRL_CNT);
+ p->m_writers[2].mp_writer_mask_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER2_MASK_DATA);
+ p->m_writers[2].mp_writer_mask_data_byte_mask =
+ nthw_register_get_field(p->m_writers[2].mp_writer_mask_data,
+ CPY_WRITER2_MASK_DATA_BYTE_MASK);
+ }
+
+ /* Fallthrough */
+ case 2:
+ p->m_writers[1].mp_writer_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER1_CTRL);
+ p->m_writers[1].mp_writer_ctrl_addr =
+ nthw_register_get_field(p->m_writers[1].mp_writer_ctrl,
+ CPY_WRITER1_CTRL_ADR);
+ p->m_writers[1].mp_writer_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[1].mp_writer_ctrl,
+ CPY_WRITER1_CTRL_CNT);
+ p->m_writers[1].mp_writer_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER1_DATA);
+ p->m_writers[1].mp_writer_data_reader_select =
+ nthw_register_get_field(p->m_writers[1].mp_writer_data,
+ CPY_WRITER1_DATA_READER_SELECT);
+ p->m_writers[1].mp_writer_data_dyn =
+ nthw_register_get_field(p->m_writers[1].mp_writer_data,
+ CPY_WRITER1_DATA_DYN);
+ p->m_writers[1].mp_writer_data_ofs =
+ nthw_register_get_field(p->m_writers[1].mp_writer_data,
+ CPY_WRITER1_DATA_OFS);
+ p->m_writers[1].mp_writer_data_len =
+ nthw_register_get_field(p->m_writers[1].mp_writer_data,
+ CPY_WRITER1_DATA_LEN);
+
+ if (variant != 0) {
+ p->m_writers[1].mp_writer_data_mask_pointer =
+ nthw_register_get_field(p->m_writers[1].mp_writer_data,
+ CPY_WRITER1_DATA_MASK_POINTER);
+ p->m_writers[1].mp_writer_mask_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER1_MASK_CTRL);
+ p->m_writers[1].mp_writer_mask_ctrl_addr =
+ nthw_register_get_field(p->m_writers[1].mp_writer_mask_ctrl,
+ CPY_WRITER1_MASK_CTRL_ADR);
+ p->m_writers[1].mp_writer_mask_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[1].mp_writer_mask_ctrl,
+ CPY_WRITER1_MASK_CTRL_CNT);
+ p->m_writers[1].mp_writer_mask_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER1_MASK_DATA);
+ p->m_writers[1].mp_writer_mask_data_byte_mask =
+ nthw_register_get_field(p->m_writers[1].mp_writer_mask_data,
+ CPY_WRITER1_MASK_DATA_BYTE_MASK);
+ }
+
+ /* Fallthrough */
+ case 1:
+ p->m_writers[0].mp_writer_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER0_CTRL);
+ p->m_writers[0].mp_writer_ctrl_addr =
+ nthw_register_get_field(p->m_writers[0].mp_writer_ctrl,
+ CPY_WRITER0_CTRL_ADR);
+ p->m_writers[0].mp_writer_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[0].mp_writer_ctrl,
+ CPY_WRITER0_CTRL_CNT);
+ p->m_writers[0].mp_writer_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER0_DATA);
+ p->m_writers[0].mp_writer_data_reader_select =
+ nthw_register_get_field(p->m_writers[0].mp_writer_data,
+ CPY_WRITER0_DATA_READER_SELECT);
+ p->m_writers[0].mp_writer_data_dyn =
+ nthw_register_get_field(p->m_writers[0].mp_writer_data,
+ CPY_WRITER0_DATA_DYN);
+ p->m_writers[0].mp_writer_data_ofs =
+ nthw_register_get_field(p->m_writers[0].mp_writer_data,
+ CPY_WRITER0_DATA_OFS);
+ p->m_writers[0].mp_writer_data_len =
+ nthw_register_get_field(p->m_writers[0].mp_writer_data,
+ CPY_WRITER0_DATA_LEN);
+
+ if (variant != 0) {
+ p->m_writers[0].mp_writer_data_mask_pointer =
+ nthw_register_get_field(p->m_writers[0].mp_writer_data,
+ CPY_WRITER0_DATA_MASK_POINTER);
+ p->m_writers[0].mp_writer_mask_ctrl =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER0_MASK_CTRL);
+ p->m_writers[0].mp_writer_mask_ctrl_addr =
+ nthw_register_get_field(p->m_writers[0].mp_writer_mask_ctrl,
+ CPY_WRITER0_MASK_CTRL_ADR);
+ p->m_writers[0].mp_writer_mask_ctrl_cnt =
+ nthw_register_get_field(p->m_writers[0].mp_writer_mask_ctrl,
+ CPY_WRITER0_MASK_CTRL_CNT);
+ p->m_writers[0].mp_writer_mask_data =
+ nthw_module_get_register(p->m_tx_cpy, CPY_WRITER0_MASK_DATA);
+ p->m_writers[0].mp_writer_mask_data_byte_mask =
+ nthw_register_get_field(p->m_writers[0].mp_writer_mask_data,
+ CPY_WRITER0_MASK_DATA_BYTE_MASK);
+ }
+
+ break;
+
+ case 0:
+ return -1;
+ }
+
+ return 0;
+}
new file mode 100644
@@ -0,0 +1,49 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __FLOW_NTHW_TX_CPY_H__
+#define __FLOW_NTHW_TX_CPY_H__
+
+#include <stdint.h>
+
+#include "nthw_fpga_model.h"
+
+struct tx_cpy_writers_s {
+ nthw_register_t *mp_writer_ctrl;
+ nthw_field_t *mp_writer_ctrl_addr;
+ nthw_field_t *mp_writer_ctrl_cnt;
+
+ nthw_register_t *mp_writer_data;
+ nthw_field_t *mp_writer_data_reader_select;
+ nthw_field_t *mp_writer_data_dyn;
+ nthw_field_t *mp_writer_data_ofs;
+ nthw_field_t *mp_writer_data_len;
+ nthw_field_t *mp_writer_data_mask_pointer;
+
+ nthw_register_t *mp_writer_mask_ctrl;
+ nthw_field_t *mp_writer_mask_ctrl_addr;
+ nthw_field_t *mp_writer_mask_ctrl_cnt;
+
+ nthw_register_t *mp_writer_mask_data;
+ nthw_field_t *mp_writer_mask_data_byte_mask;
+};
+
+struct tx_cpy_nthw {
+ uint8_t m_physical_adapter_no;
+ nthw_fpga_t *mp_fpga;
+
+ nthw_module_t *m_tx_cpy;
+
+ unsigned int m_writers_cnt;
+ struct tx_cpy_writers_s *m_writers;
+};
+
+struct tx_cpy_nthw *tx_cpy_nthw_new(void);
+void tx_cpy_nthw_delete(struct tx_cpy_nthw *p);
+int tx_cpy_nthw_init(struct tx_cpy_nthw *p, nthw_fpga_t *p_fpga, int n_instance);
+
+int tx_cpy_nthw_setup(struct tx_cpy_nthw *p, int n_idx, int n_idx_cnt);
+
+#endif /* __FLOW_NTHW_TX_CPY_H__ */
@@ -37,6 +37,7 @@
#define MOD_RST9563 (0x385d6d1dUL)
#define MOD_SDC (0xd2369530UL)
#define MOD_SLC_LR (0x969fc50bUL)
+#define MOD_TX_CPY (0x60acf217UL)
#define MOD_IDX_COUNT (14)
/* aliases - only aliases go below this point */
@@ -14,6 +14,7 @@
#define _NTHW_FPGA_REG_DEFS_
#include "nthw_fpga_reg_defs_cat.h"
+#include "nthw_fpga_reg_defs_cpy.h"
#include "nthw_fpga_reg_defs_flm.h"
#include "nthw_fpga_reg_defs_gfg.h"
#include "nthw_fpga_reg_defs_gmf.h"
@@ -37,6 +38,7 @@
#include "nthw_fpga_reg_defs_sdc.h"
#include "nthw_fpga_reg_defs_slc.h"
#include "nthw_fpga_reg_defs_slc_lr.h"
+#include "nthw_fpga_reg_defs_tx_cpy.h"
/* aliases */
new file mode 100644
@@ -0,0 +1,113 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Napatech A/S
+ */
+
+/*
+ * nthw_fpga_reg_defs_cpy.h
+ *
+ * Auto-generated file - do *NOT* edit
+ *
+ */
+
+#ifndef _NTHW_FPGA_REG_DEFS_CPY_
+#define _NTHW_FPGA_REG_DEFS_CPY_
+
+/* CPY */
+#define NTHW_MOD_CPY (0x1ddc186fUL)
+#define CPY_PACKET_READER0_CTRL (0x59359b7UL)
+#define CPY_PACKET_READER0_CTRL_ADR (0xc84f1475UL)
+#define CPY_PACKET_READER0_CTRL_CNT (0xd8478da4UL)
+#define CPY_PACKET_READER0_DATA (0xaa42dbaeUL)
+#define CPY_PACKET_READER0_DATA_DYN (0x34037b11UL)
+#define CPY_PACKET_READER0_DATA_OFS (0x960af6b7UL)
+#define CPY_WRITER0_CTRL (0xe9b3268eUL)
+#define CPY_WRITER0_CTRL_ADR (0x26f906c2UL)
+#define CPY_WRITER0_CTRL_CNT (0x36f19f13UL)
+#define CPY_WRITER0_DATA (0x4662a497UL)
+#define CPY_WRITER0_DATA_DYN (0xdab569a6UL)
+#define CPY_WRITER0_DATA_LEN (0x32d16543UL)
+#define CPY_WRITER0_DATA_MASK_POINTER (0x64db2b2dUL)
+#define CPY_WRITER0_DATA_OFS (0x78bce400UL)
+#define CPY_WRITER0_DATA_READER_SELECT (0x63a38cf9UL)
+#define CPY_WRITER0_MASK_CTRL (0xed52c5f9UL)
+#define CPY_WRITER0_MASK_CTRL_ADR (0x3bbdf6aaUL)
+#define CPY_WRITER0_MASK_CTRL_CNT (0x2bb56f7bUL)
+#define CPY_WRITER0_MASK_DATA (0x428347e0UL)
+#define CPY_WRITER0_MASK_DATA_BYTE_MASK (0xd1d0e256UL)
+#define CPY_WRITER1_CTRL (0x22eff52bUL)
+#define CPY_WRITER1_CTRL_ADR (0xc93b6dfcUL)
+#define CPY_WRITER1_CTRL_CNT (0xd933f42dUL)
+#define CPY_WRITER1_DATA (0x8d3e7732UL)
+#define CPY_WRITER1_DATA_DYN (0x35770298UL)
+#define CPY_WRITER1_DATA_LEN (0xdd130e7dUL)
+#define CPY_WRITER1_DATA_MASK_POINTER (0xb339ab75UL)
+#define CPY_WRITER1_DATA_OFS (0x977e8f3eUL)
+#define CPY_WRITER1_DATA_READER_SELECT (0x6c4b7bfUL)
+#define CPY_WRITER1_MASK_CTRL (0x2cdc1a39UL)
+#define CPY_WRITER1_MASK_CTRL_ADR (0x82462d42UL)
+#define CPY_WRITER1_MASK_CTRL_CNT (0x924eb493UL)
+#define CPY_WRITER1_MASK_DATA (0x830d9820UL)
+#define CPY_WRITER1_MASK_DATA_BYTE_MASK (0x4e0a61c8UL)
+#define CPY_WRITER2_CTRL (0xa47b8785UL)
+#define CPY_WRITER2_CTRL_ADR (0x220cd6ffUL)
+#define CPY_WRITER2_CTRL_CNT (0x32044f2eUL)
+#define CPY_WRITER2_DATA (0xbaa059cUL)
+#define CPY_WRITER2_DATA_DYN (0xde40b99bUL)
+#define CPY_WRITER2_DATA_LEN (0x3624b57eUL)
+#define CPY_WRITER2_DATA_MASK_POINTER (0x106f2ddcUL)
+#define CPY_WRITER2_DATA_OFS (0x7c49343dUL)
+#define CPY_WRITER2_DATA_READER_SELECT (0xa96dfa75UL)
+#define CPY_WRITER2_MASK_CTRL (0xb53e7c38UL)
+#define CPY_WRITER2_MASK_CTRL_ADR (0x933b473bUL)
+#define CPY_WRITER2_MASK_CTRL_CNT (0x8333deeaUL)
+#define CPY_WRITER2_MASK_DATA (0x1aeffe21UL)
+#define CPY_WRITER2_MASK_DATA_BYTE_MASK (0x3514e32bUL)
+#define CPY_WRITER3_CTRL (0x6f275420UL)
+#define CPY_WRITER3_CTRL_ADR (0xcdcebdc1UL)
+#define CPY_WRITER3_CTRL_CNT (0xddc62410UL)
+#define CPY_WRITER3_DATA (0xc0f6d639UL)
+#define CPY_WRITER3_DATA_DYN (0x3182d2a5UL)
+#define CPY_WRITER3_DATA_LEN (0xd9e6de40UL)
+#define CPY_WRITER3_DATA_MASK_POINTER (0xc78dad84UL)
+#define CPY_WRITER3_DATA_OFS (0x938b5f03UL)
+#define CPY_WRITER3_DATA_READER_SELECT (0xcc0ac133UL)
+#define CPY_WRITER3_MASK_CTRL (0x74b0a3f8UL)
+#define CPY_WRITER3_MASK_CTRL_ADR (0x2ac09cd3UL)
+#define CPY_WRITER3_MASK_CTRL_CNT (0x3ac80502UL)
+#define CPY_WRITER3_MASK_DATA (0xdb6121e1UL)
+#define CPY_WRITER3_MASK_DATA_BYTE_MASK (0xaace60b5UL)
+#define CPY_WRITER4_CTRL (0x72226498UL)
+#define CPY_WRITER4_CTRL_ADR (0x2f12a6b8UL)
+#define CPY_WRITER4_CTRL_CNT (0x3f1a3f69UL)
+#define CPY_WRITER4_DATA (0xddf3e681UL)
+#define CPY_WRITER4_DATA_DYN (0xd35ec9dcUL)
+#define CPY_WRITER4_DATA_LEN (0x3b3ac539UL)
+#define CPY_WRITER4_DATA_MASK_POINTER (0x8db326cfUL)
+#define CPY_WRITER4_DATA_OFS (0x7157447aUL)
+#define CPY_WRITER4_DATA_READER_SELECT (0x2d4e67a0UL)
+#define CPY_WRITER4_MASK_CTRL (0x5d8bb67bUL)
+#define CPY_WRITER4_MASK_CTRL_ADR (0xb1c193c9UL)
+#define CPY_WRITER4_MASK_CTRL_CNT (0xa1c90a18UL)
+#define CPY_WRITER4_MASK_DATA (0xf25a3462UL)
+#define CPY_WRITER4_MASK_DATA_BYTE_MASK (0xc329e6edUL)
+#define CPY_WRITER5_CTRL (0xb97eb73dUL)
+#define CPY_WRITER5_CTRL_ADR (0xc0d0cd86UL)
+#define CPY_WRITER5_CTRL_CNT (0xd0d85457UL)
+#define CPY_WRITER5_DATA (0x16af3524UL)
+#define CPY_WRITER5_DATA_DYN (0x3c9ca2e2UL)
+#define CPY_WRITER5_DATA_LEN (0xd4f8ae07UL)
+#define CPY_WRITER5_DATA_MASK_POINTER (0x5a51a697UL)
+#define CPY_WRITER5_DATA_OFS (0x9e952f44UL)
+#define CPY_WRITER5_DATA_READER_SELECT (0x48295ce6UL)
+#define CPY_WRITER5_MASK_CTRL (0x9c0569bbUL)
+#define CPY_WRITER5_MASK_CTRL_ADR (0x83a4821UL)
+#define CPY_WRITER5_MASK_CTRL_CNT (0x1832d1f0UL)
+#define CPY_WRITER5_MASK_DATA (0x33d4eba2UL)
+#define CPY_WRITER5_MASK_DATA_BYTE_MASK (0x5cf36573UL)
+
+#endif /* _NTHW_FPGA_REG_DEFS_CPY_ */
+
+/*
+ * Auto-generated file - do *NOT* edit
+ */
new file mode 100644
@@ -0,0 +1,23 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Napatech A/S
+ */
+
+/*
+ * nthw_fpga_reg_defs_tx_cpy.h
+ *
+ * Auto-generated file - do *NOT* edit
+ *
+ */
+
+#ifndef _NTHW_FPGA_REG_DEFS_TX_CPY_
+#define _NTHW_FPGA_REG_DEFS_TX_CPY_
+
+/* TX_CPY */
+#define NTHW_MOD_TX_CPY (0x60acf217UL)
+
+#endif /* _NTHW_FPGA_REG_DEFS_TX_CPY_ */
+
+/*
+ * Auto-generated file - do *NOT* edit
+ */