@@ -48,6 +48,7 @@ sources = files(
'nthw/flow_api/flow_filter.c',
'nthw/flow_filter/flow_nthw_cat.c',
'nthw/flow_filter/flow_nthw_flm.c',
+ 'nthw/flow_filter/flow_nthw_ifr.c',
'nthw/flow_filter/flow_nthw_info.c',
'nthw/flow_filter/flow_nthw_km.c',
'nthw/model/nthw_fpga_model.c',
@@ -6,6 +6,7 @@
#include <stdint.h>
#include "flow_nthw_info.h"
+#include "flow_nthw_ifr.h"
#include "flow_nthw_cat.h"
#include "flow_nthw_km.h"
#include "flow_nthw_flm.h"
@@ -27,6 +28,7 @@ static struct backend_dev_s {
struct cat_nthw *p_cat_nthw;
struct km_nthw *p_km_nthw;
struct flm_nthw *p_flm_nthw;
+ struct ifr_nthw *p_ifr_nthw; /* TPE module */
} be_devs[MAX_PHYS_ADAPTERS];
#define CHECK_DEBUG_ON(be, mod, inst) \
@@ -1407,6 +1409,16 @@ const struct flow_api_backend_ops *bin_flow_backend_init(nthw_fpga_t *p_fpga, vo
be_devs[physical_adapter_no].p_flm_nthw = NULL;
}
+ /* Init nthw IFR */
+ if (ifr_nthw_init(NULL, p_fpga, physical_adapter_no) == 0) {
+ struct ifr_nthw *ifrnthw = ifr_nthw_new();
+ ifr_nthw_init(ifrnthw, p_fpga, physical_adapter_no);
+ be_devs[physical_adapter_no].p_ifr_nthw = ifrnthw;
+
+ } else {
+ be_devs[physical_adapter_no].p_ifr_nthw = NULL;
+ }
+
be_devs[physical_adapter_no].adapter_no = physical_adapter_no;
*dev = (void *)&be_devs[physical_adapter_no];
new file mode 100644
@@ -0,0 +1,68 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "ntlog.h"
+#include "nthw_drv.h"
+#include "nthw_register.h"
+
+#include "flow_nthw_ifr.h"
+
+struct ifr_nthw *ifr_nthw_new(void)
+{
+ struct ifr_nthw *p = malloc(sizeof(struct ifr_nthw));
+
+ if (p)
+ (void)memset(p, 0, sizeof(*p));
+
+ return p;
+}
+
+int ifr_nthw_init(struct ifr_nthw *p, nthw_fpga_t *p_fpga, int n_instance)
+{
+ const char *const p_adapter_id_str = p_fpga->p_fpga_info->mp_adapter_id_str;
+ nthw_module_t *p_mod = nthw_fpga_query_module(p_fpga, MOD_IFR, n_instance);
+
+ assert(n_instance >= 0 && n_instance < 256);
+
+ if (p == NULL)
+ return p_mod == NULL ? -1 : 0;
+
+ if (p_mod == NULL) {
+ NT_LOG(ERR, NTHW, "%s: Ifr %d: no such instance\n", p_adapter_id_str, n_instance);
+ return -1;
+ }
+
+ p->mp_fpga = p_fpga;
+ p->m_physical_adapter_no = (uint8_t)n_instance;
+ p->m_ifr = nthw_fpga_query_module(p_fpga, MOD_IFR, n_instance);
+
+ p->mp_rcp_ctrl = nthw_module_get_register(p->m_ifr, IFR_RCP_CTRL);
+ p->mp_rcp_addr = nthw_register_get_field(p->mp_rcp_ctrl, IFR_RCP_CTRL_ADR);
+ p->mp_rcp_cnt = nthw_register_get_field(p->mp_rcp_ctrl, IFR_RCP_CTRL_CNT);
+
+ p->mp_rcp_data = nthw_module_get_register(p->m_ifr, IFR_RCP_DATA);
+ p->mp_rcp_data_ipv4_en = nthw_register_query_field(p->mp_rcp_data, IFR_RCP_DATA_IPV4_EN);
+ p->mp_rcp_data_ipv6_en = nthw_register_query_field(p->mp_rcp_data, IFR_RCP_DATA_IPV6_EN);
+ p->mp_rcp_data_mtu = nthw_register_get_field(p->mp_rcp_data, IFR_RCP_DATA_MTU);
+ p->mp_rcp_data_ipv4_df_drop =
+ nthw_register_query_field(p->mp_rcp_data, IFR_RCP_DATA_IPV4_DF_DROP);
+ p->mp_rcp_data_ipv6_drop =
+ nthw_register_query_field(p->mp_rcp_data, IFR_RCP_DATA_IPV6_DROP);
+
+ p->mp_df_buf_ctrl = nthw_module_get_register(p->m_ifr, IFR_DF_BUF_CTRL);
+ p->mp_df_buf_ctrl_available =
+ nthw_register_get_field(p->mp_df_buf_ctrl, IFR_DF_BUF_CTRL_AVAILABLE);
+ p->mp_df_buf_ctrl_mtu_profile =
+ nthw_register_get_field(p->mp_df_buf_ctrl, IFR_DF_BUF_CTRL_MTU_PROFILE);
+
+ p->mp_df_buf_data = nthw_module_get_register(p->m_ifr, IFR_DF_BUF_DATA);
+ p->mp_df_buf_data_fifo_dat =
+ nthw_register_get_field(p->mp_df_buf_data, IFR_DF_BUF_DATA_FIFO_DAT);
+
+ return 0;
+}
new file mode 100644
@@ -0,0 +1,43 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __FLOW_NTHW_IFR_H__
+#define __FLOW_NTHW_IFR_H__
+
+#include <stdint.h>
+
+#include "nthw_fpga_model.h"
+
+struct ifr_nthw {
+ uint8_t m_physical_adapter_no;
+ nthw_fpga_t *mp_fpga;
+
+ nthw_module_t *m_ifr;
+
+ nthw_register_t *mp_rcp_ctrl;
+ nthw_field_t *mp_rcp_addr;
+ nthw_field_t *mp_rcp_cnt;
+
+ nthw_register_t *mp_rcp_data;
+ nthw_field_t *mp_rcp_data_ipv4_en;
+ nthw_field_t *mp_rcp_data_ipv6_en;
+ nthw_field_t *mp_rcp_data_mtu;
+ nthw_field_t *mp_rcp_data_ipv4_df_drop;
+ nthw_field_t *mp_rcp_data_ipv6_drop;
+
+ nthw_register_t *mp_df_buf_ctrl;
+ nthw_field_t *mp_df_buf_ctrl_available;
+ nthw_field_t *mp_df_buf_ctrl_mtu_profile;
+
+ nthw_register_t *mp_df_buf_data;
+ nthw_field_t *mp_df_buf_data_fifo_dat;
+};
+
+struct ifr_nthw *ifr_nthw_new(void);
+int ifr_nthw_init(struct ifr_nthw *p, nthw_fpga_t *p_fpga, int n_instance);
+
+int ifr_nthw_setup(struct ifr_nthw *p, int n_idx, int n_idx_cnt);
+
+#endif /* __FLOW_NTHW_IFR_H__ */
@@ -21,6 +21,7 @@
#define MOD_GPIO_PHY (0xbbe81659UL)
#define MOD_HIF (0x7815363UL)
#define MOD_I2CM (0x93bc7780UL)
+#define MOD_IFR (0x9b01f1e6UL)
#define MOD_IIC (0x7629cddbUL)
#define MOD_KM (0xcfbd9dbeUL)
#define MOD_MAC_PCS (0x7abe24c7UL)
@@ -20,6 +20,7 @@
#include "nthw_fpga_reg_defs_gpio_phy.h"
#include "nthw_fpga_reg_defs_hif.h"
#include "nthw_fpga_reg_defs_i2cm.h"
+#include "nthw_fpga_reg_defs_ifr.h"
#include "nthw_fpga_reg_defs_iic.h"
#include "nthw_fpga_reg_defs_km.h"
#include "nthw_fpga_reg_defs_mac_pcs.h"
new file mode 100644
@@ -0,0 +1,42 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Napatech A/S
+ */
+
+/*
+ * nthw_fpga_reg_defs_ifr.h
+ *
+ * Auto-generated file - do *NOT* edit
+ *
+ */
+
+#ifndef _NTHW_FPGA_REG_DEFS_IFR_
+#define _NTHW_FPGA_REG_DEFS_IFR_
+
+/* IFR */
+#define NTHW_MOD_IFR (0x9b01f1e6UL)
+#define IFR_COUNTERS_CTRL (0x92ba13e6UL)
+#define IFR_COUNTERS_CTRL_ADR (0xecdeeda8UL)
+#define IFR_COUNTERS_CTRL_CNT (0xfcd67479UL)
+#define IFR_COUNTERS_DATA (0x3d6b91ffUL)
+#define IFR_COUNTERS_DATA_DROP (0x3ee57cc0UL)
+#define IFR_DF_BUF_CTRL (0xf60805e4UL)
+#define IFR_DF_BUF_CTRL_AVAILABLE (0x158f09c3UL)
+#define IFR_DF_BUF_CTRL_MTU_PROFILE (0x7cb4bc5aUL)
+#define IFR_DF_BUF_DATA (0x59d987fdUL)
+#define IFR_DF_BUF_DATA_FIFO_DAT (0xdbfdf650UL)
+#define IFR_RCP_CTRL (0xc6dfc47eUL)
+#define IFR_RCP_CTRL_ADR (0x68600d59UL)
+#define IFR_RCP_CTRL_CNT (0x78689488UL)
+#define IFR_RCP_DATA (0x690e4667UL)
+#define IFR_RCP_DATA_IPV4_DF_DROP (0xbfd1ca18UL)
+#define IFR_RCP_DATA_IPV4_EN (0xb48ee13aUL)
+#define IFR_RCP_DATA_IPV6_DROP (0x4fbf34a2UL)
+#define IFR_RCP_DATA_IPV6_EN (0x1e8729b1UL)
+#define IFR_RCP_DATA_MTU (0xa436ee13UL)
+
+#endif /* _NTHW_FPGA_REG_DEFS_IFR_ */
+
+/*
+ * Auto-generated file - do *NOT* edit
+ */