@@ -557,6 +557,13 @@ struct bnxt_ctx_mem_info {
uint16_t tim_entry_size;
uint32_t tim_max_entries;
uint8_t tqm_entries_multiple;
+ uint8_t mpc_tqm_entries_multiple;
+ uint32_t mpc_tqm_max_num_entries;
+ uint32_t mpc_tqm_min_num_entries;
+ uint32_t instance_bit_map; /* MPC TQM: TE_CFA(2), RE_CFA (3) */
+ uint16_t mpc_tqm_entry_size;
+ uint8_t ctx_init_value;
+ uint8_t ctx_init_offset;
struct bnxt_ctx_pg_info qp_mem;
struct bnxt_ctx_pg_info srq_mem;
@@ -564,6 +571,8 @@ struct bnxt_ctx_mem_info {
struct bnxt_ctx_pg_info vnic_mem;
struct bnxt_ctx_pg_info stat_mem;
struct bnxt_ctx_pg_info *tqm_mem[BNXT_MAX_TQM_RINGS];
+#define BNXT_MAX_BMAP 0x5
+ struct bnxt_ctx_pg_info *mpc_tqm_mem[BNXT_MAX_BMAP];
};
struct bnxt_ctx_mem_buf_info {
@@ -796,8 +805,11 @@ struct bnxt {
#define BNXT_FLAG_FLOW_XSTATS_EN BIT(25)
#define BNXT_FLAG_DFLT_MAC_SET BIT(26)
#define BNXT_FLAG_GFID_ENABLE BIT(27)
-#define BNXT_FLAG_CHIP_P7 BIT(30)
-#define BNXT_FLAG_FW_TIMEDOUT BIT(31)
+#define BNXT_FLAG_CHIP_P7 BIT(28)
+#define BNXT_FLAG_FW_TIMEDOUT BIT(29)
+#define BNXT_FLAG_RFS_NEEDS_VNIC BIT(30)
+#define BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2 BIT(31)
+#define BNXT_RFS_NEEDS_VNIC(bp) ((bp)->flags & BNXT_FLAG_RFS_NEEDS_VNIC)
#define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
#define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
#define BNXT_NPAR(bp) ((bp)->flags & BNXT_FLAG_NPAR_PF)
@@ -829,8 +841,6 @@ struct bnxt {
uint16_t multi_host_pf_pci_id;
uint16_t chip_num;
-#define CHIP_NUM_58818 0xd818
-#define BNXT_CHIP_SR2(bp) ((bp)->chip_num == CHIP_NUM_58818)
#define BNXT_FLAGS2_MULTIROOT_EN BIT(4)
#define BNXT_MULTIROOT_EN(bp) \
((bp)->flags2 & BNXT_FLAGS2_MULTIROOT_EN)
@@ -847,7 +857,8 @@ struct bnxt {
#define BNXT_FW_CAP_LINK_ADMIN BIT(7)
#define BNXT_FW_CAP_TRUFLOW_EN BIT(8)
#define BNXT_FW_CAP_VLAN_TX_INSERT BIT(9)
-#define BNXT_FW_CAP_RX_ALL_PKT_TS BIT(10)
+#define BNXT_FW_CAP_TX_COAL_CMPL BIT(10)
+#define BNXT_FW_CAP_RX_ALL_PKT_TS BIT(11)
#define BNXT_FW_CAP_BACKING_STORE_V2 BIT(12)
#define BNXT_FW_BACKING_STORE_V2_EN(bp) \
((bp)->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2)
@@ -1031,11 +1042,12 @@ struct bnxt {
uint16_t port_svif;
struct tf tfp[BNXT_SESSION_TYPE_LAST];
+ struct tfc tfcp;
struct bnxt_ulp_context *ulp_ctx;
struct bnxt_flow_stat_info *flow_stat;
uint16_t max_num_kflows;
uint8_t app_id;
- uint16_t tx_cfa_action;
+ uint32_t tx_cfa_action;
struct bnxt_ring_stats *prev_rx_ring_stats;
struct bnxt_ring_stats *prev_tx_ring_stats;
struct bnxt_ring_stats_ext *prev_rx_ring_stats_ext;
@@ -1052,6 +1064,7 @@ struct bnxt {
struct rte_eth_rss_conf rss_conf; /* RSS configuration. */
uint16_t tunnel_disable_flag; /* tunnel stateless offloads status */
+ uint8_t chip_rev;
};
static
@@ -1123,7 +1136,7 @@ struct bnxt_representor {
#define BNXT_DFLT_VNIC_ID_INVALID 0xFFFF
uint16_t dflt_vnic_id;
uint16_t svif;
- uint16_t vfr_tx_cfa_action;
+ uint32_t vfr_tx_cfa_action;
uint8_t parent_pf_idx; /* Logical PF index */
uint32_t dpdk_port_id;
uint32_t rep_based_pf;
@@ -1214,6 +1227,9 @@ extern const struct rte_flow_ops bnxt_flow_meter_ops;
} \
} while (0)
+#define BNXT_ETH_DEV_IS_REPRESENTOR(eth_dev) \
+ ((eth_dev)->data->dev_flags & RTE_ETH_DEV_REPRESENTOR)
+
extern int bnxt_logtype_driver;
#define RTE_LOGTYPE_BNXT bnxt_logtype_driver
#define PMD_DRV_LOG_RAW(level, fmt, args...) \
@@ -1251,6 +1267,6 @@ int bnxt_dev_stop_op(struct rte_eth_dev *eth_dev);
void bnxt_handle_vf_cfg_change(void *arg);
int bnxt_flow_meter_ops_get(struct rte_eth_dev *eth_dev, void *arg);
struct bnxt_vnic_info *bnxt_get_default_vnic(struct bnxt *bp);
-struct tf *bnxt_get_tfp_session(struct bnxt *bp, enum bnxt_session_type type);
uint64_t bnxt_eth_rss_support(struct bnxt *bp);
+struct bnxt *bnxt_pmd_get_bp(uint16_t port);
#endif
@@ -11,6 +11,7 @@
#include "bnxt_hwrm.h"
#include "bnxt_ring.h"
#include "hsi_struct_def_dpdk.h"
+#include "tfc_vf2pf_msg.h"
void bnxt_wait_for_device_shutdown(struct bnxt *bp)
{
@@ -135,6 +136,7 @@ static void
bnxt_process_vf_flr(struct bnxt *bp, uint32_t data1)
{
uint16_t pfid, vfid;
+ int rc;
if (!BNXT_TRUFLOW_EN(bp))
return;
@@ -145,7 +147,11 @@ bnxt_process_vf_flr(struct bnxt *bp, uint32_t data1)
HWRM_ASYNC_EVENT_CMPL_VF_FLR_EVENT_DATA1_VF_ID_SFT;
PMD_DRV_LOG(INFO, "VF FLR async event received pfid: %u, vfid: %u\n",
- pfid, vfid);
+ pfid, vfid);
+
+ rc = tfc_tbl_scope_func_reset(&bp->tfcp, vfid);
+ if (rc != 0)
+ PMD_DRV_LOG(ERR, "Failed to reset vf\n");
}
/*
@@ -360,6 +366,61 @@ void bnxt_handle_fwd_req(struct bnxt *bp, struct cmpl_base *cmpl)
HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN);
}
+ if (fwd_cmd->req_type == HWRM_OEM_CMD) {
+ struct hwrm_oem_cmd_input *oem_cmd = (void *)fwd_cmd;
+ struct hwrm_oem_cmd_output oem_out = { 0 };
+
+ if (oem_cmd->oem_id == 0x14e4 &&
+ oem_cmd->naming_authority
+ == HWRM_OEM_CMD_INPUT_NAMING_AUTHORITY_PCI_SIG &&
+ oem_cmd->message_family
+ == HWRM_OEM_CMD_INPUT_MESSAGE_FAMILY_TRUFLOW) {
+ uint32_t resp[18] = { 0 };
+ uint16_t oem_data_len = sizeof(oem_out.oem_data);
+ uint16_t resp_len = oem_data_len;
+
+ rc = tfc_oem_cmd_process(&bp->tfcp,
+ oem_cmd->oem_data,
+ resp,
+ &resp_len);
+ if (rc) {
+ PMD_DRV_LOG(ERR,
+ "OEM cmd process error id 0x%x, name 0x%x, family 0x%x.\n",
+ oem_cmd->oem_id,
+ oem_cmd->naming_authority,
+ oem_cmd->message_family);
+ goto reject;
+ }
+
+ oem_out.error_code = 0;
+ oem_out.req_type = oem_cmd->req_type;
+ oem_out.seq_id = oem_cmd->seq_id;
+ oem_out.resp_len = rte_cpu_to_le_16(sizeof(oem_out));
+ oem_out.oem_id = oem_cmd->oem_id;
+ oem_out.naming_authority = oem_cmd->naming_authority;
+ oem_out.message_family = oem_cmd->message_family;
+ memcpy(oem_out.oem_data, resp, resp_len);
+ oem_out.valid = 1;
+
+ rc = bnxt_hwrm_fwd_resp(bp, fw_vf_id, &oem_out, oem_out.resp_len,
+ oem_cmd->resp_addr, oem_cmd->cmpl_ring);
+ if (rc) {
+ PMD_DRV_LOG(ERR,
+ "Failed to send HWRM_FWD_RESP VF 0x%x, type .\n",
+ fw_vf_id - bp->pf->first_vf_id);
+ }
+ } else {
+ PMD_DRV_LOG(ERR,
+ "Unsupported OEM cmd id 0x%x, name 0x%x, family 0x%x.\n",
+ oem_cmd->oem_id,
+ oem_cmd->naming_authority,
+ oem_cmd->message_family);
+ goto reject;
+ }
+
+ return;
+ }
+
/* Forward */
rc = bnxt_hwrm_exec_fwd_resp(bp, fw_vf_id, fwd_cmd, req_len);
if (rc) {
@@ -105,6 +105,7 @@ static const struct rte_pci_id bnxt_pci_id_map[] = {
#define BNXT_DEVARG_APP_ID "app-id"
#define BNXT_DEVARG_IEEE_1588 "ieee-1588"
#define BNXT_DEVARG_CQE_MODE "cqe-mode"
+#define BNXT_DEVARG_MPC "mpc"
static const char *const bnxt_dev_args[] = {
BNXT_DEVARG_REPRESENTOR,
@@ -119,6 +120,7 @@ static const char *const bnxt_dev_args[] = {
BNXT_DEVARG_APP_ID,
BNXT_DEVARG_IEEE_1588,
BNXT_DEVARG_CQE_MODE,
+ BNXT_DEVARG_MPC,
NULL
};
@@ -127,6 +129,11 @@ static const char *const bnxt_dev_args[] = {
*/
#define BNXT_DEVARG_CQE_MODE_INVALID(val) ((val) > 1)
+/*
+ * mpc = an non-negative 8-bit number
+ */
+#define BNXT_DEVARG_MPC_INVALID(val) ((val) > 1)
+
/*
* app-id = an non-negative 8-bit number
*/
@@ -174,6 +181,7 @@ static const char *const bnxt_dev_args[] = {
#define BNXT_DEVARG_REP_FC_F2R_INVALID(rep_fc_f2r) ((rep_fc_f2r) > 1)
int bnxt_cfa_code_dynfield_offset = -1;
+unsigned long mpc;
/*
* max_num_kflows must be >= 32
@@ -1687,6 +1695,10 @@ static int bnxt_dev_stop(struct rte_eth_dev *eth_dev)
bnxt_free_rx_mbufs(bp);
/* Process any remaining notifications in default completion queue */
bnxt_int_handler(eth_dev);
+
+ if (mpc != 0)
+ bnxt_mpc_close(bp);
+
bnxt_shutdown_nic(bp);
bnxt_hwrm_if_change(bp, false);
@@ -1764,6 +1776,12 @@ int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
if (rc)
goto error;
+ if (mpc != 0) {
+ rc = bnxt_mpc_open(bp);
+ if (rc != 0)
+ PMD_DRV_LOG(DEBUG, "MPC open failed\n");
+ }
+
rc = bnxt_alloc_prev_ring_stats(bp);
if (rc)
goto error;
@@ -2220,6 +2238,11 @@ static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
continue;
rxq = bnxt_qid_to_rxq(bp, reta_conf[idx].reta[sft]);
+ if (!rxq) {
+ PMD_DRV_LOG(ERR, "Invalid ring in reta_conf.\n");
+ return -EINVAL;
+ }
+
if (BNXT_CHIP_P5_P7(bp)) {
vnic->rss_table[i * 2] =
rxq->rx_ring->rx_ring_struct->fw_ring_id;
@@ -3752,6 +3775,7 @@ bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
if (!ptp)
return -ENOTSUP;
+ /* TODO Revisit for Thor 2 */
if (BNXT_CHIP_P5(bp))
rc = bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
&systime_cycles);
@@ -3801,6 +3825,7 @@ bnxt_timesync_enable(struct rte_eth_dev *dev)
ptp->tx_tstamp_tc.cc_shift = shift;
ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
+ /* TODO Revisit for Thor 2 */
if (!BNXT_CHIP_P5(bp))
bnxt_map_ptp_regs(bp);
else
@@ -3825,6 +3850,7 @@ bnxt_timesync_disable(struct rte_eth_dev *dev)
bnxt_hwrm_ptp_cfg(bp);
+ /* TODO Revisit for Thor 2 */
bp->ptp_all_rx_tstamp = 0;
if (!BNXT_CHIP_P5(bp))
bnxt_unmap_ptp_regs(bp);
@@ -3847,6 +3873,7 @@ bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
if (!ptp)
return -ENOTSUP;
+ /* TODO Revisit for Thor 2 */
if (BNXT_CHIP_P5(bp))
rx_tstamp_cycles = ptp->rx_timestamp;
else
@@ -3870,6 +3897,7 @@ bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
if (!ptp)
return -ENOTSUP;
+ /* TODO Revisit for Thor 2 */
if (BNXT_CHIP_P5(bp))
rc = bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_PATH_TX,
&tx_tstamp_cycles);
@@ -5885,6 +5913,38 @@ bnxt_parse_devarg_app_id(__rte_unused const char *key,
return 0;
}
+static int
+bnxt_parse_devarg_mpc(__rte_unused const char *key,
+ const char *value, __rte_unused void *opaque_arg)
+{
+ char *end = NULL;
+
+ if (!value || !opaque_arg) {
+ PMD_DRV_LOG(ERR,
+ "Invalid parameter passed to app-id "
+ "devargs.\n");
+ return -EINVAL;
+ }
+
+ mpc = strtoul(value, &end, 10);
+ if (end == NULL || *end != '\0' ||
+ (mpc == ULONG_MAX && errno == ERANGE)) {
+ PMD_DRV_LOG(ERR,
+ "Invalid parameter passed to mpc "
+ "devargs.\n");
+ return -EINVAL;
+ }
+
+ if (BNXT_DEVARG_MPC_INVALID(mpc)) {
+ PMD_DRV_LOG(ERR, "Invalid mpc(%d) devargs.\n",
+ (uint16_t)mpc);
+ return -EINVAL;
+ }
+
+ PMD_DRV_LOG(INFO, "MPC%d feature enabled.\n", (uint16_t)mpc);
+ return 0;
+}
+
static int
bnxt_parse_devarg_ieee_1588(__rte_unused const char *key,
const char *value, void *opaque_arg)
@@ -6190,6 +6250,13 @@ bnxt_parse_dev_args(struct bnxt *bp, struct rte_devargs *devargs)
rte_kvargs_process(kvlist, BNXT_DEVARG_IEEE_1588,
bnxt_parse_devarg_ieee_1588, bp);
+ /*
+ * Handler for "mpc" devarg.
+ * Invoked as for ex: "-a 000:00:0d.0,mpc=1"
+ */
+ rte_kvargs_process(kvlist, BNXT_DEVARG_MPC,
+ bnxt_parse_devarg_mpc, bp);
+
/*
* Handler for "cqe-mode" devarg.
* Invoked as for ex: "-a 000:00:0d.0,cqe-mode=1"
@@ -6817,10 +6884,30 @@ bool is_bnxt_supported(struct rte_eth_dev *dev)
return is_device_supported(dev, &bnxt_rte_pmd);
}
-struct tf *bnxt_get_tfp_session(struct bnxt *bp, enum bnxt_session_type type)
+struct bnxt *
+bnxt_pmd_get_bp(uint16_t port)
{
- return (type >= BNXT_SESSION_TYPE_LAST) ?
- &bp->tfp[BNXT_SESSION_TYPE_REGULAR] : &bp->tfp[type];
+ struct bnxt *bp;
+ struct rte_eth_dev *dev;
+
+ if (!rte_eth_dev_is_valid_port(port)) {
+ PMD_DRV_LOG(ERR, "Invalid port %d\n", port);
+ return NULL;
+ }
+
+ dev = &rte_eth_devices[port];
+ if (!is_bnxt_supported(dev)) {
+ PMD_DRV_LOG(ERR, "Device %d not supported\n", port);
+ return NULL;
+ }
+
+ bp = (struct bnxt *)dev->data->dev_private;
+ if (!BNXT_TRUFLOW_EN(bp)) {
+ PMD_DRV_LOG(ERR, "TRUFLOW not enabled\n");
+ return NULL;
+ }
+
+ return bp;
}
/* check if ULP should be enabled or not */
@@ -6830,7 +6917,7 @@ static bool bnxt_enable_ulp(struct bnxt *bp)
/* not enabling ulp for cli and no truflow apps */
if (BNXT_TRUFLOW_EN(bp) && bp->app_id != 254 &&
bp->app_id != 255) {
- if (BNXT_CHIP_P7(bp))
+ if (BNXT_CHIP_P7(bp) && !mpc)
return false;
return true;
}
@@ -1247,6 +1247,7 @@ bnxt_vnic_rss_cfg_update(struct bnxt *bp,
RTE_FLOW_ERROR_TYPE_ACTION,
act,
"VNIC RSS configure failed");
+ vnic->rss_types_local = 0;
rc = -rte_errno;
goto ret;
}
@@ -1698,8 +1699,10 @@ bnxt_validate_and_parse_flow(struct rte_eth_dev *dev,
}
if (rte_errno) {
- if (vnic && STAILQ_EMPTY(&vnic->filter))
+ if (vnic && STAILQ_EMPTY(&vnic->filter)) {
vnic->rx_queue_cnt = 0;
+ vnic->rss_types_local = 0;
+ }
if (rxq && !vnic->rx_queue_cnt)
rxq->vnic = &bp->vnic_info[0];
@@ -375,6 +375,25 @@ bnxt_get_ring_info_by_id(struct bnxt *bp, uint16_t rid, uint16_t type)
return txq->cp_ring;
}
}
+
+ /* MPC ring is of type TX. MPC is not allocated on Thor, Wh+. */
+ if (bp->mpc == NULL)
+ goto skip_mpc;
+
+ for (i = 0; i < BNXT_MPC_CHNL_MAX; i++) {
+ struct bnxt_mpc_txq *mpc_queue;
+
+ if (!(bp->mpc->mpc_chnls_en & (1 << i)))
+ continue;
+ mpc_queue = bp->mpc->mpc_txq[i];
+ if (!mpc_queue)
+ continue;
+
+ if (mpc_queue->cp_ring->cp_ring_struct->fw_ring_id ==
+ rte_cpu_to_le_16(rid))
+ return mpc_queue->cp_ring;
+ }
+skip_mpc:
break;
default:
return cp_ring;
@@ -410,7 +429,7 @@ bnxt_check_cq_hwrm_done(struct bnxt_cp_ring_info *cpr,
*/
if (!done && timeout) {
done = 1;
- PMD_DRV_LOG(DEBUG, "Timing out for %s ring\n",
+ PMD_DRV_LOG(ERR, "Timing out for %s ring\n",
rx ? "Rx" : "Tx");
}
} else {
@@ -980,6 +999,7 @@ static int bnxt_hwrm_ptp_qcfg(struct bnxt *bp)
HWRM_CHECK_RESULT();
+ /* TODO Revisit for Thor 2 */
if (BNXT_CHIP_P5(bp)) {
if (!(resp->flags & HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_HWRM_ACCESS))
return 0;
@@ -1180,6 +1200,23 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
if (BNXT_CHIP_P7(bp))
bp->fw_cap |= BNXT_FW_CAP_BACKING_STORE_V2;
}
+
+ /* only initialize the mpc capability one time */
+ if (resp->mpc_chnls_cap && !bp->mpc) {
+ struct bnxt_mpc *mpc;
+
+ mpc = rte_zmalloc("bnxt_mpc", sizeof(*mpc), 0);
+ if (!mpc) {
+ /* no impact to basic NIC functionalities. Truflow
+ * will be disabled if mpc is not setup.
+ */
+ PMD_DRV_LOG(ERR, "Fail allocate mpc memory\n");
+ } else {
+ mpc->mpc_chnls_cap = resp->mpc_chnls_cap;
+ bp->mpc = mpc;
+ }
+ }
+
if (!(flags & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VLAN_ACCELERATION_TX_DISABLED)) {
bp->fw_cap |= BNXT_FW_CAP_VLAN_TX_INSERT;
PMD_DRV_LOG(DEBUG, "VLAN acceleration for TX is enabled\n");
@@ -1411,6 +1448,7 @@ int bnxt_hwrm_func_reserve_vf_resc(struct bnxt *bp, bool test)
uint32_t enables;
struct hwrm_func_vf_cfg_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_func_vf_cfg_input req = {0};
+ uint8_t mpc_ring_cnt = bp->mpc ? BNXT_MPC_RINGS_SUPPORTED : 0;
HWRM_PREP(&req, HWRM_FUNC_VF_CFG, BNXT_USE_CHIMP_MB);
@@ -1425,13 +1463,16 @@ int bnxt_hwrm_func_reserve_vf_resc(struct bnxt *bp, bool test)
req.num_hw_ring_grps = rte_cpu_to_le_16(bp->rx_nr_rings);
}
- req.num_tx_rings = rte_cpu_to_le_16(bp->tx_nr_rings);
+ req.num_tx_rings = rte_cpu_to_le_16(bp->tx_nr_rings + mpc_ring_cnt);
req.num_rx_rings = rte_cpu_to_le_16(bp->rx_nr_rings *
AGG_RING_MULTIPLIER);
- req.num_stat_ctxs = rte_cpu_to_le_16(bp->rx_nr_rings + bp->tx_nr_rings);
+ req.num_stat_ctxs = rte_cpu_to_le_16(bp->rx_nr_rings +
+ bp->tx_nr_rings +
+ mpc_ring_cnt);
req.num_cmpl_rings = rte_cpu_to_le_16(bp->rx_nr_rings +
bp->tx_nr_rings +
- BNXT_NUM_ASYNC_CPR(bp));
+ BNXT_NUM_ASYNC_CPR(bp) +
+ mpc_ring_cnt);
if (BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp)) {
req.num_vnics = rte_cpu_to_le_16(RTE_MIN(BNXT_VNIC_MAX_SUPPORTED_ID,
bp->max_vnics));
@@ -1597,6 +1638,7 @@ int bnxt_hwrm_ver_get(struct bnxt *bp, uint32_t timeout)
RTE_VERIFY(max_resp_len <= bp->max_resp_len);
bp->max_resp_len = max_resp_len;
+ bp->chip_rev = resp->chip_rev;
if ((dev_caps_cfg &
HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED) &&
@@ -2086,6 +2128,13 @@ int bnxt_hwrm_queue_qportcfg(struct bnxt *bp)
return rc;
}
+static const uint8_t
+mpc_chnl_types[] = {HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_TCE,
+ HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_RCE,
+ HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_TE_CFA,
+ HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_RE_CFA,
+ HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_PRIMATE};
+
int bnxt_hwrm_ring_alloc(struct bnxt *bp,
struct bnxt_ring *ring,
uint32_t ring_type, uint32_t map_index,
@@ -2112,7 +2161,21 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp,
req.ring_type = ring_type;
req.cmpl_ring_id = rte_cpu_to_le_16(cmpl_ring_id);
req.stat_ctx_id = rte_cpu_to_le_32(stats_ctx_id);
- req.queue_id = rte_cpu_to_le_16(tx_cosq_id);
+ if (bp->fw_cap & BNXT_FW_CAP_TX_COAL_CMPL)
+ req.cmpl_coal_cnt =
+ HWRM_RING_ALLOC_INPUT_CMPL_COAL_CNT_COAL_OFF;
+ if (tx_cosq_id != MPC_HW_COS_ID) {
+ req.queue_id = rte_cpu_to_le_16(tx_cosq_id);
+ } else {
+ uint32_t mpc_chnl = BNXT_MPC_CHNL(map_index);
+
+ req.logical_id =
+ rte_cpu_to_le_16(BNXT_MPC_QIDX(map_index));
+ if (mpc_chnl >= BNXT_MPC_CHNL_MAX)
+ return -EINVAL;
+ enables |= HWRM_RING_ALLOC_INPUT_ENABLES_MPC_CHNLS_TYPE;
+ req.mpc_chnls_type = mpc_chnl_types[mpc_chnl];
+ }
if (stats_ctx_id != INVALID_STATS_CTX_ID)
enables |=
HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID;
@@ -2848,6 +2911,10 @@ bnxt_hwrm_vnic_rss_cfg_hash_mode_p5(struct bnxt *bp, struct bnxt_vnic_info *vnic
(!BNXT_CHIP_P5(bp) && !(bp->vnic_cap_flags & BNXT_VNIC_CAP_OUTER_RSS)))
return 0;
+ /* TODO Revisit for Thor 2 */
+ /* if (BNXT_CHIP_P5_P7(bp))
+ * bnxt_hwrm_vnic_rss_cfg_p5(bp, vnic);
+ */
/* Don't call RSS hash level configuration if the current
* hash level is the same as the hash level that is requested.
*/
@@ -3274,7 +3341,8 @@ void bnxt_free_nq_ring(struct bnxt *bp, struct bnxt_cp_ring_info *cpr)
{
struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
- bnxt_hwrm_ring_free(bp, cp_ring,
+ bnxt_hwrm_ring_free(bp,
+ cp_ring,
HWRM_RING_FREE_INPUT_RING_TYPE_NQ,
INVALID_HW_RING_ID);
memset(cpr->cp_desc_ring, 0,
@@ -3284,9 +3352,15 @@ void bnxt_free_nq_ring(struct bnxt *bp, struct bnxt_cp_ring_info *cpr)
void bnxt_free_cp_ring(struct bnxt *bp, struct bnxt_cp_ring_info *cpr)
{
- struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
+ struct bnxt_ring *cp_ring;
+
+ cp_ring = cpr ? cpr->cp_ring_struct : NULL;
- bnxt_hwrm_ring_free(bp, cp_ring,
+ if (cp_ring == NULL || cpr->cp_desc_ring == NULL)
+ return;
+
+ bnxt_hwrm_ring_free(bp,
+ cp_ring,
HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL,
INVALID_HW_RING_ID);
memset(cpr->cp_desc_ring, 0,
@@ -4194,6 +4268,27 @@ int bnxt_hwrm_parent_pf_qcfg(struct bnxt *bp)
return 0;
}
+static int bnxt_hwrm_set_tpa(struct bnxt *bp)
+{
+ struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
+ uint64_t rx_offloads = dev_conf->rxmode.offloads;
+ bool tpa_flags = 0;
+ int rc, i;
+
+ tpa_flags = (rx_offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) ? true : false;
+ for (i = 0; i < bp->max_vnics; i++) {
+ struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
+
+ if (vnic->fw_vnic_id == INVALID_HW_RING_ID)
+ continue;
+
+ rc = bnxt_hwrm_vnic_tpa_cfg(bp, vnic, tpa_flags);
+ if (rc)
+ return rc;
+ }
+ return 0;
+}
+
int bnxt_hwrm_get_dflt_vnic_svif(struct bnxt *bp, uint16_t fid,
uint16_t *vnic_id, uint16_t *svif)
{
@@ -4218,6 +4313,8 @@ int bnxt_hwrm_get_dflt_vnic_svif(struct bnxt *bp, uint16_t fid,
HWRM_UNLOCK();
+ bnxt_hwrm_set_tpa(bp);
+
return rc;
}
@@ -4764,27 +4861,6 @@ int bnxt_hwrm_pf_evb_mode(struct bnxt *bp)
return rc;
}
-static int bnxt_hwrm_set_tpa(struct bnxt *bp)
-{
- struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
- uint64_t rx_offloads = dev_conf->rxmode.offloads;
- bool tpa_flags = 0;
- int rc, i;
-
- tpa_flags = (rx_offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) ? true : false;
- for (i = 0; i < bp->max_vnics; i++) {
- struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
-
- if (vnic->fw_vnic_id == INVALID_HW_RING_ID)
- continue;
-
- rc = bnxt_hwrm_vnic_tpa_cfg(bp, vnic, tpa_flags);
- if (rc)
- return rc;
- }
- return 0;
-}
-
int bnxt_hwrm_tunnel_dst_port_alloc(struct bnxt *bp, uint16_t port,
uint8_t tunnel_type)
{
@@ -5190,6 +5266,34 @@ int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, uint16_t target_id,
return rc;
}
+int bnxt_hwrm_fwd_resp(struct bnxt *bp, uint16_t target_id,
+ void *encaped, size_t ec_size,
+ uint64_t encap_resp_addr, uint16_t cmpl_ring)
+{
+ int rc = 0;
+ struct hwrm_fwd_resp_input req = {.req_type = 0};
+ struct hwrm_fwd_resp_output *resp = bp->hwrm_cmd_resp_addr;
+
+ if (ec_size > sizeof(req.encap_resp))
+ return -1;
+
+ HWRM_PREP(&req, HWRM_FWD_RESP, BNXT_USE_CHIMP_MB);
+
+ req.target_id = rte_cpu_to_le_16(target_id);
+ req.encap_resp_target_id = rte_cpu_to_le_16(target_id);
+ req.encap_resp_len = rte_cpu_to_le_16(ec_size);
+ req.encap_resp_addr = encap_resp_addr;
+ req.encap_resp_cmpl_ring = cmpl_ring;
+ memcpy(req.encap_resp, encaped, ec_size);
+
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
+
+ HWRM_CHECK_RESULT();
+ HWRM_UNLOCK();
+
+ return rc;
+}
+
static void bnxt_update_prev_stat(uint64_t *cntr, uint64_t *prev_cntr)
{
/* One of the HW stat values that make up this counter was zero as
@@ -7436,7 +7540,8 @@ void bnxt_free_hwrm_tx_ring(struct bnxt *bp, int queue_index)
struct bnxt_ring *ring = txr->tx_ring_struct;
struct bnxt_cp_ring_info *cpr = txq->cp_ring;
- bnxt_hwrm_ring_free(bp, ring,
+ bnxt_hwrm_ring_free(bp,
+ ring,
HWRM_RING_FREE_INPUT_RING_TYPE_TX,
cpr->cp_ring_struct->fw_ring_id);
txr->tx_raw_prod = 0;
@@ -7576,3 +7681,56 @@ int bnxt_hwrm_tf_oem_cmd(struct bnxt *bp,
return rc;
}
+
+int
+bnxt_hwrm_vnic_update(struct bnxt *bp,
+ struct bnxt_vnic_info *vnic,
+ uint8_t valid)
+{
+ struct hwrm_vnic_update_input req = {0};
+ struct hwrm_vnic_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
+ int rc;
+
+ HWRM_PREP(&req, HWRM_VNIC_UPDATE, BNXT_USE_CHIMP_MB);
+
+ req.vnic_id = rte_cpu_to_le_32(vnic->fw_vnic_id);
+
+ if (valid & HWRM_VNIC_UPDATE_INPUT_ENABLES_METADATA_FORMAT_TYPE_VALID)
+ req.metadata_format_type = vnic->metadata_format;
+ if (valid & HWRM_VNIC_UPDATE_INPUT_ENABLES_VNIC_STATE_VALID)
+ req.vnic_state = vnic->state;
+ if (valid & HWRM_VNIC_UPDATE_INPUT_ENABLES_MRU_VALID)
+ req.mru = rte_cpu_to_le_16(vnic->mru);
+
+ req.enables = rte_cpu_to_le_32(valid);
+
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
+
+ HWRM_CHECK_RESULT();
+ HWRM_UNLOCK();
+
+ return rc;
+}
+
+int
+bnxt_hwrm_release_afm_func(struct bnxt *bp, uint16_t fid, uint16_t rfid,
+ uint8_t type, uint32_t flags)
+{
+ int rc = 0;
+ struct hwrm_cfa_release_afm_func_input req = { 0 };
+ struct hwrm_cfa_release_afm_func_output *resp = bp->hwrm_cmd_resp_addr;
+
+ HWRM_PREP(&req, HWRM_CFA_RELEASE_AFM_FUNC, BNXT_USE_CHIMP_MB);
+
+ req.fid = rte_le_to_cpu_16(fid);
+ req.rfid = rte_le_to_cpu_16(rfid);
+ req.flags = rte_le_to_cpu_32(flags);
+ req.type = type;
+
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
+
+ HWRM_CHECK_RESULT();
+ HWRM_UNLOCK();
+
+ return rc;
+}
@@ -193,6 +193,9 @@ int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, uint16_t target_id,
void *encaped, size_t ec_size);
int bnxt_hwrm_reject_fwd_resp(struct bnxt *bp, uint16_t target_id,
void *encaped, size_t ec_size);
+int bnxt_hwrm_fwd_resp(struct bnxt *bp, uint16_t target_id,
+ void *encaped, size_t ec_size,
+ uint64_t encap_resp_addr, uint16_t cmpl_ring);
int bnxt_hwrm_func_buf_rgtr(struct bnxt *bp, int num_vfs);
int bnxt_hwrm_func_buf_unrgtr(struct bnxt *bp);
@@ -241,6 +244,9 @@ int bnxt_hwrm_vnic_plcmode_cfg(struct bnxt *bp,
struct bnxt_vnic_info *vnic);
int bnxt_hwrm_vnic_tpa_cfg(struct bnxt *bp,
struct bnxt_vnic_info *vnic, bool enable);
+int bnxt_hwrm_vnic_update(struct bnxt *bp,
+ struct bnxt_vnic_info *vnic,
+ uint8_t valid);
int bnxt_clear_all_hwrm_stat_ctxs(struct bnxt *bp);
int bnxt_alloc_all_hwrm_ring_grps(struct bnxt *bp);
@@ -384,4 +390,9 @@ int bnxt_hwrm_tf_oem_cmd(struct bnxt *bp,
uint16_t in_len,
uint32_t *out,
uint16_t out_len);
+int bnxt_hwrm_release_afm_func(struct bnxt *bp,
+ uint16_t fid,
+ uint16_t rfid,
+ uint8_t type,
+ uint32_t flags);
#endif
@@ -324,20 +324,21 @@ static int bnxt_tf_vfr_alloc(struct rte_eth_dev *vfr_ethdev)
struct bnxt *parent_bp = parent_dev->data->dev_private;
if (!parent_bp || !parent_bp->ulp_ctx) {
- BNXT_TF_DBG(ERR, "Invalid arguments\n");
+ PMD_DRV_LOG(ERR, "Invalid arguments\n");
return 0;
}
/* update the port id so you can backtrack to ethdev */
vfr->dpdk_port_id = vfr_ethdev->data->port_id;
/* If pair is present, then delete the pair */
- if (bnxt_hwrm_cfa_pair_exists(parent_bp, vfr))
- (void)bnxt_hwrm_cfa_pair_free(parent_bp, vfr);
+ if (!BNXT_CHIP_P7(parent_bp))
+ if (bnxt_hwrm_cfa_pair_exists(parent_bp, vfr))
+ (void)bnxt_hwrm_cfa_pair_free(parent_bp, vfr);
/* Update the ULP portdata base with the new VFR interface */
rc = ulp_port_db_port_update(parent_bp->ulp_ctx, vfr_ethdev);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to update ulp port details vfr:%u\n",
+ PMD_DRV_LOG(ERR, "Failed to update ulp port details vfr:%u\n",
vfr->vf_id);
return rc;
}
@@ -345,21 +346,39 @@ static int bnxt_tf_vfr_alloc(struct rte_eth_dev *vfr_ethdev)
/* Create the default rules for the VFR */
rc = bnxt_ulp_create_vfr_default_rules(vfr_ethdev);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to create VFR default rules vfr:%u\n",
+ PMD_DRV_LOG(ERR, "Failed to create VFR default rules vfr:%u\n",
vfr->vf_id);
return rc;
}
/* update the port id so you can backtrack to ethdev */
vfr->dpdk_port_id = vfr_ethdev->data->port_id;
- rc = bnxt_hwrm_cfa_pair_alloc(parent_bp, vfr);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed in hwrm vfr alloc vfr:%u rc=%d\n",
+ if (BNXT_CHIP_P7(parent_bp)) {
+ rc = bnxt_hwrm_release_afm_func(parent_bp,
+ vfr->fw_fid,
+ parent_bp->fw_fid,
+ HWRM_CFA_RELEASE_AFM_FUNC_INPUT_TYPE_RFID,
+ 0);
+
+ if (rc)
+ PMD_DRV_LOG(ERR,
+ "Failed in hwrm release afm func:%u rc=%d\n",
vfr->vf_id, rc);
- (void)bnxt_ulp_delete_vfr_default_rules(vfr);
+ } else {
+ rc = bnxt_hwrm_cfa_pair_alloc(parent_bp, vfr);
+ if (rc)
+ PMD_DRV_LOG(ERR,
+ "Failed in hwrm vfr alloc vfr:%u rc=%d\n",
+ vfr->vf_id, rc);
}
- BNXT_TF_DBG(DEBUG, "BNXT Port:%d VFR created and initialized\n",
- vfr->dpdk_port_id);
+
+ if (rc)
+ (void)bnxt_ulp_delete_vfr_default_rules(vfr);
+ else
+ PMD_DRV_LOG(DEBUG,
+ "BNXT Port:%d VFR created and initialized\n",
+ vfr->dpdk_port_id);
+
return rc;
}
@@ -444,7 +463,7 @@ int bnxt_rep_dev_start_op(struct rte_eth_dev *eth_dev)
parent_bp = rep_bp->parent_dev->data->dev_private;
rep_info = &parent_bp->rep_info[rep_bp->vf_id];
- BNXT_TF_DBG(DEBUG, "BNXT Port:%d VFR start\n", eth_dev->data->port_id);
+ PMD_DRV_LOG(DEBUG, "BNXT Port:%d VFR start\n", eth_dev->data->port_id);
pthread_mutex_lock(&rep_info->vfr_start_lock);
if (!rep_info->conduit_valid) {
rc = bnxt_get_dflt_vnic_svif(parent_bp, rep_bp);
@@ -470,7 +489,7 @@ int bnxt_rep_dev_start_op(struct rte_eth_dev *eth_dev)
static int bnxt_tf_vfr_free(struct bnxt_representor *vfr)
{
- BNXT_TF_DBG(DEBUG, "BNXT Port:%d VFR ulp free\n", vfr->dpdk_port_id);
+ PMD_DRV_LOG(DEBUG, "BNXT Port:%d VFR ulp free\n", vfr->dpdk_port_id);
return bnxt_ulp_delete_vfr_default_rules(vfr);
}
@@ -507,7 +526,8 @@ static int bnxt_vfr_free(struct bnxt_representor *vfr)
vfr->vf_id);
vfr->vfr_tx_cfa_action = 0;
- rc = bnxt_hwrm_cfa_pair_free(parent_bp, vfr);
+ if (!BNXT_CHIP_P7(parent_bp))
+ rc = bnxt_hwrm_cfa_pair_free(parent_bp, vfr);
return rc;
}
@@ -519,7 +539,7 @@ int bnxt_rep_dev_stop_op(struct rte_eth_dev *eth_dev)
/* Avoid crashes as we are about to free queues */
bnxt_stop_rxtx(eth_dev);
- BNXT_TF_DBG(DEBUG, "BNXT Port:%d VFR stop\n", eth_dev->data->port_id);
+ PMD_DRV_LOG(DEBUG, "BNXT Port:%d VFR stop\n", eth_dev->data->port_id);
bnxt_vfr_free(vfr_bp);
@@ -533,7 +553,7 @@ int bnxt_rep_dev_stop_op(struct rte_eth_dev *eth_dev)
int bnxt_rep_dev_close_op(struct rte_eth_dev *eth_dev)
{
- BNXT_TF_DBG(DEBUG, "BNXT Port:%d VFR close\n", eth_dev->data->port_id);
+ PMD_DRV_LOG(DEBUG, "BNXT Port:%d VFR close\n", eth_dev->data->port_id);
bnxt_representor_uninit(eth_dev);
return 0;
}
@@ -706,8 +726,13 @@ int bnxt_rep_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
return 0;
out:
- if (rxq)
+ if (rxq) {
+ #if (RTE_VERSION_NUM(21, 8, 0, 0) < RTE_VERSION)
bnxt_rep_rx_queue_release_op(eth_dev, queue_idx);
+ #else
+ bnxt_rx_queue_release_op(rxq);
+ #endif
+ }
return rc;
}
@@ -19,9 +19,8 @@
#include "bnxt_rxq.h"
#include "hsi_struct_def_dpdk.h"
#include "bnxt_hwrm.h"
-
-#include <bnxt_tf_common.h>
-#include <ulp_mark_mgr.h>
+#include "bnxt_tf_common.h"
+#include "ulp_mark_mgr.h"
/*
* RX Ring handling
@@ -522,6 +522,13 @@ static void bnxt_tx_cmp(struct bnxt_tx_queue *txq, int nr_pkts)
txr->tx_raw_cons = raw_cons;
}
+static bool bnxt_is_tx_cmpl_type(uint16_t type)
+{
+ return (type == CMPL_BASE_TYPE_TX_L2_PKT_TS ||
+ type == CMPL_BASE_TYPE_TX_L2_COAL ||
+ type == CMPL_BASE_TYPE_TX_L2);
+}
+
static int bnxt_handle_tx_cp(struct bnxt_tx_queue *txq)
{
uint32_t nb_tx_pkts = 0, cons, ring_mask, opaque;
@@ -545,7 +552,7 @@ static int bnxt_handle_tx_cp(struct bnxt_tx_queue *txq)
opaque = rte_le_to_cpu_32(txcmp->opaque);
- if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2)
+ if (bnxt_is_tx_cmpl_type(CMP_TYPE(txcmp)))
nb_tx_pkts += opaque;
else
RTE_LOG_DP(ERR, BNXT,
@@ -637,6 +644,16 @@ int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
if (rc)
return rc;
+ /* reset the previous stats for the tx_queue since the counters
+ * will be cleared when the queue is started.
+ */
+ if (BNXT_TPA_V2_P7(bp))
+ memset(&bp->prev_tx_ring_stats_ext[tx_queue_id], 0,
+ sizeof(struct bnxt_ring_stats));
+ else
+ memset(&bp->prev_tx_ring_stats[tx_queue_id], 0,
+ sizeof(struct bnxt_ring_stats));
+
dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
txq->tx_started = true;
PMD_DRV_LOG(DEBUG, "Tx queue started\n");
@@ -664,6 +681,15 @@ int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
return 0;
}
+static bool bnxt_is_tx_mpc_flush_cmpl_type(uint16_t type)
+{
+ return (type == CMPL_BASE_TYPE_TX_L2_PKT_TS ||
+ type == CMPL_BASE_TYPE_TX_L2_COAL ||
+ type == CMPL_BASE_TYPE_TX_L2 ||
+ type == CMPL_BASE_TYPE_MID_PATH_SHORT ||
+ type == CMPL_BASE_TYPE_MID_PATH_LONG);
+}
+
/* Sweep the Tx completion queue till HWRM_DONE for ring flush is received.
* The mbufs will not be freed in this call.
* They will be freed during ring free as a part of mem cleanup.
@@ -689,7 +715,7 @@ int bnxt_flush_tx_cmp(struct bnxt_cp_ring_info *cpr)
opaque = rte_cpu_to_le_32(txcmp->opaque);
raw_cons = NEXT_RAW_CMP(raw_cons);
- if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2)
+ if (bnxt_is_tx_mpc_flush_cmpl_type(CMP_TYPE(txcmp)))
nb_tx_pkts += opaque;
else if (CMP_TYPE(txcmp) == HWRM_CMPL_TYPE_HWRM_DONE)
return 1;
@@ -81,6 +81,8 @@ struct bnxt_vnic_info {
uint8_t ring_select_mode;
enum rte_eth_hash_function hash_f_local;
uint64_t rss_types_local;
+ uint8_t metadata_format;
+ uint8_t state;
};
struct bnxt_vnic_queue_db {
@@ -11,9 +11,13 @@
#include "bnxt_ulp.h"
#include "ulp_template_db_enum.h"
-#define BNXT_TF_DBG(lvl, fmt, args...) PMD_DRV_LOG(lvl, fmt, ## args)
+#define BNXT_DRV_DBG(lvl, fmt, args...) PMD_DRV_LOG(lvl, fmt, ## args)
-#define BNXT_TF_INF(fmt, args...)
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+#define BNXT_DRV_INF(fmt, args...) PMD_DRV_LOG(INFO, fmt, ## args)
+#else
+#define BNXT_DRV_INF(fmt, args...)
+#endif
#define BNXT_ULP_EM_FLOWS 8192
#define BNXT_ULP_1M_FLOWS 1000000
@@ -68,4 +72,5 @@ bnxt_ulp_cntxt_ptr2_mark_db_get(struct bnxt_ulp_context *ulp_ctx);
int32_t
bnxt_ulp_cntxt_ptr2_mark_db_set(struct bnxt_ulp_context *ulp_ctx,
struct bnxt_ulp_mark_tbl *mark_tbl);
+
#endif /* _BNXT_TF_COMMON_H_ */
@@ -57,32 +57,6 @@ bnxt_tunnel_upar_id_get(struct bnxt *bp,
type);
}
-struct bnxt *
-bnxt_pmd_get_bp(uint16_t port)
-{
- struct bnxt *bp;
- struct rte_eth_dev *dev;
-
- if (!rte_eth_dev_is_valid_port(port)) {
- PMD_DRV_LOG(ERR, "Invalid port %d\n", port);
- return NULL;
- }
-
- dev = &rte_eth_devices[port];
- if (!is_bnxt_supported(dev)) {
- PMD_DRV_LOG(ERR, "Device %d not supported\n", port);
- return NULL;
- }
-
- bp = (struct bnxt *)dev->data->dev_private;
- if (!BNXT_TRUFLOW_EN(bp)) {
- PMD_DRV_LOG(ERR, "TRUFLOW not enabled\n");
- return NULL;
- }
-
- return bp;
-}
-
int32_t bnxt_rss_config_action_apply(struct bnxt_ulp_mapper_parms *parms)
{
struct bnxt_vnic_info *vnic = NULL;
@@ -93,20 +67,24 @@ int32_t bnxt_rss_config_action_apply(struct bnxt_ulp_mapper_parms *parms)
uint8_t *rss_key;
struct ulp_rte_act_prop *ap = parms->act_prop;
int32_t rc = -EINVAL;
+ uint8_t rss_func;
bp = bnxt_pmd_get_bp(parms->port_id);
if (bp == NULL) {
- BNXT_TF_DBG(ERR, "Invalid bp for port_id %u\n", parms->port_id);
+ BNXT_DRV_DBG(ERR, "Invalid bp for port_id %u\n",
+ parms->port_id);
return rc;
}
vnic = bnxt_get_default_vnic(bp);
if (vnic == NULL) {
- BNXT_TF_DBG(ERR, "default vnic not available for %u\n",
- parms->port_id);
+ BNXT_DRV_DBG(ERR, "default vnic not available for %u\n",
+ parms->port_id);
return rc;
}
/* get the details */
+ memcpy(&rss_func, &ap->act_details[BNXT_ULP_ACT_PROP_IDX_RSS_FUNC],
+ BNXT_ULP_ACT_PROP_SZ_RSS_FUNC);
memcpy(&rss_types, &ap->act_details[BNXT_ULP_ACT_PROP_IDX_RSS_TYPES],
BNXT_ULP_ACT_PROP_SZ_RSS_TYPES);
memcpy(&rss_level, &ap->act_details[BNXT_ULP_ACT_PROP_IDX_RSS_LEVEL],
@@ -115,9 +93,16 @@ int32_t bnxt_rss_config_action_apply(struct bnxt_ulp_mapper_parms *parms)
BNXT_ULP_ACT_PROP_SZ_RSS_KEY_LEN);
rss_key = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_RSS_KEY];
+ rc = bnxt_rte_flow_to_hwrm_ring_select_mode((enum rte_eth_hash_function)rss_func,
+ rss_types, bp, vnic);
+ if (rc != 0) {
+ BNXT_DRV_DBG(ERR, "Error unsupported rss hash func\n");
+ return rc;
+ }
+
hwrm_type = bnxt_rte_to_hwrm_hash_types(rss_types);
if (!hwrm_type) {
- BNXT_TF_DBG(ERR, "Error unsupported rss config type\n");
+ BNXT_DRV_DBG(ERR, "Error unsupported rss config type\n");
return rc;
}
/* Configure RSS only if the queue count is > 1 */
@@ -129,10 +114,10 @@ int32_t bnxt_rss_config_action_apply(struct bnxt_ulp_mapper_parms *parms)
BNXT_ULP_ACT_PROP_SZ_RSS_KEY);
rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
if (rc) {
- BNXT_TF_DBG(ERR, "Error configuring vnic RSS config\n");
+ BNXT_DRV_DBG(ERR, "Error configuring vnic RSS config\n");
return rc;
}
- BNXT_TF_DBG(INFO, "Rss config successfully applied\n");
+ BNXT_DRV_DBG(INFO, "Rss config successfully applied\n");
}
return 0;
}
@@ -144,7 +129,7 @@ int32_t bnxt_rss_config_action_apply(struct bnxt_ulp_mapper_parms *parms)
static int32_t glob_error_fn(const char *epath, int32_t eerrno)
{
- BNXT_TF_DBG(ERR, "path %s error %d\n", epath, eerrno);
+ BNXT_DRV_DBG(ERR, "path %s error %d\n", epath, eerrno);
return 0;
}
@@ -170,13 +155,13 @@ static int32_t ulp_pmd_get_mac_by_pci(const char *pci_name, uint8_t *mac)
fp = fopen(path, "r");
if (!fp) {
- BNXT_TF_DBG(ERR, "Error in getting bond mac address\n");
+ BNXT_DRV_DBG(ERR, "Error in getting bond mac address\n");
return rc;
}
memset(dev_str, 0, sizeof(dev_str));
if (fgets(dev_str, sizeof(dev_str), fp) == NULL) {
- BNXT_TF_DBG(ERR, "Error in reading %s\n", path);
+ BNXT_DRV_DBG(ERR, "Error in reading %s\n", path);
fclose(fp);
return rc;
}
@@ -198,7 +183,8 @@ int32_t bnxt_pmd_get_parent_mac_addr(struct bnxt_ulp_mapper_parms *parms,
bp = bnxt_pmd_get_bp(parms->port_id);
if (bp == NULL) {
- BNXT_TF_DBG(ERR, "Invalid bp for port_id %u\n", parms->port_id);
+ BNXT_DRV_DBG(ERR, "Invalid bp for port_id %u\n",
+ parms->port_id);
return rc;
}
return ulp_pmd_get_mac_by_pci(bp->pdev->name, &mac[2]);
@@ -424,7 +410,8 @@ int32_t bnxt_pmd_queue_action_create(struct bnxt_ulp_mapper_parms *parms,
bp = bnxt_pmd_get_bp(parms->port_id);
if (bp == NULL) {
- BNXT_TF_DBG(ERR, "Invalid bp for port_id %u\n", parms->port_id);
+ BNXT_DRV_DBG(ERR, "Invalid bp for port_id %u\n",
+ parms->port_id);
return -EINVAL;
}
@@ -434,15 +421,8 @@ int32_t bnxt_pmd_queue_action_create(struct bnxt_ulp_mapper_parms *parms,
return bnxt_vnic_queue_action_alloc(bp, q_index, vnic_idx, vnic_id);
}
-int32_t bnxt_pmd_queue_action_delete(struct tf *tfp, uint16_t vnic_idx)
+int32_t bnxt_pmd_queue_action_delete(struct bnxt *bp, uint16_t vnic_idx)
{
- struct bnxt *bp = NULL;
-
- bp = tfp->bp;
- if (bp == NULL) {
- BNXT_TF_DBG(ERR, "Invalid bp\n");
- return -EINVAL;
- }
return bnxt_vnic_queue_action_free(bp, vnic_idx);
}
@@ -455,12 +435,16 @@ int32_t bnxt_pmd_rss_action_create(struct bnxt_ulp_mapper_parms *parms,
bp = bnxt_pmd_get_bp(parms->port_id);
if (bp == NULL) {
- BNXT_TF_DBG(ERR, "Invalid bp for port_id %u\n", parms->port_id);
+ BNXT_DRV_DBG(ERR, "Invalid bp for port_id %u\n",
+ parms->port_id);
return -EINVAL;
}
/* get the details */
memset(&rss_info, 0, sizeof(rss_info));
+ memcpy(&rss_info.rss_func,
+ &ap->act_details[BNXT_ULP_ACT_PROP_IDX_RSS_FUNC],
+ BNXT_ULP_ACT_PROP_SZ_RSS_FUNC);
memcpy(&rss_info.rss_types,
&ap->act_details[BNXT_ULP_ACT_PROP_IDX_RSS_TYPES],
BNXT_ULP_ACT_PROP_SZ_RSS_TYPES);
@@ -478,7 +462,7 @@ int32_t bnxt_pmd_rss_action_create(struct bnxt_ulp_mapper_parms *parms,
/* Validate the size of the queue list */
if (sizeof(rss_info.queue_list) < BNXT_ULP_ACT_PROP_SZ_RSS_QUEUE) {
- BNXT_TF_DBG(ERR, "Mismatch of RSS queue size in template\n");
+ BNXT_DRV_DBG(ERR, "Mismatch of RSS queue size in template\n");
return -EINVAL;
}
memcpy(rss_info.queue_list,
@@ -488,14 +472,8 @@ int32_t bnxt_pmd_rss_action_create(struct bnxt_ulp_mapper_parms *parms,
return bnxt_vnic_rss_action_alloc(bp, &rss_info, vnic_idx, vnic_id);
}
-int32_t bnxt_pmd_rss_action_delete(struct tf *tfp, uint16_t vnic_idx)
+int32_t bnxt_pmd_rss_action_delete(struct bnxt *bp, uint16_t vnic_idx)
{
- struct bnxt *bp = tfp->bp;
-
- if (bp == NULL) {
- BNXT_TF_DBG(ERR, "Invalid bp\n");
- return -EINVAL;
- }
return bnxt_vnic_rss_action_free(bp, vnic_idx);
}
@@ -563,14 +541,14 @@ bnxt_pmd_global_tunnel_set(uint16_t port_id, uint8_t type,
hwtype = HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_GPE_V6;
break;
default:
- BNXT_TF_DBG(ERR, "Tunnel Type (%d) invalid\n", type);
+ BNXT_DRV_DBG(ERR, "Tunnel Type (%d) invalid\n", type);
return -EINVAL;
}
if (!udp_port) {
/* Free based on the handle */
if (!handle) {
- BNXT_TF_DBG(ERR, "Free with invalid handle\n");
+ BNXT_DRV_DBG(ERR, "Free with invalid handle\n");
return -EINVAL;
}
bnxt_pmd_global_reg_hndl_to_data(*handle, &lport_id,
@@ -578,8 +556,8 @@ bnxt_pmd_global_tunnel_set(uint16_t port_id, uint8_t type,
bp = bnxt_pmd_get_bp(lport_id);
if (!bp) {
- BNXT_TF_DBG(ERR, "Unable to get dev by port %d\n",
- lport_id);
+ BNXT_DRV_DBG(ERR, "Unable to get dev by port %d\n",
+ lport_id);
return -EINVAL;
}
@@ -588,9 +566,9 @@ bnxt_pmd_global_tunnel_set(uint16_t port_id, uint8_t type,
ldport = ulp_global_tunnel_db[ltype].dport;
rc = bnxt_hwrm_tunnel_dst_port_free(bp, ldport, hwtype);
if (rc) {
- BNXT_TF_DBG(ERR,
- "Unable to free tunnel dst port (%d)\n",
- ldport);
+ BNXT_DRV_DBG(ERR,
+ "Unable to free tunnel dst port (%d)\n",
+ ldport);
return rc;
}
ulp_global_tunnel_db[ltype].ref_cnt--;
@@ -599,8 +577,8 @@ bnxt_pmd_global_tunnel_set(uint16_t port_id, uint8_t type,
} else {
bp = bnxt_pmd_get_bp(port_id);
if (!bp) {
- BNXT_TF_DBG(ERR, "Unable to get dev by port %d\n",
- port_id);
+ BNXT_DRV_DBG(ERR, "Unable to get dev by port %d\n",
+ port_id);
return -EINVAL;
}
@@ -638,6 +616,25 @@ static bool bnxt_pmd_get_hot_upgrade_env(void)
return hot_up;
}
+int32_t bnxt_pmd_bd_act_set(uint16_t port_id, uint32_t act)
+{
+ struct rte_eth_dev *eth_dev;
+ int32_t rc = -EINVAL;
+
+ eth_dev = &rte_eth_devices[port_id];
+ if (BNXT_ETH_DEV_IS_REPRESENTOR(eth_dev)) {
+ struct bnxt_representor *vfr = eth_dev->data->dev_private;
+ if (!vfr)
+ return rc;
+ vfr->vfr_tx_cfa_action = act;
+ } else {
+ struct bnxt *bp = eth_dev->data->dev_private;
+ bp->tx_cfa_action = act;
+ }
+
+ return 0;
+}
+
static bool hot_up_api;
static bool hot_up_configured_by_api;
/* There are two ways to configure hot upgrade.
@@ -43,10 +43,10 @@ enum bnxt_ulp_intf_type bnxt_pmd_get_interface_type(uint16_t port);
int32_t bnxt_pmd_set_unicast_rxmask(struct rte_eth_dev *eth_dev);
int32_t bnxt_pmd_queue_action_create(struct bnxt_ulp_mapper_parms *parms,
uint16_t *vnic_idx, uint16_t *vnic_id);
-int32_t bnxt_pmd_queue_action_delete(struct tf *tfp, uint16_t vnic_idx);
+int32_t bnxt_pmd_queue_action_delete(struct bnxt *bp, uint16_t vnic_idx);
int32_t bnxt_pmd_rss_action_create(struct bnxt_ulp_mapper_parms *parms,
uint16_t *vnic_idx, uint16_t *vnic_id);
-int32_t bnxt_pmd_rss_action_delete(struct tf *tfp, uint16_t vnic_idx);
+int32_t bnxt_pmd_rss_action_delete(struct bnxt *bp, uint16_t vnic_idx);
int32_t bnxt_tunnel_dst_port_free(struct bnxt *bp,
uint16_t port,
uint8_t type);
@@ -61,4 +61,8 @@ bnxt_tunnel_upar_id_get(struct bnxt *bp,
uint8_t type,
uint8_t *upar_id);
bool bnxt_pmd_get_hot_up_config(void);
+int32_t ulp_ctx_mh_get_session_name(struct bnxt *bp,
+ struct tf_open_session_parms *parms);
+
+int32_t bnxt_pmd_bd_act_set(uint16_t port_id, uint32_t act);
#endif /* _BNXT_TF_PMD_ABSTRACT_H_ */
@@ -13,6 +13,7 @@
#include "bnxt.h"
#include "bnxt_ulp.h"
#include "bnxt_tf_common.h"
+#include "bnxt_hwrm.h"
#include "hsi_struct_def_dpdk.h"
#include "tf_core.h"
#include "tf_ext_flow_handle.h"
@@ -23,11 +24,13 @@
#include "ulp_fc_mgr.h"
#include "ulp_flow_db.h"
#include "ulp_mapper.h"
+#include "ulp_matcher.h"
#include "ulp_port_db.h"
#include "ulp_tun.h"
#include "ulp_ha_mgr.h"
#include "bnxt_tf_pmd_shim.h"
#include "ulp_template_db_tbl.h"
+#include "ulp_utils.h"
/* Linked list of all TF sessions. */
STAILQ_HEAD(, bnxt_ulp_session_state) bnxt_ulp_session_list =
@@ -43,11 +46,6 @@ TAILQ_HEAD(cntx_list_entry_list, ulp_context_list_entry);
static struct cntx_list_entry_list ulp_cntx_list =
TAILQ_HEAD_INITIALIZER(ulp_cntx_list);
-/* Static function declarations */
-static int32_t bnxt_ulp_cntxt_list_init(void);
-static int32_t bnxt_ulp_cntxt_list_add(struct bnxt_ulp_context *ulp_ctx);
-static void bnxt_ulp_cntxt_list_del(struct bnxt_ulp_context *ulp_ctx);
-
bool
ulp_is_default_session_active(struct bnxt_ulp_context *ulp_ctx)
{
@@ -56,6 +54,7 @@ ulp_is_default_session_active(struct bnxt_ulp_context *ulp_ctx)
return true;
}
+
/*
* Allow the deletion of context only for the bnxt device that
* created the session.
@@ -67,17 +66,22 @@ ulp_ctx_deinit_allowed(struct bnxt_ulp_context *ulp_ctx)
return false;
if (!ulp_ctx->cfg_data->ref_cnt) {
- BNXT_TF_DBG(DEBUG, "ulp ctx shall initiate deinit\n");
+ BNXT_DRV_DBG(DEBUG, "ulp ctx shall initiate deinit\n");
return true;
}
return false;
}
-static int32_t
+int32_t
bnxt_ulp_devid_get(struct bnxt *bp,
enum bnxt_ulp_device_id *ulp_dev_id)
{
+ if (BNXT_CHIP_P7(bp)) {
+ *ulp_dev_id = BNXT_ULP_DEVICE_ID_THOR2;
+ return 0;
+ }
+
if (BNXT_CHIP_P5(bp)) {
*ulp_dev_id = BNXT_ULP_DEVICE_ID_THOR;
return 0;
@@ -86,7 +90,7 @@ bnxt_ulp_devid_get(struct bnxt *bp,
if (BNXT_STINGRAY(bp))
*ulp_dev_id = BNXT_ULP_DEVICE_ID_STINGRAY;
else
- /* Assuming P4 */
+ /* Assuming Whitney */
*ulp_dev_id = BNXT_ULP_DEVICE_ID_WH_PLUS;
return 0;
@@ -112,7 +116,7 @@ bnxt_ulp_shared_act_info_get(uint32_t *num_entries)
return ulp_shared_act_info;
}
-static struct bnxt_ulp_resource_resv_info *
+struct bnxt_ulp_resource_resv_info *
bnxt_ulp_app_resource_resv_list_get(uint32_t *num_entries)
{
if (num_entries == NULL)
@@ -139,365 +143,9 @@ bnxt_ulp_app_glb_resource_info_list_get(uint32_t *num_entries)
return ulp_app_glb_resource_tbl;
}
-static int32_t
-bnxt_ulp_named_resources_calc(struct bnxt_ulp_context *ulp_ctx,
- struct bnxt_ulp_glb_resource_info *info,
- uint32_t num,
- enum bnxt_ulp_session_type stype,
- struct tf_session_resources *res)
-{
- uint32_t dev_id = BNXT_ULP_DEVICE_ID_LAST, res_type, i;
- enum tf_dir dir;
- uint8_t app_id;
- int32_t rc = 0;
-
- if (ulp_ctx == NULL || info == NULL || res == NULL || num == 0) {
- BNXT_TF_DBG(ERR, "Invalid parms to named resources calc.\n");
- return -EINVAL;
- }
-
- rc = bnxt_ulp_cntxt_app_id_get(ulp_ctx, &app_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get the app id from ulp.\n");
- return -EINVAL;
- }
-
- rc = bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &dev_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get the dev id from ulp.\n");
- return -EINVAL;
- }
-
- for (i = 0; i < num; i++) {
- if (dev_id != info[i].device_id || app_id != info[i].app_id)
- continue;
- /* check to see if the session type matches only then include */
- if ((stype || info[i].session_type) &&
- !(info[i].session_type & stype))
- continue;
-
- dir = info[i].direction;
- res_type = info[i].resource_type;
-
- switch (info[i].resource_func) {
- case BNXT_ULP_RESOURCE_FUNC_IDENTIFIER:
- res->ident_cnt[dir].cnt[res_type]++;
- break;
- case BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE:
- res->tbl_cnt[dir].cnt[res_type]++;
- break;
- case BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE:
- res->tcam_cnt[dir].cnt[res_type]++;
- break;
- case BNXT_ULP_RESOURCE_FUNC_EM_TABLE:
- res->em_cnt[dir].cnt[res_type]++;
- break;
- default:
- BNXT_TF_DBG(ERR, "Unknown resource func (0x%x)\n,",
- info[i].resource_func);
- continue;
- }
- }
-
- return 0;
-}
-
-static int32_t
-bnxt_ulp_unnamed_resources_calc(struct bnxt_ulp_context *ulp_ctx,
- struct bnxt_ulp_resource_resv_info *info,
- uint32_t num,
- enum bnxt_ulp_session_type stype,
- struct tf_session_resources *res)
-{
- uint32_t dev_id, res_type, i;
- enum tf_dir dir;
- uint8_t app_id;
- int32_t rc = 0;
-
- if (ulp_ctx == NULL || res == NULL || info == NULL || num == 0) {
- BNXT_TF_DBG(ERR, "Invalid arguments to get resources.\n");
- return -EINVAL;
- }
-
- rc = bnxt_ulp_cntxt_app_id_get(ulp_ctx, &app_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get the app id from ulp.\n");
- return -EINVAL;
- }
-
- rc = bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &dev_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get the dev id from ulp.\n");
- return -EINVAL;
- }
-
- for (i = 0; i < num; i++) {
- if (app_id != info[i].app_id || dev_id != info[i].device_id)
- continue;
-
- /* check to see if the session type matches only then include */
- if ((stype || info[i].session_type) &&
- !(info[i].session_type & stype))
- continue;
-
- dir = info[i].direction;
- res_type = info[i].resource_type;
-
- switch (info[i].resource_func) {
- case BNXT_ULP_RESOURCE_FUNC_IDENTIFIER:
- res->ident_cnt[dir].cnt[res_type] = info[i].count;
- break;
- case BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE:
- res->tbl_cnt[dir].cnt[res_type] = info[i].count;
- break;
- case BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE:
- res->tcam_cnt[dir].cnt[res_type] = info[i].count;
- break;
- case BNXT_ULP_RESOURCE_FUNC_EM_TABLE:
- res->em_cnt[dir].cnt[res_type] = info[i].count;
- break;
- default:
- break;
- }
- }
- return 0;
-}
-
-static int32_t
-bnxt_ulp_tf_resources_get(struct bnxt_ulp_context *ulp_ctx,
- enum bnxt_ulp_session_type stype,
- struct tf_session_resources *res)
-{
- struct bnxt_ulp_resource_resv_info *unnamed = NULL;
- uint32_t unum;
- int32_t rc = 0;
-
- if (ulp_ctx == NULL || res == NULL) {
- BNXT_TF_DBG(ERR, "Invalid arguments to get resources.\n");
- return -EINVAL;
- }
-
- /* use DEFAULT_NON_HA instead of DEFAULT resources if HA is disabled */
- if (ULP_APP_HA_IS_DYNAMIC(ulp_ctx))
- stype = ulp_ctx->cfg_data->def_session_type;
-
- unnamed = bnxt_ulp_resource_resv_list_get(&unum);
- if (unnamed == NULL) {
- BNXT_TF_DBG(ERR, "Unable to get resource resv list.\n");
- return -EINVAL;
- }
-
- rc = bnxt_ulp_unnamed_resources_calc(ulp_ctx, unnamed, unum, stype,
- res);
- if (rc)
- BNXT_TF_DBG(ERR, "Unable to calc resources for session.\n");
-
- return rc;
-}
-
-static int32_t
-bnxt_ulp_tf_shared_session_resources_get(struct bnxt_ulp_context *ulp_ctx,
- enum bnxt_ulp_session_type stype,
- struct tf_session_resources *res)
-{
- struct bnxt_ulp_resource_resv_info *unnamed;
- struct bnxt_ulp_glb_resource_info *named;
- uint32_t unum = 0, nnum = 0;
- int32_t rc;
-
- if (ulp_ctx == NULL || res == NULL) {
- BNXT_TF_DBG(ERR, "Invalid arguments to get resources.\n");
- return -EINVAL;
- }
-
- /* Make sure the resources are zero before accumulating. */
- memset(res, 0, sizeof(struct tf_session_resources));
-
- if (bnxt_ulp_cntxt_ha_enabled(ulp_ctx) &&
- stype == BNXT_ULP_SESSION_TYPE_SHARED)
- stype = ulp_ctx->cfg_data->hu_session_type;
-
- /*
- * Shared resources are comprised of both named and unnamed resources.
- * First get the unnamed counts, and then add the named to the result.
- */
- /* Get the baseline counts */
- unnamed = bnxt_ulp_app_resource_resv_list_get(&unum);
- if (unum) {
- rc = bnxt_ulp_unnamed_resources_calc(ulp_ctx, unnamed, unum, stype,
- res);
- if (rc) {
- BNXT_TF_DBG(ERR,
- "Unable to calc resources for shared session.\n");
- return -EINVAL;
- }
- }
-
- /* Get the named list and add the totals */
- named = bnxt_ulp_app_glb_resource_info_list_get(&nnum);
- if (!nnum)
- return 0;
-
- rc = bnxt_ulp_named_resources_calc(ulp_ctx, named, nnum, stype, res);
- if (rc)
- BNXT_TF_DBG(ERR, "Unable to calc named resources\n");
-
- return rc;
-}
-
-/* Function to set the hot upgrade support into the context */
-static int
-bnxt_ulp_multi_shared_session_support_set(struct bnxt *bp,
- enum bnxt_ulp_device_id devid,
- uint32_t fw_hu_update)
-{
- struct bnxt_ulp_context *ulp_ctx = bp->ulp_ctx;
- struct tf_get_version_parms v_params = { 0 };
- struct tf *tfp;
- int32_t rc = 0;
- int32_t new_fw = 0;
-
- v_params.device_type = bnxt_ulp_cntxt_convert_dev_id(devid);
- v_params.bp = bp;
-
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
- rc = tf_get_version(tfp, &v_params);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get tf version.\n");
- return rc;
- }
-
- if (v_params.major == 1 && v_params.minor == 0 &&
- v_params.update == 1) {
- new_fw = 1;
- }
- /* if the version update is greater than 0 then set support for
- * multiple version
- */
- if (new_fw) {
- ulp_ctx->cfg_data->ulp_flags |= BNXT_ULP_MULTI_SHARED_SUPPORT;
- ulp_ctx->cfg_data->hu_session_type =
- BNXT_ULP_SESSION_TYPE_SHARED;
- }
- if (!new_fw && fw_hu_update) {
- ulp_ctx->cfg_data->ulp_flags &= ~BNXT_ULP_HIGH_AVAIL_ENABLED;
- ulp_ctx->cfg_data->hu_session_type =
- BNXT_ULP_SESSION_TYPE_SHARED |
- BNXT_ULP_SESSION_TYPE_SHARED_OWC;
- }
-
- if (!new_fw && !fw_hu_update) {
- ulp_ctx->cfg_data->hu_session_type =
- BNXT_ULP_SESSION_TYPE_SHARED |
- BNXT_ULP_SESSION_TYPE_SHARED_OWC;
- }
-
- return rc;
-}
-
-int32_t
-bnxt_ulp_cntxt_app_caps_init(struct bnxt *bp,
- uint8_t app_id, uint32_t dev_id)
-{
- struct bnxt_ulp_app_capabilities_info *info;
- uint32_t num = 0, fw = 0;
- uint16_t i;
- bool found = false;
- struct bnxt_ulp_context *ulp_ctx = bp->ulp_ctx;
-
- if (ULP_APP_DEV_UNSUPPORTED_ENABLED(ulp_ctx->cfg_data->ulp_flags)) {
- BNXT_TF_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
- app_id, dev_id);
- return -EINVAL;
- }
-
- info = bnxt_ulp_app_cap_list_get(&num);
- if (!info || !num) {
- BNXT_TF_DBG(ERR, "Failed to get app capabilities.\n");
- return -EINVAL;
- }
-
- for (i = 0; i < num; i++) {
- if (info[i].app_id != app_id || info[i].device_id != dev_id)
- continue;
- found = true;
- if (info[i].flags & BNXT_ULP_APP_CAP_SHARED_EN)
- ulp_ctx->cfg_data->ulp_flags |=
- BNXT_ULP_SHARED_SESSION_ENABLED;
- if (info[i].flags & BNXT_ULP_APP_CAP_HOT_UPGRADE_EN)
- ulp_ctx->cfg_data->ulp_flags |=
- BNXT_ULP_HIGH_AVAIL_ENABLED;
- if (info[i].flags & BNXT_ULP_APP_CAP_UNICAST_ONLY)
- ulp_ctx->cfg_data->ulp_flags |=
- BNXT_ULP_APP_UNICAST_ONLY;
- if (info[i].flags & BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT)
- ulp_ctx->cfg_data->ulp_flags |=
- BNXT_ULP_APP_TOS_PROTO_SUPPORT;
- if (info[i].flags & BNXT_ULP_APP_CAP_BC_MC_SUPPORT)
- ulp_ctx->cfg_data->ulp_flags |=
- BNXT_ULP_APP_BC_MC_SUPPORT;
- if (info[i].flags & BNXT_ULP_APP_CAP_SOCKET_DIRECT) {
- /* Enable socket direction only if MR is enabled in fw*/
- if (BNXT_MULTIROOT_EN(bp)) {
- ulp_ctx->cfg_data->ulp_flags |=
- BNXT_ULP_APP_SOCKET_DIRECT;
- BNXT_TF_DBG(INFO,
- "Socket Direct feature is enabled\n");
- }
- }
- if (info[i].flags & BNXT_ULP_APP_CAP_HA_DYNAMIC) {
- /* Read the environment variable to determine hot up */
- if (!bnxt_pmd_get_hot_up_config()) {
- ulp_ctx->cfg_data->ulp_flags |=
- BNXT_ULP_APP_HA_DYNAMIC;
- /* reset Hot upgrade, dynamically disabled */
- ulp_ctx->cfg_data->ulp_flags &=
- ~BNXT_ULP_HIGH_AVAIL_ENABLED;
- ulp_ctx->cfg_data->def_session_type =
- BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA;
- BNXT_TF_DBG(INFO, "Hot upgrade disabled.\n");
- }
- }
-
- if (info[i].flags & BNXT_ULP_APP_CAP_L2_ETYPE)
- ulp_ctx->cfg_data->ulp_flags |=
- BNXT_ULP_APP_L2_ETYPE;
-
- if (info[i].flags & BNXT_ULP_APP_CAP_CUST_VXLAN)
- ulp_ctx->cfg_data->ulp_flags |=
- BNXT_ULP_CUST_VXLAN_SUPPORT;
-
- bnxt_ulp_vxlan_ip_port_set(ulp_ctx, info[i].vxlan_ip_port);
- bnxt_ulp_vxlan_port_set(ulp_ctx, info[i].vxlan_port);
- bnxt_ulp_ecpri_udp_port_set(ulp_ctx, info[i].ecpri_udp_port);
- bnxt_ulp_vxlan_gpe_next_proto_set(ulp_ctx, info[i].tunnel_next_proto);
-
- /* set the shared session support from firmware */
- fw = info[i].upgrade_fw_update;
- if (ULP_HIGH_AVAIL_IS_ENABLED(ulp_ctx->cfg_data->ulp_flags) &&
- bnxt_ulp_multi_shared_session_support_set(bp, dev_id, fw)) {
- BNXT_TF_DBG(ERR,
- "Unable to get shared session support\n");
- return -EINVAL;
- }
- bnxt_ulp_ha_reg_set(ulp_ctx, info[i].ha_reg_state,
- info[i].ha_reg_cnt);
- ulp_ctx->cfg_data->ha_pool_id = info[i].ha_pool_id;
- ulp_ctx->cfg_data->default_priority = info[i].default_priority;
- }
- if (!found) {
- BNXT_TF_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
- app_id, dev_id);
- ulp_ctx->cfg_data->ulp_flags |= BNXT_ULP_APP_DEV_UNSUPPORTED;
- return -EINVAL;
- }
-
- return 0;
-}
-
-/* Function to retrieve the vxlan_ip (ecpri) port from the context. */
+/* Function to set the number for vxlan_ip (custom vxlan) port into the context */
int
-bnxt_ulp_ecpri_udp_port_set(struct bnxt_ulp_context *ulp_ctx,
+bnxt_ulp_cntxt_ecpri_udp_port_set(struct bnxt_ulp_context *ulp_ctx,
uint32_t ecpri_udp_port)
{
if (!ulp_ctx || !ulp_ctx->cfg_data)
@@ -508,9 +156,9 @@ bnxt_ulp_ecpri_udp_port_set(struct bnxt_ulp_context *ulp_ctx,
return 0;
}
-/* Function to retrieve the vxlan_ip (ecpri) port from the context. */
+/* Function to retrieve the vxlan_ip (custom vxlan) port from the context. */
unsigned int
-bnxt_ulp_ecpri_udp_port_get(struct bnxt_ulp_context *ulp_ctx)
+bnxt_ulp_cntxt_ecpri_udp_port_get(struct bnxt_ulp_context *ulp_ctx)
{
if (!ulp_ctx || !ulp_ctx->cfg_data)
return 0;
@@ -520,7 +168,7 @@ bnxt_ulp_ecpri_udp_port_get(struct bnxt_ulp_context *ulp_ctx)
/* Function to set the number for vxlan_ip (custom vxlan) port into the context */
int
-bnxt_ulp_vxlan_ip_port_set(struct bnxt_ulp_context *ulp_ctx,
+bnxt_ulp_cntxt_vxlan_ip_port_set(struct bnxt_ulp_context *ulp_ctx,
uint32_t vxlan_ip_port)
{
if (!ulp_ctx || !ulp_ctx->cfg_data)
@@ -533,7 +181,7 @@ bnxt_ulp_vxlan_ip_port_set(struct bnxt_ulp_context *ulp_ctx,
/* Function to retrieve the vxlan_ip (custom vxlan) port from the context. */
unsigned int
-bnxt_ulp_vxlan_ip_port_get(struct bnxt_ulp_context *ulp_ctx)
+bnxt_ulp_cntxt_vxlan_ip_port_get(struct bnxt_ulp_context *ulp_ctx)
{
if (!ulp_ctx || !ulp_ctx->cfg_data)
return 0;
@@ -566,7 +214,7 @@ bnxt_ulp_vxlan_gpe_next_proto_get(struct bnxt_ulp_context *ulp_ctx)
/* Function to set the number for vxlan port into the context */
int
-bnxt_ulp_vxlan_port_set(struct bnxt_ulp_context *ulp_ctx,
+bnxt_ulp_cntxt_vxlan_port_set(struct bnxt_ulp_context *ulp_ctx,
uint32_t vxlan_port)
{
if (!ulp_ctx || !ulp_ctx->cfg_data)
@@ -579,7 +227,7 @@ bnxt_ulp_vxlan_port_set(struct bnxt_ulp_context *ulp_ctx,
/* Function to retrieve the vxlan port from the context. */
unsigned int
-bnxt_ulp_vxlan_port_get(struct bnxt_ulp_context *ulp_ctx)
+bnxt_ulp_cntxt_vxlan_port_get(struct bnxt_ulp_context *ulp_ctx)
{
if (!ulp_ctx || !ulp_ctx->cfg_data)
return 0;
@@ -597,99 +245,23 @@ bnxt_ulp_default_app_priority_get(struct bnxt_ulp_context *ulp_ctx)
return (unsigned int)ulp_ctx->cfg_data->default_priority;
}
-static inline uint32_t
-bnxt_ulp_session_idx_get(enum bnxt_ulp_session_type session_type) {
- if (session_type & BNXT_ULP_SESSION_TYPE_SHARED)
- return 1;
- else if (session_type & BNXT_ULP_SESSION_TYPE_SHARED_WC)
- return 2;
- return 0;
-}
-
-/* Function to set the tfp session details in session */
+/* The function to initialize bp flags with truflow features */
static int32_t
-bnxt_ulp_session_tfp_set(struct bnxt_ulp_session_state *session,
- enum bnxt_ulp_session_type session_type,
- struct tf *tfp)
-{
- uint32_t idx = bnxt_ulp_session_idx_get(session_type);
- int32_t rc = 0;
-
- if (!session->session_opened[idx]) {
- session->g_tfp[idx] = rte_zmalloc("bnxt_ulp_session_tfp",
- sizeof(struct tf), 0);
- if (!session->g_tfp[idx]) {
- BNXT_TF_DBG(DEBUG, "Failed to alloc session tfp\n");
- return -ENOMEM;
- }
- session->g_tfp[idx]->session = tfp->session;
- session->session_opened[idx] = 1;
- }
- return rc;
-}
-
-/* Function to get the tfp session details in session */
-static struct tf_session_info *
-bnxt_ulp_session_tfp_get(struct bnxt_ulp_session_state *session,
- enum bnxt_ulp_session_type session_type)
-{
- uint32_t idx = bnxt_ulp_session_idx_get(session_type);
-
- if (session->session_opened[idx])
- return session->g_tfp[idx]->session;
- return NULL;
-}
-
-static uint32_t
-bnxt_ulp_session_is_open(struct bnxt_ulp_session_state *session,
- enum bnxt_ulp_session_type session_type)
-{
- uint32_t idx = bnxt_ulp_session_idx_get(session_type);
-
- return session->session_opened[idx];
-}
-
-/* Function to reset the tfp session details in session */
-static void
-bnxt_ulp_session_tfp_reset(struct bnxt_ulp_session_state *session,
- enum bnxt_ulp_session_type session_type)
+ulp_dparms_dev_port_intf_update(struct bnxt *bp,
+ struct bnxt_ulp_context *ulp_ctx)
{
- uint32_t idx = bnxt_ulp_session_idx_get(session_type);
-
- if (session->session_opened[idx]) {
- session->session_opened[idx] = 0;
- rte_free(session->g_tfp[idx]);
- session->g_tfp[idx] = NULL;
- }
-}
+ enum bnxt_ulp_flow_mem_type mtype;
-static void
-ulp_ctx_shared_session_close(struct bnxt *bp,
- enum bnxt_ulp_session_type session_type,
- struct bnxt_ulp_session_state *session)
-{
- struct tf *tfp;
- int32_t rc;
+ if (bnxt_ulp_cntxt_mem_type_get(ulp_ctx, &mtype))
+ return -EINVAL;
+ /* Update the bp flag with gfid flag */
+ if (mtype == BNXT_ULP_FLOW_MEM_TYPE_EXT)
+ bp->flags |= BNXT_FLAG_GFID_ENABLE;
- tfp = bnxt_ulp_cntxt_tfp_get(bp->ulp_ctx, session_type);
- if (!tfp) {
- /*
- * Log it under debug since this is likely a case of the
- * shared session not being created. For example, a failed
- * initialization.
- */
- BNXT_TF_DBG(DEBUG, "Failed to get shared tfp on close.\n");
- return;
- }
- rc = tf_close_session(tfp);
- if (rc)
- BNXT_TF_DBG(ERR, "Failed to close the shared session rc=%d.\n",
- rc);
- (void)bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, session_type, NULL);
- bnxt_ulp_session_tfp_reset(session, session_type);
+ return 0;
}
-static int32_t
+int32_t
ulp_ctx_mh_get_session_name(struct bnxt *bp,
struct tf_open_session_parms *parms)
{
@@ -713,7 +285,7 @@ ulp_ctx_mh_get_session_name(struct bnxt *bp,
&slot,
&device);
if (rc != 3) {
- BNXT_TF_DBG(DEBUG,
+ BNXT_DRV_DBG(DEBUG,
"Failed to scan device ctrl_chan_name\n");
return -EINVAL;
}
@@ -727,752 +299,68 @@ ulp_ctx_mh_get_session_name(struct bnxt *bp,
bus,
slot,
device);
- BNXT_TF_DBG(DEBUG,
+ BNXT_DRV_DBG(DEBUG,
"Session name for Multi-Host: ctrl_chan_name:%s\n", parms->ctrl_chan_name);
return 0;
}
-static int32_t
-ulp_ctx_shared_session_open(struct bnxt *bp,
- enum bnxt_ulp_session_type session_type,
- struct bnxt_ulp_session_state *session)
-{
- struct rte_eth_dev *ethdev = bp->eth_dev;
- struct tf_session_resources *resources;
- struct tf_open_session_parms parms;
- size_t nb;
- uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST;
- int32_t rc = 0;
- uint8_t app_id;
- struct tf *tfp;
- uint8_t pool_id;
-
- memset(&parms, 0, sizeof(parms));
- rc = rte_eth_dev_get_name_by_port(ethdev->data->port_id,
- parms.ctrl_chan_name);
- if (rc) {
- BNXT_TF_DBG(ERR, "Invalid port %d, rc = %d\n",
- ethdev->data->port_id, rc);
- return rc;
- }
+/*
+ * Initialize the state of an ULP session.
+ * If the state of an ULP session is not initialized, set it's state to
+ * initialized. If the state is already initialized, do nothing.
+ */
+static void
+ulp_context_initialized(struct bnxt_ulp_session_state *session, bool *init)
+{
+ pthread_mutex_lock(&session->bnxt_ulp_mutex);
- /* On multi-host system, adjust ctrl_chan_name to avoid confliction */
- if (BNXT_MH(bp)) {
- rc = ulp_ctx_mh_get_session_name(bp, &parms);
- if (rc)
- return rc;
+ if (!session->bnxt_ulp_init) {
+ session->bnxt_ulp_init = true;
+ *init = false;
+ } else {
+ *init = true;
}
- resources = &parms.resources;
+ pthread_mutex_unlock(&session->bnxt_ulp_mutex);
+}
- /*
- * Need to account for size of ctrl_chan_name and 1 extra for Null
- * terminator
- */
- nb = sizeof(parms.ctrl_chan_name) - strlen(parms.ctrl_chan_name) - 1;
+/*
+ * Check if an ULP session is already allocated for a specific PCI
+ * domain & bus. If it is already allocated simply return the session
+ * pointer, otherwise allocate a new session.
+ */
+static struct bnxt_ulp_session_state *
+ulp_get_session(struct bnxt *bp, struct rte_pci_addr *pci_addr)
+{
+ struct bnxt_ulp_session_state *session;
- /*
- * Build the ctrl_chan_name with shared token.
- * When HA is enabled, the WC TCAM needs extra management by the core,
- * so add the wc_tcam string to the control channel.
- */
- pool_id = bp->ulp_ctx->cfg_data->ha_pool_id;
- if (!bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
- if (bnxt_ulp_cntxt_ha_enabled(bp->ulp_ctx))
- strncat(parms.ctrl_chan_name, "-tf_shared-wc_tcam", nb);
- else
- strncat(parms.ctrl_chan_name, "-tf_shared", nb);
- } else if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
- if (session_type == BNXT_ULP_SESSION_TYPE_SHARED) {
- strncat(parms.ctrl_chan_name, "-tf_shared", nb);
- } else if (session_type == BNXT_ULP_SESSION_TYPE_SHARED_WC) {
- char session_pool_name[64];
-
- sprintf(session_pool_name, "-tf_shared-pool%d",
- pool_id);
-
- if (nb >= strlen(session_pool_name)) {
- strncat(parms.ctrl_chan_name, session_pool_name, nb);
- } else {
- BNXT_TF_DBG(ERR, "No space left for session_name\n");
- return -EINVAL;
+ /* if multi root capability is enabled, then ignore the pci bus id */
+ STAILQ_FOREACH(session, &bnxt_ulp_session_list, next) {
+ if (BNXT_MULTIROOT_EN(bp)) {
+ if (!memcmp(bp->dsn, session->dsn,
+ sizeof(session->dsn))) {
+ return session;
}
+ } else if (session->pci_info.domain == pci_addr->domain &&
+ session->pci_info.bus == pci_addr->bus) {
+ return session;
}
}
+ return NULL;
+}
- rc = bnxt_ulp_tf_shared_session_resources_get(bp->ulp_ctx, session_type,
- resources);
- if (rc)
- return rc;
-
- rc = bnxt_ulp_cntxt_app_id_get(bp->ulp_ctx, &app_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get the app id from ulp.\n");
- return -EINVAL;
- }
-
- rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &ulp_dev_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get device id from ulp.\n");
- return rc;
- }
-
- tfp = bnxt_ulp_bp_tfp_get(bp, session_type);
- parms.device_type = bnxt_ulp_cntxt_convert_dev_id(ulp_dev_id);
- parms.bp = bp;
-
- /*
- * Open the session here, but the collect the resources during the
- * mapper initialization.
- */
- rc = tf_open_session(tfp, &parms);
- if (rc)
- return rc;
-
- if (parms.shared_session_creator)
- BNXT_TF_DBG(DEBUG, "Shared session creator.\n");
- else
- BNXT_TF_DBG(DEBUG, "Shared session attached.\n");
-
- /* Save the shared session in global data */
- rc = bnxt_ulp_session_tfp_set(session, session_type, tfp);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to add shared tfp to session\n");
- return rc;
- }
-
- rc = bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, session_type, tfp);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to add shared tfp to ulp (%d)\n", rc);
- return rc;
- }
-
- return rc;
-}
-
-static int32_t
-ulp_ctx_shared_session_attach(struct bnxt *bp,
- struct bnxt_ulp_session_state *ses)
-{
- enum bnxt_ulp_session_type type;
- struct tf *tfp;
- int32_t rc = 0;
-
- /* Simply return success if shared session not enabled */
- if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) {
- type = BNXT_ULP_SESSION_TYPE_SHARED;
- tfp = bnxt_ulp_bp_tfp_get(bp, type);
- tfp->session = bnxt_ulp_session_tfp_get(ses, type);
- rc = ulp_ctx_shared_session_open(bp, type, ses);
- }
-
- if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
- type = BNXT_ULP_SESSION_TYPE_SHARED_WC;
- tfp = bnxt_ulp_bp_tfp_get(bp, type);
- tfp->session = bnxt_ulp_session_tfp_get(ses, type);
- rc = ulp_ctx_shared_session_open(bp, type, ses);
- }
-
- if (!rc)
- bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, true);
-
- return rc;
-}
-
-static void
-ulp_ctx_shared_session_detach(struct bnxt *bp)
-{
- struct tf *tfp;
-
- if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) {
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_SHARED);
- if (tfp->session) {
- tf_close_session(tfp);
- tfp->session = NULL;
- }
- }
- if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_SHARED_WC);
- if (tfp->session) {
- tf_close_session(tfp);
- tfp->session = NULL;
- }
- }
- bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, false);
-}
-
-/*
- * Initialize an ULP session.
- * An ULP session will contain all the resources needed to support rte flow
- * offloads. A session is initialized as part of rte_eth_device start.
- * A single vswitch instance can have multiple uplinks which means
- * rte_eth_device start will be called for each of these devices.
- * ULP session manager will make sure that a single ULP session is only
- * initialized once. Apart from this, it also initializes MARK database,
- * EEM table & flow database. ULP session manager also manages a list of
- * all opened ULP sessions.
- */
-static int32_t
-ulp_ctx_session_open(struct bnxt *bp,
- struct bnxt_ulp_session_state *session)
-{
- struct rte_eth_dev *ethdev = bp->eth_dev;
- int32_t rc = 0;
- struct tf_open_session_parms params;
- struct tf_session_resources *resources;
- uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST;
- uint8_t app_id;
- struct tf *tfp;
-
- memset(¶ms, 0, sizeof(params));
-
- rc = rte_eth_dev_get_name_by_port(ethdev->data->port_id,
- params.ctrl_chan_name);
- if (rc) {
- BNXT_TF_DBG(ERR, "Invalid port %d, rc = %d\n",
- ethdev->data->port_id, rc);
- return rc;
- }
-
- /* On multi-host system, adjust ctrl_chan_name to avoid confliction */
- if (BNXT_MH(bp)) {
- rc = ulp_ctx_mh_get_session_name(bp, ¶ms);
- if (rc)
- return rc;
- }
-
- rc = bnxt_ulp_cntxt_app_id_get(bp->ulp_ctx, &app_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get the app id from ulp.\n");
- return -EINVAL;
- }
-
- rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &ulp_dev_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get device id from ulp.\n");
- return rc;
- }
-
- params.device_type = bnxt_ulp_cntxt_convert_dev_id(ulp_dev_id);
- resources = ¶ms.resources;
- rc = bnxt_ulp_tf_resources_get(bp->ulp_ctx,
- BNXT_ULP_SESSION_TYPE_DEFAULT,
- resources);
- if (rc)
- return rc;
-
- params.bp = bp;
-
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
- rc = tf_open_session(tfp, ¶ms);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to open TF session - %s, rc = %d\n",
- params.ctrl_chan_name, rc);
- return -EINVAL;
- }
- rc = bnxt_ulp_session_tfp_set(session,
- BNXT_ULP_SESSION_TYPE_DEFAULT, tfp);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to set TF session - %s, rc = %d\n",
- params.ctrl_chan_name, rc);
- return -EINVAL;
- }
- return rc;
-}
-
-/*
- * Close the ULP session.
- * It takes the ulp context pointer.
- */
-static void
-ulp_ctx_session_close(struct bnxt *bp,
- struct bnxt_ulp_session_state *session)
-{
- struct tf *tfp;
-
- /* close the session in the hardware */
- if (bnxt_ulp_session_is_open(session, BNXT_ULP_SESSION_TYPE_DEFAULT)) {
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
- tf_close_session(tfp);
- }
- bnxt_ulp_session_tfp_reset(session, BNXT_ULP_SESSION_TYPE_DEFAULT);
-}
-
-static void
-bnxt_init_tbl_scope_parms(struct bnxt *bp,
- struct tf_alloc_tbl_scope_parms *params)
-{
- struct bnxt_ulp_device_params *dparms;
- uint32_t dev_id;
- int rc;
-
- rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &dev_id);
- if (rc)
- /* TBD: For now, just use default. */
- dparms = 0;
- else
- dparms = bnxt_ulp_device_params_get(dev_id);
-
- /*
- * Set the flush timer for EEM entries. The value is in 100ms intervals,
- * so 100 is 10s.
- */
- params->hw_flow_cache_flush_timer = 100;
-
- if (!dparms) {
- params->rx_max_key_sz_in_bits = BNXT_ULP_DFLT_RX_MAX_KEY;
- params->rx_max_action_entry_sz_in_bits =
- BNXT_ULP_DFLT_RX_MAX_ACTN_ENTRY;
- params->rx_mem_size_in_mb = BNXT_ULP_DFLT_RX_MEM;
- params->rx_num_flows_in_k = BNXT_ULP_RX_NUM_FLOWS;
-
- params->tx_max_key_sz_in_bits = BNXT_ULP_DFLT_TX_MAX_KEY;
- params->tx_max_action_entry_sz_in_bits =
- BNXT_ULP_DFLT_TX_MAX_ACTN_ENTRY;
- params->tx_mem_size_in_mb = BNXT_ULP_DFLT_TX_MEM;
- params->tx_num_flows_in_k = BNXT_ULP_TX_NUM_FLOWS;
- } else {
- params->rx_max_key_sz_in_bits = BNXT_ULP_DFLT_RX_MAX_KEY;
- params->rx_max_action_entry_sz_in_bits =
- BNXT_ULP_DFLT_RX_MAX_ACTN_ENTRY;
- params->rx_mem_size_in_mb = BNXT_ULP_DFLT_RX_MEM;
- params->rx_num_flows_in_k =
- dparms->ext_flow_db_num_entries / 1024;
-
- params->tx_max_key_sz_in_bits = BNXT_ULP_DFLT_TX_MAX_KEY;
- params->tx_max_action_entry_sz_in_bits =
- BNXT_ULP_DFLT_TX_MAX_ACTN_ENTRY;
- params->tx_mem_size_in_mb = BNXT_ULP_DFLT_TX_MEM;
- params->tx_num_flows_in_k =
- dparms->ext_flow_db_num_entries / 1024;
- }
- BNXT_TF_DBG(INFO, "Table Scope initialized with %uK flows.\n",
- params->rx_num_flows_in_k);
-}
-
-/* Initialize Extended Exact Match host memory. */
-static int32_t
-ulp_eem_tbl_scope_init(struct bnxt *bp)
-{
- struct tf_alloc_tbl_scope_parms params = {0};
- struct bnxt_ulp_device_params *dparms;
- enum bnxt_ulp_flow_mem_type mtype;
- uint32_t dev_id;
- struct tf *tfp;
- int rc;
-
- /* Get the dev specific number of flows that needed to be supported. */
- if (bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &dev_id)) {
- BNXT_TF_DBG(ERR, "Invalid device id\n");
- return -EINVAL;
- }
-
- dparms = bnxt_ulp_device_params_get(dev_id);
- if (!dparms) {
- BNXT_TF_DBG(ERR, "could not fetch the device params\n");
- return -ENODEV;
- }
-
- if (bnxt_ulp_cntxt_mem_type_get(bp->ulp_ctx, &mtype))
- return -EINVAL;
- if (mtype != BNXT_ULP_FLOW_MEM_TYPE_EXT) {
- BNXT_TF_DBG(INFO, "Table Scope alloc is not required\n");
- return 0;
- }
-
- bnxt_init_tbl_scope_parms(bp, ¶ms);
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
- rc = tf_alloc_tbl_scope(tfp, ¶ms);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to allocate eem table scope rc = %d\n",
- rc);
- return rc;
- }
-
- rc = bnxt_ulp_cntxt_tbl_scope_id_set(bp->ulp_ctx, params.tbl_scope_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to set table scope id\n");
- return rc;
- }
-
- return 0;
-}
-
-/* Free Extended Exact Match host memory */
-static int32_t
-ulp_eem_tbl_scope_deinit(struct bnxt *bp, struct bnxt_ulp_context *ulp_ctx)
-{
- struct tf_free_tbl_scope_parms params = {0};
- struct tf *tfp;
- int32_t rc = 0;
- struct bnxt_ulp_device_params *dparms;
- enum bnxt_ulp_flow_mem_type mtype;
- uint32_t dev_id;
-
- if (!ulp_ctx || !ulp_ctx->cfg_data)
- return -EINVAL;
-
- tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT);
- if (!tfp) {
- BNXT_TF_DBG(ERR, "Failed to get the truflow pointer\n");
- return -EINVAL;
- }
-
- /* Get the dev specific number of flows that needed to be supported. */
- if (bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &dev_id)) {
- BNXT_TF_DBG(ERR, "Invalid device id\n");
- return -EINVAL;
- }
-
- dparms = bnxt_ulp_device_params_get(dev_id);
- if (!dparms) {
- BNXT_TF_DBG(ERR, "could not fetch the device params\n");
- return -ENODEV;
- }
-
- if (bnxt_ulp_cntxt_mem_type_get(ulp_ctx, &mtype))
- return -EINVAL;
- if (mtype != BNXT_ULP_FLOW_MEM_TYPE_EXT) {
- BNXT_TF_DBG(INFO, "Table Scope free is not required\n");
- return 0;
- }
-
- rc = bnxt_ulp_cntxt_tbl_scope_id_get(ulp_ctx, ¶ms.tbl_scope_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to get the table scope id\n");
- return -EINVAL;
- }
-
- rc = tf_free_tbl_scope(tfp, ¶ms);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to free table scope\n");
- return -EINVAL;
- }
- return rc;
-}
-
-/* The function to free and deinit the ulp context data. */
-static int32_t
-ulp_ctx_deinit(struct bnxt *bp,
- struct bnxt_ulp_session_state *session)
-{
- /* close the tf session */
- ulp_ctx_session_close(bp, session);
-
- /* The shared session must be closed last. */
- if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx))
- ulp_ctx_shared_session_close(bp, BNXT_ULP_SESSION_TYPE_SHARED,
- session);
-
- if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx))
- ulp_ctx_shared_session_close(bp,
- BNXT_ULP_SESSION_TYPE_SHARED_WC,
- session);
-
- bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, false);
-
- /* Free the contents */
- if (session->cfg_data) {
- rte_free(session->cfg_data);
- bp->ulp_ctx->cfg_data = NULL;
- session->cfg_data = NULL;
- }
- return 0;
-}
-
-/* The function to allocate and initialize the ulp context data. */
-static int32_t
-ulp_ctx_init(struct bnxt *bp,
- struct bnxt_ulp_session_state *session)
-{
- struct bnxt_ulp_data *ulp_data;
- int32_t rc = 0;
- enum bnxt_ulp_device_id devid;
- enum bnxt_ulp_session_type stype;
- struct tf *tfp;
-
- /* Initialize the context entries list */
- bnxt_ulp_cntxt_list_init();
-
- /* Add the context to the context entries list */
- rc = bnxt_ulp_cntxt_list_add(bp->ulp_ctx);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to add the context list entry\n");
- return -ENOMEM;
- }
-
- /* Allocate memory to hold ulp context data. */
- ulp_data = rte_zmalloc("bnxt_ulp_data",
- sizeof(struct bnxt_ulp_data), 0);
- if (!ulp_data) {
- BNXT_TF_DBG(ERR, "Failed to allocate memory for ulp data\n");
- return -ENOMEM;
- }
-
- /* Increment the ulp context data reference count usage. */
- bp->ulp_ctx->cfg_data = ulp_data;
- session->cfg_data = ulp_data;
- ulp_data->ref_cnt++;
- ulp_data->ulp_flags |= BNXT_ULP_VF_REP_ENABLED;
-
- rc = bnxt_ulp_devid_get(bp, &devid);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to determine device for ULP init.\n");
- goto error_deinit;
- }
-
- rc = bnxt_ulp_cntxt_dev_id_set(bp->ulp_ctx, devid);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to set device for ULP init.\n");
- goto error_deinit;
- }
-
- rc = bnxt_ulp_cntxt_app_id_set(bp->ulp_ctx, bp->app_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to set app_id for ULP init.\n");
- goto error_deinit;
- }
- BNXT_TF_DBG(DEBUG, "Ulp initialized with app id %d\n", bp->app_id);
-
- rc = bnxt_ulp_cntxt_app_caps_init(bp, bp->app_id, devid);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to set caps for app(%x)/dev(%x)\n",
- bp->app_id, devid);
- goto error_deinit;
- }
-
- if (BNXT_TESTPMD_EN(bp)) {
- ulp_data->ulp_flags &= ~BNXT_ULP_VF_REP_ENABLED;
- BNXT_TF_DBG(ERR, "Enabled Testpmd forward mode\n");
- }
-
- /*
- * Shared session must be created before first regular session but after
- * the ulp_ctx is valid.
- */
- if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) {
- rc = ulp_ctx_shared_session_open(bp,
- BNXT_ULP_SESSION_TYPE_SHARED,
- session);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to open shared session (%d)\n",
- rc);
- goto error_deinit;
- }
- }
-
- /* Multiple session support */
- if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
- stype = BNXT_ULP_SESSION_TYPE_SHARED_WC;
- rc = ulp_ctx_shared_session_open(bp, stype, session);
- if (rc) {
- BNXT_TF_DBG(ERR,
- "Unable to open shared wc session (%d)\n",
- rc);
- goto error_deinit;
- }
- }
- bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, true);
-
- /* Open the ulp session. */
- rc = ulp_ctx_session_open(bp, session);
- if (rc)
- goto error_deinit;
-
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
- bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT, tfp);
- return rc;
-
-error_deinit:
- session->session_opened[BNXT_ULP_SESSION_TYPE_DEFAULT] = 1;
- (void)ulp_ctx_deinit(bp, session);
- return rc;
-}
-
-/* The function to initialize ulp dparms with devargs */
-static int32_t
-ulp_dparms_init(struct bnxt *bp, struct bnxt_ulp_context *ulp_ctx)
-{
- struct bnxt_ulp_device_params *dparms;
- uint32_t dev_id = BNXT_ULP_DEVICE_ID_LAST;
-
- if (!bp->max_num_kflows) {
- /* Defaults to Internal */
- bnxt_ulp_cntxt_mem_type_set(ulp_ctx,
- BNXT_ULP_FLOW_MEM_TYPE_INT);
- return 0;
- }
-
- /* The max_num_kflows were set, so move to external */
- if (bnxt_ulp_cntxt_mem_type_set(ulp_ctx, BNXT_ULP_FLOW_MEM_TYPE_EXT))
- return -EINVAL;
-
- if (bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &dev_id)) {
- BNXT_TF_DBG(DEBUG, "Failed to get device id\n");
- return -EINVAL;
- }
-
- dparms = bnxt_ulp_device_params_get(dev_id);
- if (!dparms) {
- BNXT_TF_DBG(DEBUG, "Failed to get device parms\n");
- return -EINVAL;
- }
-
- /* num_flows = max_num_kflows * 1024 */
- dparms->ext_flow_db_num_entries = bp->max_num_kflows * 1024;
- /* GFID = 2 * num_flows */
- dparms->mark_db_gfid_entries = dparms->ext_flow_db_num_entries * 2;
- BNXT_TF_DBG(DEBUG, "Set the number of flows = %" PRIu64 "\n",
- dparms->ext_flow_db_num_entries);
-
- return 0;
-}
-
-/* The function to initialize bp flags with truflow features */
-static int32_t
-ulp_dparms_dev_port_intf_update(struct bnxt *bp,
- struct bnxt_ulp_context *ulp_ctx)
-{
- enum bnxt_ulp_flow_mem_type mtype;
-
- if (bnxt_ulp_cntxt_mem_type_get(ulp_ctx, &mtype))
- return -EINVAL;
- /* Update the bp flag with gfid flag */
- if (mtype == BNXT_ULP_FLOW_MEM_TYPE_EXT)
- bp->flags |= BNXT_FLAG_GFID_ENABLE;
-
- return 0;
-}
-
-static int32_t
-ulp_ctx_attach(struct bnxt *bp,
- struct bnxt_ulp_session_state *session)
-{
- int32_t rc = 0;
- uint32_t flags, dev_id = BNXT_ULP_DEVICE_ID_LAST;
- struct tf *tfp;
- uint8_t app_id;
-
- /* Increment the ulp context data reference count usage. */
- bp->ulp_ctx->cfg_data = session->cfg_data;
- bp->ulp_ctx->cfg_data->ref_cnt++;
-
- /* update the session details in bnxt tfp */
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
- tfp->session = bnxt_ulp_session_tfp_get(session,
- BNXT_ULP_SESSION_TYPE_DEFAULT);
-
- /* Add the context to the context entries list */
- rc = bnxt_ulp_cntxt_list_add(bp->ulp_ctx);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to add the context list entry\n");
- return -EINVAL;
- }
-
- /*
- * The supported flag will be set during the init. Use it now to
- * know if we should go through the attach.
- */
- rc = bnxt_ulp_cntxt_app_id_get(bp->ulp_ctx, &app_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get the app id from ulp.\n");
- return -EINVAL;
- }
-
- rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &dev_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable do get the dev_id.\n");
- return -EINVAL;
- }
-
- flags = bp->ulp_ctx->cfg_data->ulp_flags;
- if (ULP_APP_DEV_UNSUPPORTED_ENABLED(flags)) {
- BNXT_TF_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
- app_id, dev_id);
- return -EINVAL;
- }
-
- /* Create a TF Client */
- rc = ulp_ctx_session_open(bp, session);
- if (rc) {
- PMD_DRV_LOG(ERR, "Failed to open ctxt session, rc:%d\n", rc);
- tfp->session = NULL;
- return rc;
- }
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
- bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT, tfp);
- return rc;
-}
-
-static void
-ulp_ctx_detach(struct bnxt *bp)
-{
- struct tf *tfp;
-
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
- if (tfp->session) {
- tf_close_session(tfp);
- tfp->session = NULL;
- }
-}
-
-/*
- * Initialize the state of an ULP session.
- * If the state of an ULP session is not initialized, set it's state to
- * initialized. If the state is already initialized, do nothing.
- */
-static void
-ulp_context_initialized(struct bnxt_ulp_session_state *session, bool *init)
-{
- pthread_mutex_lock(&session->bnxt_ulp_mutex);
-
- if (!session->bnxt_ulp_init) {
- session->bnxt_ulp_init = true;
- *init = false;
- } else {
- *init = true;
- }
-
- pthread_mutex_unlock(&session->bnxt_ulp_mutex);
-}
-
-/*
- * Check if an ULP session is already allocated for a specific PCI
- * domain & bus. If it is already allocated simply return the session
- * pointer, otherwise allocate a new session.
- */
-static struct bnxt_ulp_session_state *
-ulp_get_session(struct bnxt *bp, struct rte_pci_addr *pci_addr)
-{
- struct bnxt_ulp_session_state *session;
-
- /* if multi root capability is enabled, then ignore the pci bus id */
- STAILQ_FOREACH(session, &bnxt_ulp_session_list, next) {
- if (BNXT_MULTIROOT_EN(bp)) {
- if (!memcmp(bp->dsn, session->dsn,
- sizeof(session->dsn))) {
- return session;
- }
- } else if (session->pci_info.domain == pci_addr->domain &&
- session->pci_info.bus == pci_addr->bus) {
- return session;
- }
- }
- return NULL;
-}
-
-/*
- * Allocate and Initialize an ULP session and set it's state to INITIALIZED.
- * If it's already initialized simply return the already existing session.
- */
-static struct bnxt_ulp_session_state *
-ulp_session_init(struct bnxt *bp,
- bool *init)
-{
- struct rte_pci_device *pci_dev;
- struct rte_pci_addr *pci_addr;
- struct bnxt_ulp_session_state *session;
- int rc = 0;
+/*
+ * Allocate and Initialize an ULP session and set it's state to INITIALIZED.
+ * If it's already initialized simply return the already existing session.
+ */
+static struct bnxt_ulp_session_state *
+ulp_session_init(struct bnxt *bp,
+ bool *init)
+{
+ struct rte_pci_device *pci_dev;
+ struct rte_pci_addr *pci_addr;
+ struct bnxt_ulp_session_state *session;
+ int rc = 0;
if (!bp)
return NULL;
@@ -1489,7 +377,7 @@ ulp_session_init(struct bnxt *bp,
sizeof(struct bnxt_ulp_session_state),
0);
if (!session) {
- BNXT_TF_DBG(ERR,
+ BNXT_DRV_DBG(ERR,
"Allocation failed for bnxt_ulp_session\n");
pthread_mutex_unlock(&bnxt_ulp_global_mutex);
return NULL;
@@ -1501,7 +389,7 @@ ulp_session_init(struct bnxt *bp,
memcpy(session->dsn, bp->dsn, sizeof(session->dsn));
rc = pthread_mutex_init(&session->bnxt_ulp_mutex, NULL);
if (rc) {
- BNXT_TF_DBG(ERR, "mutex create failed\n");
+ BNXT_DRV_DBG(ERR, "mutex create failed\n");
pthread_mutex_unlock(&bnxt_ulp_global_mutex);
return NULL;
}
@@ -1534,326 +422,80 @@ ulp_session_deinit(struct bnxt_ulp_session_state *session)
}
}
-/*
- * Internal api to enable NAT feature.
- * Set set_flag to 1 to set the value or zero to reset the value.
- * returns 0 on success.
- */
-static int32_t
-bnxt_ulp_global_cfg_update(struct bnxt *bp,
- enum tf_dir dir,
- enum tf_global_config_type type,
- uint32_t offset,
- uint32_t value,
- uint32_t set_flag)
-{
- uint32_t global_cfg = 0;
- int rc;
- struct tf_global_cfg_parms parms = { 0 };
- struct tf *tfp;
-
- /* Initialize the params */
- parms.dir = dir,
- parms.type = type,
- parms.offset = offset,
- parms.config = (uint8_t *)&global_cfg,
- parms.config_sz_in_bytes = sizeof(global_cfg);
-
- tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
- rc = tf_get_global_cfg(tfp, &parms);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to get global cfg 0x%x rc:%d\n",
- type, rc);
- return rc;
- }
-
- if (set_flag)
- global_cfg |= value;
- else
- global_cfg &= ~value;
-
- /* SET the register RE_CFA_REG_ACT_TECT */
- rc = tf_set_global_cfg(tfp, &parms);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to set global cfg 0x%x rc:%d\n",
- type, rc);
- return rc;
- }
- return rc;
-}
-
/* Internal function to delete all the flows belonging to the given port */
static void
bnxt_ulp_flush_port_flows(struct bnxt *bp)
{
uint16_t func_id;
- /* it is assumed that port is either TVF or PF */
- if (ulp_port_db_port_func_id_get(bp->ulp_ctx,
- bp->eth_dev->data->port_id,
- &func_id)) {
- BNXT_TF_DBG(ERR, "Invalid argument\n");
- return;
- }
- (void)ulp_flow_db_function_flow_flush(bp->ulp_ctx, func_id);
-}
-
-/* Internal function to delete the VFR default flows */
-static void
-bnxt_ulp_destroy_vfr_default_rules(struct bnxt *bp, bool global)
-{
- struct bnxt_ulp_vfr_rule_info *info;
- uint16_t port_id;
- struct rte_eth_dev *vfr_eth_dev;
- struct bnxt_representor *vfr_bp;
-
- if (!BNXT_TRUFLOW_EN(bp) || rte_eth_dev_is_repr(bp->eth_dev))
- return;
-
- if (!bp->ulp_ctx || !bp->ulp_ctx->cfg_data)
- return;
-
- /* Delete default rules for all ports */
- for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
- info = &bp->ulp_ctx->cfg_data->vfr_rule_info[port_id];
- if (!info->valid)
- continue;
-
- if (!global && info->parent_port_id !=
- bp->eth_dev->data->port_id)
- continue;
-
- /* Destroy the flows */
- ulp_default_flow_destroy(bp->eth_dev, info->vfr_flow_id);
- /* Clean up the tx action pointer */
- vfr_eth_dev = &rte_eth_devices[port_id];
- if (vfr_eth_dev) {
- vfr_bp = vfr_eth_dev->data->dev_private;
- vfr_bp->vfr_tx_cfa_action = 0;
- }
- memset(info, 0, sizeof(struct bnxt_ulp_vfr_rule_info));
- }
-}
-
-static void
-ulp_cust_vxlan_free(struct bnxt *bp)
-{
- int rc;
-
- if (ULP_APP_CUST_VXLAN_SUPPORT(bp->ulp_ctx)) {
- rc = bnxt_tunnel_dst_port_free(bp,
- bp->ulp_ctx->cfg_data->vxlan_port,
- HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN);
- if (rc)
- BNXT_TF_DBG(ERR, "Failed to clear global vxlan port\n");
- }
-
- if (ULP_APP_CUST_VXLAN_IP_SUPPORT(bp->ulp_ctx)) {
- rc = bnxt_tunnel_dst_port_free(bp,
- bp->ulp_ctx->cfg_data->vxlan_ip_port,
- HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4);
- if (rc)
- BNXT_TF_DBG(ERR, "Failed to clear global custom vxlan port\n");
- }
-}
-
-/*
- * When a port is deinit'ed by dpdk. This function is called
- * and this function clears the ULP context and rest of the
- * infrastructure associated with it.
- */
-static void
-bnxt_ulp_deinit(struct bnxt *bp,
- struct bnxt_ulp_session_state *session)
-{
- bool ha_enabled;
-
- if (!bp->ulp_ctx || !bp->ulp_ctx->cfg_data)
- return;
-
- ha_enabled = bnxt_ulp_cntxt_ha_enabled(bp->ulp_ctx);
- if (ha_enabled &&
- bnxt_ulp_session_is_open(session, BNXT_ULP_SESSION_TYPE_DEFAULT)) {
- int32_t rc = ulp_ha_mgr_close(bp->ulp_ctx);
- if (rc)
- BNXT_TF_DBG(ERR, "Failed to close HA (%d)\n", rc);
- }
-
- /* Free tunnel configuration */
- ulp_cust_vxlan_free(bp);
-
- /* clean up default flows */
- bnxt_ulp_destroy_df_rules(bp, true);
-
- /* clean up default VFR flows */
- bnxt_ulp_destroy_vfr_default_rules(bp, true);
-
- /* clean up regular flows */
- ulp_flow_db_flush_flows(bp->ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR);
-
- /* cleanup the eem table scope */
- ulp_eem_tbl_scope_deinit(bp, bp->ulp_ctx);
-
- /* cleanup the flow database */
- ulp_flow_db_deinit(bp->ulp_ctx);
-
- /* Delete the Mark database */
- ulp_mark_db_deinit(bp->ulp_ctx);
-
- /* cleanup the ulp mapper */
- ulp_mapper_deinit(bp->ulp_ctx);
-
- /* Delete the Flow Counter Manager */
- ulp_fc_mgr_deinit(bp->ulp_ctx);
-
- /* Delete the Port database */
- ulp_port_db_deinit(bp->ulp_ctx);
-
- /* Disable NAT feature */
- (void)bnxt_ulp_global_cfg_update(bp, TF_DIR_RX, TF_TUNNEL_ENCAP,
- TF_TUNNEL_ENCAP_NAT,
- BNXT_ULP_NAT_OUTER_MOST_FLAGS, 0);
-
- (void)bnxt_ulp_global_cfg_update(bp, TF_DIR_TX, TF_TUNNEL_ENCAP,
- TF_TUNNEL_ENCAP_NAT,
- BNXT_ULP_NAT_OUTER_MOST_FLAGS, 0);
-
- /* free the flow db lock */
- pthread_mutex_destroy(&bp->ulp_ctx->cfg_data->flow_db_lock);
-
- if (ha_enabled)
- ulp_ha_mgr_deinit(bp->ulp_ctx);
-
- /* Delete the ulp context and tf session and free the ulp context */
- ulp_ctx_deinit(bp, session);
- BNXT_TF_DBG(DEBUG, "ulp ctx has been deinitialized\n");
-}
-
-/*
- * When a port is initialized by dpdk. This functions is called
- * and this function initializes the ULP context and rest of the
- * infrastructure associated with it.
- */
-static int32_t
-bnxt_ulp_init(struct bnxt *bp,
- struct bnxt_ulp_session_state *session)
-{
- int rc;
- uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST;
-
- /* Allocate and Initialize the ulp context. */
- rc = ulp_ctx_init(bp, session);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to create the ulp context\n");
- goto jump_to_error;
- }
-
- rc = pthread_mutex_init(&bp->ulp_ctx->cfg_data->flow_db_lock, NULL);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to initialize flow db lock\n");
- goto jump_to_error;
- }
-
- /* Initialize ulp dparms with values devargs passed */
- rc = ulp_dparms_init(bp, bp->ulp_ctx);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to initialize the dparms\n");
- goto jump_to_error;
- }
-
- /* create the port database */
- rc = ulp_port_db_init(bp->ulp_ctx, bp->port_cnt);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to create the port database\n");
- goto jump_to_error;
- }
-
- /* Create the Mark database. */
- rc = ulp_mark_db_init(bp->ulp_ctx);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to create the mark database\n");
- goto jump_to_error;
- }
-
- /* Create the flow database. */
- rc = ulp_flow_db_init(bp->ulp_ctx);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to create the flow database\n");
- goto jump_to_error;
+ /* it is assumed that port is either TVF or PF */
+ if (ulp_port_db_port_func_id_get(bp->ulp_ctx,
+ bp->eth_dev->data->port_id,
+ &func_id)) {
+ BNXT_DRV_DBG(ERR, "Invalid argument\n");
+ return;
}
+ (void)ulp_flow_db_function_flow_flush(bp->ulp_ctx, func_id);
+}
- /* Create the eem table scope. */
- rc = ulp_eem_tbl_scope_init(bp);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to create the eem scope table\n");
- goto jump_to_error;
- }
+/* Internal function to delete the VFR default flows */
+void
+bnxt_ulp_destroy_vfr_default_rules(struct bnxt *bp, bool global)
+{
+ struct bnxt_ulp_vfr_rule_info *info;
+ uint16_t port_id;
+ struct rte_eth_dev *vfr_eth_dev;
+ struct bnxt_representor *vfr_bp;
- rc = ulp_mapper_init(bp->ulp_ctx);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to initialize ulp mapper\n");
- goto jump_to_error;
- }
+ if (!BNXT_TRUFLOW_EN(bp) || BNXT_ETH_DEV_IS_REPRESENTOR(bp->eth_dev))
+ return;
- rc = ulp_fc_mgr_init(bp->ulp_ctx);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to initialize ulp flow counter mgr\n");
- goto jump_to_error;
- }
+ if (!bp->ulp_ctx || !bp->ulp_ctx->cfg_data)
+ return;
- /*
- * Enable NAT feature. Set the global configuration register
- * Tunnel encap to enable NAT with the reuse of existing inner
- * L2 header smac and dmac
- */
- rc = bnxt_ulp_global_cfg_update(bp, TF_DIR_RX, TF_TUNNEL_ENCAP,
- TF_TUNNEL_ENCAP_NAT,
- BNXT_ULP_NAT_OUTER_MOST_FLAGS, 1);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to set rx global configuration\n");
- goto jump_to_error;
- }
+ /* Delete default rules for all ports */
+ for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
+ info = &bp->ulp_ctx->cfg_data->vfr_rule_info[port_id];
+ if (!info->valid)
+ continue;
- rc = bnxt_ulp_global_cfg_update(bp, TF_DIR_TX, TF_TUNNEL_ENCAP,
- TF_TUNNEL_ENCAP_NAT,
- BNXT_ULP_NAT_OUTER_MOST_FLAGS, 1);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to set tx global configuration\n");
- goto jump_to_error;
- }
+ if (!global && info->parent_port_id !=
+ bp->eth_dev->data->port_id)
+ continue;
- if (bnxt_ulp_cntxt_ha_enabled(bp->ulp_ctx)) {
- rc = ulp_ha_mgr_init(bp->ulp_ctx);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to initialize HA %d\n", rc);
- goto jump_to_error;
- }
- rc = ulp_ha_mgr_open(bp->ulp_ctx);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to Process HA Open %d\n", rc);
- goto jump_to_error;
+ /* Destroy the flows */
+ ulp_default_flow_destroy(bp->eth_dev, info->vfr_flow_id);
+ /* Clean up the tx action pointer */
+ vfr_eth_dev = &rte_eth_devices[port_id];
+ if (vfr_eth_dev) {
+ vfr_bp = vfr_eth_dev->data->dev_private;
+ vfr_bp->vfr_tx_cfa_action = 0;
}
+ memset(info, 0, sizeof(struct bnxt_ulp_vfr_rule_info));
}
+}
- rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &ulp_dev_id);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to get device id from ulp.\n");
- return rc;
- }
+static int
+ulp_cust_vxlan_alloc(struct bnxt *bp)
+{
+ int rc = 0;
- if (ulp_dev_id == BNXT_ULP_DEVICE_ID_THOR) {
- rc = bnxt_flow_meter_init(bp);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to config meter\n");
- goto jump_to_error;
- }
+ if (ULP_APP_CUST_VXLAN_SUPPORT(bp->ulp_ctx)) {
+ rc = bnxt_tunnel_dst_port_alloc(bp,
+ bp->ulp_ctx->cfg_data->vxlan_port,
+ HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to set global vxlan port\n");
}
- BNXT_TF_DBG(DEBUG, "ulp ctx has been initialized\n");
- return rc;
+ if (ULP_APP_CUST_VXLAN_IP_SUPPORT(bp->ulp_ctx)) {
+ rc = bnxt_tunnel_dst_port_alloc(bp,
+ bp->ulp_ctx->cfg_data->vxlan_ip_port,
+ HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to set global custom vxlan_ip port\n");
+ }
-jump_to_error:
- bnxt_ulp_deinit(bp, session);
return rc;
}
@@ -1866,42 +508,45 @@ ulp_l2_etype_tunnel_alloc(struct bnxt *bp)
return rc;
if (bp->l2_etype_tunnel_cnt) {
- BNXT_TF_DBG(DEBUG, "L2 ETYPE Custom Tunnel already allocated\n");
- return rc;
+ BNXT_DRV_DBG(DEBUG, "L2 ETYPE Custom Tunnel already allocated\n");
+ return 0;
}
rc = bnxt_tunnel_dst_port_alloc(bp,
BNXT_L2_ETYPE_TUNNEL_ID,
HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_L2_ETYPE);
if (rc)
- BNXT_TF_DBG(ERR, "Failed to set global L2 ETYPE Custom Tunnel\n");
+ BNXT_DRV_DBG(ERR, "Failed to set global L2 ETYPE Custom Tunnel\n");
else
bp->l2_etype_tunnel_cnt++;
return rc;
}
-static int
-ulp_cust_vxlan_alloc(struct bnxt *bp)
+static const struct bnxt_ulp_core_ops *
+bnxt_ulp_port_func_ops_get(struct bnxt *bp)
{
- int rc = 0;
+ int32_t rc;
+ enum bnxt_ulp_device_id dev_id;
+ const struct bnxt_ulp_core_ops *func_ops;
- if (ULP_APP_CUST_VXLAN_SUPPORT(bp->ulp_ctx)) {
- rc = bnxt_tunnel_dst_port_alloc(bp,
- bp->ulp_ctx->cfg_data->vxlan_port,
- HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN);
- if (rc)
- BNXT_TF_DBG(ERR, "Failed to set global vxlan port\n");
- }
+ rc = bnxt_ulp_devid_get(bp, &dev_id);
+ if (rc)
+ return NULL;
- if (ULP_APP_CUST_VXLAN_IP_SUPPORT(bp->ulp_ctx)) {
- rc = bnxt_tunnel_dst_port_alloc(bp,
- bp->ulp_ctx->cfg_data->vxlan_ip_port,
- HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4);
- if (rc)
- BNXT_TF_DBG(ERR, "Failed to set global custom vxlan_ip port\n");
+ switch (dev_id) {
+ case BNXT_ULP_DEVICE_ID_THOR2:
+ func_ops = &bnxt_ulp_tfc_core_ops;
+ break;
+ case BNXT_ULP_DEVICE_ID_THOR:
+ case BNXT_ULP_DEVICE_ID_STINGRAY:
+ case BNXT_ULP_DEVICE_ID_WH_PLUS:
+ func_ops = &bnxt_ulp_tf_core_ops;
+ break;
+ default:
+ func_ops = NULL;
+ break;
}
-
- return rc;
+ return func_ops;
}
/*
@@ -1913,36 +558,61 @@ bnxt_ulp_port_init(struct bnxt *bp)
{
struct bnxt_ulp_session_state *session;
bool initialized;
- enum bnxt_ulp_device_id devid = BNXT_ULP_DEVICE_ID_LAST;
uint32_t ulp_flags;
int32_t rc = 0;
+ enum bnxt_ulp_device_id dev_id;
if (!BNXT_TRUFLOW_EN(bp)) {
- BNXT_TF_DBG(DEBUG,
- "Skip ulp init for port: %d, TF is not enabled\n",
- bp->eth_dev->data->port_id);
+ BNXT_DRV_DBG(DEBUG,
+ "Skip ulp init for port: %d, TF is not enabled\n",
+ bp->eth_dev->data->port_id);
return rc;
}
if (!BNXT_PF(bp) && !BNXT_VF_IS_TRUSTED(bp)) {
- BNXT_TF_DBG(DEBUG,
- "Skip ulp init for port: %d, not a TVF or PF\n",
- bp->eth_dev->data->port_id);
+ BNXT_DRV_DBG(DEBUG,
+ "Skip ulp init for port: %d, not a TVF or PF\n",
+ bp->eth_dev->data->port_id);
+ return rc;
+ }
+
+ rc = bnxt_ulp_devid_get(bp, &dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(DEBUG, "Unsupported device %x\n", rc);
return rc;
}
+ /* Disable VFR support and support egress temporarily for Thor2 */
+ if (dev_id == BNXT_ULP_DEVICE_ID_THOR2)
+ bp->flags2 |= BNXT_FLAGS2_TESTPMD_EN;
+
if (bp->ulp_ctx) {
- BNXT_TF_DBG(DEBUG, "ulp ctx already allocated\n");
+ BNXT_DRV_DBG(DEBUG, "ulp ctx already allocated\n");
return rc;
}
bp->ulp_ctx = rte_zmalloc("bnxt_ulp_ctx",
sizeof(struct bnxt_ulp_context), 0);
if (!bp->ulp_ctx) {
- BNXT_TF_DBG(ERR, "Failed to allocate ulp ctx\n");
+ BNXT_DRV_DBG(ERR, "Failed to allocate ulp ctx\n");
return -ENOMEM;
}
+ rc = bnxt_ulp_cntxt_bp_set(bp->ulp_ctx, bp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to set bp in ulp_ctx\n");
+ rte_free(bp->ulp_ctx);
+ return -EIO;
+ }
+
+ /* This shouldn't fail, unless we have a unknown device */
+ bp->ulp_ctx->ops = bnxt_ulp_port_func_ops_get(bp);
+ if (!bp->ulp_ctx->ops) {
+ BNXT_DRV_DBG(ERR, "Failed to get ulp ops\n");
+ rte_free(bp->ulp_ctx);
+ return -EIO;
+ }
+
/*
* Multiple uplink ports can be associated with a single vswitch.
* Make sure only the port that is started first will initialize
@@ -1950,7 +620,7 @@ bnxt_ulp_port_init(struct bnxt *bp)
*/
session = ulp_session_init(bp, &initialized);
if (!session) {
- BNXT_TF_DBG(ERR, "Failed to initialize the tf session\n");
+ BNXT_DRV_DBG(ERR, "Failed to initialize the tf session\n");
rc = -EIO;
goto jump_to_error;
}
@@ -1960,27 +630,15 @@ bnxt_ulp_port_init(struct bnxt *bp)
* If ULP is already initialized for a specific domain then
* simply assign the ulp context to this rte_eth_dev.
*/
- rc = ulp_ctx_attach(bp, session);
- if (rc) {
- BNXT_TF_DBG(ERR, "Failed to attach the ulp context\n");
- goto jump_to_error;
- }
-
- /*
- * Attach to the shared session, must be called after the
- * ulp_ctx_attach in order to ensure that ulp data is available
- * for attaching.
- */
- rc = ulp_ctx_shared_session_attach(bp, session);
+ rc = bp->ulp_ctx->ops->ulp_ctx_attach(bp, session);
if (rc) {
- BNXT_TF_DBG(ERR,
- "Failed attach to shared session (%d)", rc);
+ BNXT_DRV_DBG(ERR, "Failed to attach the ulp context\n");
goto jump_to_error;
}
} else {
- rc = bnxt_ulp_init(bp, session);
+ rc = bp->ulp_ctx->ops->ulp_init(bp, session);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to initialize the ulp init\n");
+ BNXT_DRV_DBG(ERR, "Failed to initialize the ulp init\n");
goto jump_to_error;
}
}
@@ -1990,46 +648,54 @@ bnxt_ulp_port_init(struct bnxt *bp)
if (rc)
goto jump_to_error;
+
/* Update bnxt driver flags */
rc = ulp_dparms_dev_port_intf_update(bp, bp->ulp_ctx);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to update driver flags\n");
+ BNXT_DRV_DBG(ERR, "Failed to update driver flags\n");
goto jump_to_error;
}
/* update the port database for the given interface */
rc = ulp_port_db_port_update(bp->ulp_ctx, bp->eth_dev);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to update port database\n");
+ BNXT_DRV_DBG(ERR, "Failed to update port database\n");
goto jump_to_error;
}
/* create the default rules */
rc = bnxt_ulp_create_df_rules(bp);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to create default flow\n");
- goto jump_to_error;
- }
-
- rc = bnxt_ulp_devid_get(bp, &devid);
- if (rc) {
- BNXT_TF_DBG(ERR, "Unable to determine device for ULP port init.\n");
+ BNXT_DRV_DBG(ERR, "Failed to create default flow\n");
goto jump_to_error;
}
/* set the unicast mode */
if (bnxt_ulp_cntxt_ptr2_ulp_flags_get(bp->ulp_ctx, &ulp_flags)) {
- BNXT_TF_DBG(ERR, "Error in getting ULP context flags\n");
+ BNXT_DRV_DBG(ERR, "Error in getting ULP context flags\n");
goto jump_to_error;
}
if (ulp_flags & BNXT_ULP_APP_UNICAST_ONLY) {
if (bnxt_pmd_set_unicast_rxmask(bp->eth_dev)) {
- BNXT_TF_DBG(ERR, "Error in setting unicast rxmode\n");
+ BNXT_DRV_DBG(ERR, "Error in setting unicast rxmode\n");
+ goto jump_to_error;
+ }
+ }
+
+ /* Make sure that custom header data is selected */
+ if (dev_id > BNXT_ULP_DEVICE_ID_WH_PLUS) {
+ struct bnxt_vnic_info *vnic = bp->vnic_info;
+ vnic->metadata_format = HWRM_VNIC_UPDATE_INPUT_METADATA_FORMAT_TYPE_3;
+ rc = bnxt_hwrm_vnic_update(bp,
+ vnic,
+ HWRM_VNIC_UPDATE_INPUT_ENABLES_METADATA_FORMAT_TYPE_VALID);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to set metadata format\n");
goto jump_to_error;
}
}
- rc = ulp_cust_vxlan_alloc(bp);
+ rc = ulp_cust_vxlan_alloc(bp); /* BAUCOM: Is this safe and generic? */
if (rc)
goto jump_to_error;
@@ -2044,6 +710,28 @@ bnxt_ulp_port_init(struct bnxt *bp)
return rc;
}
+static void
+ulp_cust_vxlan_free(struct bnxt *bp)
+{
+ int rc;
+
+ if (ULP_APP_CUST_VXLAN_SUPPORT(bp->ulp_ctx)) {
+ rc = bnxt_tunnel_dst_port_free(bp,
+ bp->ulp_ctx->cfg_data->vxlan_port,
+ HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to clear global vxlan port\n");
+ }
+
+ if (ULP_APP_CUST_VXLAN_IP_SUPPORT(bp->ulp_ctx)) {
+ rc = bnxt_tunnel_dst_port_free(bp,
+ bp->ulp_ctx->cfg_data->vxlan_ip_port,
+ HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to clear global custom vxlan port\n");
+ }
+}
+
static void
ulp_l2_etype_tunnel_free(struct bnxt *bp)
{
@@ -2053,15 +741,14 @@ ulp_l2_etype_tunnel_free(struct bnxt *bp)
return;
if (bp->l2_etype_tunnel_cnt == 0) {
- BNXT_TF_DBG(DEBUG, "L2 ETYPE Custom Tunnel already freed\n");
+ BNXT_DRV_DBG(DEBUG, "L2 ETYPE Custom Tunnel already freed\n");
return;
}
-
rc = bnxt_tunnel_dst_port_free(bp,
BNXT_L2_ETYPE_TUNNEL_ID,
HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_L2_ETYPE);
if (rc)
- BNXT_TF_DBG(ERR, "Failed to clear L2 ETYPE Custom Tunnel\n");
+ BNXT_DRV_DBG(ERR, "Failed to clear L2 ETYPE Custom Tunnel\n");
bp->l2_etype_tunnel_cnt--;
}
@@ -2078,26 +765,26 @@ bnxt_ulp_port_deinit(struct bnxt *bp)
struct rte_pci_addr *pci_addr;
if (!BNXT_TRUFLOW_EN(bp)) {
- BNXT_TF_DBG(DEBUG,
- "Skip ULP deinit for port:%d, TF is not enabled\n",
- bp->eth_dev->data->port_id);
+ BNXT_DRV_DBG(DEBUG,
+ "Skip ULP deinit for port:%d, TF is not enabled\n",
+ bp->eth_dev->data->port_id);
return;
}
if (!BNXT_PF(bp) && !BNXT_VF_IS_TRUSTED(bp)) {
- BNXT_TF_DBG(DEBUG,
- "Skip ULP deinit port:%d, not a TVF or PF\n",
- bp->eth_dev->data->port_id);
+ BNXT_DRV_DBG(DEBUG,
+ "Skip ULP deinit port:%d, not a TVF or PF\n",
+ bp->eth_dev->data->port_id);
return;
}
if (!bp->ulp_ctx) {
- BNXT_TF_DBG(DEBUG, "ulp ctx already de-allocated\n");
+ BNXT_DRV_DBG(DEBUG, "ulp ctx already de-allocated\n");
return;
}
- BNXT_TF_DBG(DEBUG, "BNXT Port:%d ULP port deinit\n",
- bp->eth_dev->data->port_id);
+ BNXT_DRV_DBG(DEBUG, "BNXT Port:%d ULP port deinit\n",
+ bp->eth_dev->data->port_id);
/* Get the session details */
pci_dev = RTE_DEV_TO_PCI(bp->eth_dev->device);
@@ -2118,27 +805,34 @@ bnxt_ulp_port_deinit(struct bnxt *bp)
if (bp->ulp_ctx->cfg_data && bp->ulp_ctx->cfg_data->ref_cnt) {
bp->ulp_ctx->cfg_data->ref_cnt--;
/* Free tunnels for each port */
+ ulp_cust_vxlan_free(bp);
ulp_l2_etype_tunnel_free(bp);
if (bp->ulp_ctx->cfg_data->ref_cnt) {
+ /* Free the ulp context in the context entry list */
+ bnxt_ulp_cntxt_list_del(bp->ulp_ctx);
+
/* free the port details */
/* Free the default flow rule associated to this port */
bnxt_ulp_destroy_df_rules(bp, false);
bnxt_ulp_destroy_vfr_default_rules(bp, false);
- /* Free the ulp context in the context entry list */
- bnxt_ulp_cntxt_list_del(bp->ulp_ctx);
-
/* free flows associated with this port */
bnxt_ulp_flush_port_flows(bp);
/* close the session associated with this port */
- ulp_ctx_detach(bp);
-
- /* always detach/close shared after the session. */
- ulp_ctx_shared_session_detach(bp);
+ bp->ulp_ctx->ops->ulp_ctx_detach(bp, session);
} else {
+ /* clean up default flows */
+ bnxt_ulp_destroy_df_rules(bp, true);
+
+ /* clean up default VFR flows */
+ bnxt_ulp_destroy_vfr_default_rules(bp, true);
+
+ /* clean up regular flows */
+ ulp_flow_db_flush_flows(bp->ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR);
+
/* Perform ulp ctx deinit */
- bnxt_ulp_deinit(bp, session);
+ bp->ulp_ctx->ops->ulp_deinit(bp, session);
}
}
@@ -2157,7 +851,7 @@ bnxt_ulp_cntxt_ptr2_mark_db_set(struct bnxt_ulp_context *ulp_ctx,
struct bnxt_ulp_mark_tbl *mark_tbl)
{
if (!ulp_ctx || !ulp_ctx->cfg_data) {
- BNXT_TF_DBG(ERR, "Invalid ulp context data\n");
+ BNXT_DRV_DBG(ERR, "Invalid ulp context data\n");
return -EINVAL;
}
@@ -2230,7 +924,7 @@ bnxt_ulp_cntxt_dev_id_get(struct bnxt_ulp_context *ulp_ctx,
return 0;
}
*dev_id = BNXT_ULP_DEVICE_ID_LAST;
- BNXT_TF_DBG(ERR, "Failed to read dev_id from ulp ctxt\n");
+ BNXT_DRV_DBG(ERR, "Failed to read dev_id from ulp ctxt\n");
return -EINVAL;
}
@@ -2242,7 +936,7 @@ bnxt_ulp_cntxt_mem_type_set(struct bnxt_ulp_context *ulp_ctx,
ulp_ctx->cfg_data->mem_type = mem_type;
return 0;
}
- BNXT_TF_DBG(ERR, "Failed to write mem_type in ulp ctxt\n");
+ BNXT_DRV_DBG(ERR, "Failed to write mem_type in ulp ctxt\n");
return -EINVAL;
}
@@ -2255,7 +949,7 @@ bnxt_ulp_cntxt_mem_type_get(struct bnxt_ulp_context *ulp_ctx,
return 0;
}
*mem_type = BNXT_ULP_FLOW_MEM_TYPE_LAST;
- BNXT_TF_DBG(ERR, "Failed to read mem_type in ulp ctxt\n");
+ BNXT_DRV_DBG(ERR, "Failed to read mem_type in ulp ctxt\n");
return -EINVAL;
}
@@ -2285,12 +979,83 @@ bnxt_ulp_cntxt_tbl_scope_id_set(struct bnxt_ulp_context *ulp_ctx,
return -EINVAL;
}
+/* Function to set the v3 table scope id, only works for tfc objects */
+int32_t
+bnxt_ulp_cntxt_tsid_set(struct bnxt_ulp_context *ulp_ctx, uint8_t tsid)
+{
+ if (ulp_ctx && ulp_ctx->tfo_type == BNXT_ULP_TFO_TYPE_TFC) {
+ ulp_ctx->tsid = tsid;
+ ULP_BITMAP_SET(ulp_ctx->tfo_flags, BNXT_ULP_TFO_TSID_FLAG);
+ return 0;
+ }
+ return -EINVAL;
+}
+
+/* Function to reset the v3 table scope id, only works for tfc objects */
+void
+bnxt_ulp_cntxt_tsid_reset(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx && ulp_ctx->tfo_type == BNXT_ULP_TFO_TYPE_TFC)
+ ULP_BITMAP_RESET(ulp_ctx->tfo_flags, BNXT_ULP_TFO_TSID_FLAG);
+}
+
+/* Function to set the v3 table scope id, only works for tfc objects */
+int32_t
+bnxt_ulp_cntxt_tsid_get(struct bnxt_ulp_context *ulp_ctx, uint8_t *tsid)
+{
+ if (ulp_ctx && tsid &&
+ ulp_ctx->tfo_type == BNXT_ULP_TFO_TYPE_TFC &&
+ ULP_BITMAP_ISSET(ulp_ctx->tfo_flags, BNXT_ULP_TFO_TSID_FLAG)) {
+ *tsid = ulp_ctx->tsid;
+ return 0;
+ }
+ return -EINVAL;
+}
+
+/* Function to set the v3 session id, only works for tfc objects */
+int32_t
+bnxt_ulp_cntxt_sid_set(struct bnxt_ulp_context *ulp_ctx,
+ uint16_t sid)
+{
+ if (ulp_ctx && ulp_ctx->tfo_type == BNXT_ULP_TFO_TYPE_TFC) {
+ ulp_ctx->sid = sid;
+ ULP_BITMAP_SET(ulp_ctx->tfo_flags, BNXT_ULP_TFO_SID_FLAG);
+ return 0;
+ }
+ return -EINVAL;
+}
+
+/*
+ * Function to reset the v3 session id, only works for tfc objects
+ * There isn't a known invalid value for sid, so this is necessary
+ */
+void
+bnxt_ulp_cntxt_sid_reset(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx && ulp_ctx->tfo_type == BNXT_ULP_TFO_TYPE_TFC)
+ ULP_BITMAP_RESET(ulp_ctx->tfo_flags, BNXT_ULP_TFO_SID_FLAG);
+}
+
+/* Function to get the v3 session id, only works for tfc objects */
+int32_t
+bnxt_ulp_cntxt_sid_get(struct bnxt_ulp_context *ulp_ctx,
+ uint16_t *sid)
+{
+ if (ulp_ctx && sid &&
+ ulp_ctx->tfo_type == BNXT_ULP_TFO_TYPE_TFC &&
+ ULP_BITMAP_ISSET(ulp_ctx->tfo_flags, BNXT_ULP_TFO_SID_FLAG)) {
+ *sid = ulp_ctx->sid;
+ return 0;
+ }
+ return -EINVAL;
+}
+
/* Function to get the number of shared clients attached */
uint8_t
bnxt_ulp_cntxt_num_shared_clients_get(struct bnxt_ulp_context *ulp)
{
if (ulp == NULL || ulp->cfg_data == NULL) {
- BNXT_TF_DBG(ERR, "Invalid arguments\n");
+ BNXT_DRV_DBG(ERR, "Invalid arguments\n");
return 0;
}
return ulp->cfg_data->num_shared_clients;
@@ -2301,7 +1066,7 @@ int
bnxt_ulp_cntxt_num_shared_clients_set(struct bnxt_ulp_context *ulp, bool incr)
{
if (ulp == NULL || ulp->cfg_data == NULL) {
- BNXT_TF_DBG(ERR, "Invalid arguments\n");
+ BNXT_DRV_DBG(ERR, "Invalid arguments\n");
return 0;
}
if (incr)
@@ -2309,62 +1074,41 @@ bnxt_ulp_cntxt_num_shared_clients_set(struct bnxt_ulp_context *ulp, bool incr)
else if (ulp->cfg_data->num_shared_clients)
ulp->cfg_data->num_shared_clients--;
- BNXT_TF_DBG(DEBUG, "%d:clients(%d)\n", incr,
- ulp->cfg_data->num_shared_clients);
+ BNXT_DRV_DBG(DEBUG, "%d:clients(%d)\n", incr,
+ ulp->cfg_data->num_shared_clients);
return 0;
}
-/* Function to set the tfp session details from the ulp context. */
int32_t
-bnxt_ulp_cntxt_tfp_set(struct bnxt_ulp_context *ulp,
- enum bnxt_ulp_session_type s_type,
- struct tf *tfp)
+bnxt_ulp_cntxt_bp_set(struct bnxt_ulp_context *ulp, struct bnxt *bp)
{
- uint32_t idx = 0;
-
- if (!ulp) {
- BNXT_TF_DBG(ERR, "Invalid arguments\n");
+ if (ulp == NULL) {
+ BNXT_DRV_DBG(ERR, "Invalid arguments\n");
return -EINVAL;
}
- if (ULP_MULTI_SHARED_IS_SUPPORTED(ulp)) {
- if (s_type & BNXT_ULP_SESSION_TYPE_SHARED)
- idx = 1;
- else if (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC)
- idx = 2;
-
- } else {
- if ((s_type & BNXT_ULP_SESSION_TYPE_SHARED) ||
- (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC))
- idx = 1;
- }
-
- ulp->g_tfp[idx] = tfp;
+ ulp->bp = bp;
return 0;
}
-/* Function to get the tfp session details from the ulp context. */
-struct tf *
-bnxt_ulp_cntxt_tfp_get(struct bnxt_ulp_context *ulp,
- enum bnxt_ulp_session_type s_type)
+struct bnxt*
+bnxt_ulp_cntxt_bp_get(struct bnxt_ulp_context *ulp)
{
- uint32_t idx = 0;
-
- if (!ulp) {
- BNXT_TF_DBG(ERR, "Invalid arguments\n");
+ if (ulp == NULL) {
+ BNXT_DRV_DBG(ERR, "Invalid arguments\n");
return NULL;
}
- if (ULP_MULTI_SHARED_IS_SUPPORTED(ulp)) {
- if (s_type & BNXT_ULP_SESSION_TYPE_SHARED)
- idx = 1;
- else if (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC)
- idx = 2;
- } else {
- if ((s_type & BNXT_ULP_SESSION_TYPE_SHARED) ||
- (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC))
- idx = 1;
- }
- return ulp->g_tfp[idx];
+ return ulp->bp;
+}
+
+int32_t
+bnxt_ulp_cntxt_fid_get(struct bnxt_ulp_context *ulp, uint16_t *fid)
+{
+ if (ulp == NULL || fid == NULL)
+ return -EINVAL;
+
+ *fid = ulp->bp->fw_fid;
+ return 0;
}
/*
@@ -2420,14 +1164,14 @@ bnxt_ulp_eth_dev_ptr2_cntxt_get(struct rte_eth_dev *dev)
{
struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
- if (rte_eth_dev_is_repr(dev)) {
+ if (BNXT_ETH_DEV_IS_REPRESENTOR(dev)) {
struct bnxt_representor *vfr = dev->data->dev_private;
bp = vfr->parent_dev->data->dev_private;
}
if (!bp) {
- BNXT_TF_DBG(ERR, "Bnxt private data is not initialized\n");
+ BNXT_DRV_DBG(ERR, "Bnxt private data is not initialized\n");
return NULL;
}
return bp->ulp_ctx;
@@ -2438,7 +1182,7 @@ bnxt_ulp_cntxt_ptr2_mapper_data_set(struct bnxt_ulp_context *ulp_ctx,
void *mapper_data)
{
if (!ulp_ctx || !ulp_ctx->cfg_data) {
- BNXT_TF_DBG(ERR, "Invalid ulp context data\n");
+ BNXT_DRV_DBG(ERR, "Invalid ulp context data\n");
return -EINVAL;
}
@@ -2450,13 +1194,37 @@ void *
bnxt_ulp_cntxt_ptr2_mapper_data_get(struct bnxt_ulp_context *ulp_ctx)
{
if (!ulp_ctx || !ulp_ctx->cfg_data) {
- BNXT_TF_DBG(ERR, "Invalid ulp context data\n");
+ BNXT_DRV_DBG(ERR, "Invalid ulp context data\n");
return NULL;
}
return ulp_ctx->cfg_data->mapper_data;
}
+int32_t
+bnxt_ulp_cntxt_ptr2_matcher_data_set(struct bnxt_ulp_context *ulp_ctx,
+ void *matcher_data)
+{
+ if (!ulp_ctx || !ulp_ctx->cfg_data) {
+ BNXT_DRV_DBG(ERR, "Invalid ulp context data\n");
+ return -EINVAL;
+ }
+
+ ulp_ctx->cfg_data->matcher_data = matcher_data;
+ return 0;
+}
+
+void *
+bnxt_ulp_cntxt_ptr2_matcher_data_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (!ulp_ctx || !ulp_ctx->cfg_data) {
+ BNXT_DRV_DBG(ERR, "Invalid ulp context data\n");
+ return NULL;
+ }
+
+ return ulp_ctx->cfg_data->matcher_data;
+}
+
/* Function to set the port database to the ulp context. */
int32_t
bnxt_ulp_cntxt_ptr2_port_db_set(struct bnxt_ulp_context *ulp_ctx,
@@ -2485,7 +1253,7 @@ bnxt_ulp_cntxt_ptr2_fc_info_set(struct bnxt_ulp_context *ulp_ctx,
struct bnxt_ulp_fc_info *ulp_fc_info)
{
if (!ulp_ctx || !ulp_ctx->cfg_data) {
- BNXT_TF_DBG(ERR, "Invalid ulp context data\n");
+ BNXT_DRV_DBG(ERR, "Invalid ulp context data\n");
return -EINVAL;
}
@@ -2535,7 +1303,7 @@ bnxt_ulp_cntxt_acquire_fdb_lock(struct bnxt_ulp_context *ulp_ctx)
return -1;
if (pthread_mutex_lock(&ulp_ctx->cfg_data->flow_db_lock)) {
- BNXT_TF_DBG(ERR, "unable to acquire fdb lock\n");
+ BNXT_DRV_DBG(ERR, "unable to acquire fdb lock\n");
return -1;
}
return 0;
@@ -2596,7 +1364,7 @@ bnxt_ulp_cntxt_ptr2_ha_info_set(struct bnxt_ulp_context *ulp_ctx,
struct bnxt_ulp_ha_mgr_info *ulp_ha_info)
{
if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL) {
- BNXT_TF_DBG(ERR, "Invalid ulp context data\n");
+ BNXT_DRV_DBG(ERR, "Invalid ulp context data\n");
return -EINVAL;
}
ulp_ctx->cfg_data->ha_info = ulp_ha_info;
@@ -2620,7 +1388,7 @@ bnxt_ulp_cntxt_ha_enabled(struct bnxt_ulp_context *ulp_ctx)
return !!ULP_HIGH_AVAIL_IS_ENABLED(ulp_ctx->cfg_data->ulp_flags);
}
-static int32_t
+int32_t
bnxt_ulp_cntxt_list_init(void)
{
/* Create the cntxt spin lock only once*/
@@ -2630,14 +1398,14 @@ bnxt_ulp_cntxt_list_init(void)
return 0;
}
-static int32_t
+int32_t
bnxt_ulp_cntxt_list_add(struct bnxt_ulp_context *ulp_ctx)
{
struct ulp_context_list_entry *entry;
entry = rte_zmalloc(NULL, sizeof(struct ulp_context_list_entry), 0);
if (entry == NULL) {
- BNXT_TF_DBG(ERR, "unable to allocate memory\n");
+ BNXT_DRV_DBG(ERR, "unable to allocate memory\n");
return -ENOMEM;
}
@@ -2648,7 +1416,7 @@ bnxt_ulp_cntxt_list_add(struct bnxt_ulp_context *ulp_ctx)
return 0;
}
-static void
+void
bnxt_ulp_cntxt_list_del(struct bnxt_ulp_context *ulp_ctx)
{
struct ulp_context_list_entry *entry, *temp;
@@ -2719,7 +1487,7 @@ bnxt_ulp_cntxt_convert_dev_id(uint32_t ulp_dev_id)
type = TF_DEVICE_TYPE_P5;
break;
default:
- BNXT_TF_DBG(ERR, "Invalid device id\n");
+ BNXT_DRV_DBG(ERR, "Invalid device id\n");
break;
}
return type;
@@ -2730,7 +1498,7 @@ bnxt_ulp_cntxt_convert_dev_id(uint32_t ulp_dev_id)
* the firmware.
*/
int32_t
-bnxt_ulp_ha_reg_set(struct bnxt_ulp_context *ulp_ctx,
+bnxt_ulp_cntxt_ha_reg_set(struct bnxt_ulp_context *ulp_ctx,
uint8_t state, uint8_t cnt)
{
if (!ulp_ctx || !ulp_ctx->cfg_data)
@@ -2751,7 +1519,7 @@ bnxt_ulp_ha_reg_set(struct bnxt_ulp_context *ulp_ctx,
* the firmware.
*/
uint32_t
-bnxt_ulp_ha_reg_state_get(struct bnxt_ulp_context *ulp_ctx)
+bnxt_ulp_cntxt_ha_reg_state_get(struct bnxt_ulp_context *ulp_ctx)
{
if (!ulp_ctx || !ulp_ctx->cfg_data)
return 0;
@@ -2764,7 +1532,7 @@ bnxt_ulp_ha_reg_state_get(struct bnxt_ulp_context *ulp_ctx)
* the firmware.
*/
uint32_t
-bnxt_ulp_ha_reg_cnt_get(struct bnxt_ulp_context *ulp_ctx)
+bnxt_ulp_cntxt_ha_reg_cnt_get(struct bnxt_ulp_context *ulp_ctx)
{
if (!ulp_ctx || !ulp_ctx->cfg_data)
return 0;
@@ -2772,17 +1540,24 @@ bnxt_ulp_ha_reg_cnt_get(struct bnxt_ulp_context *ulp_ctx)
return (uint32_t)ulp_ctx->cfg_data->hu_reg_cnt;
}
-struct tf*
-bnxt_ulp_bp_tfp_get(struct bnxt *bp, enum bnxt_ulp_session_type type)
+/* This function sets the number of key recipes supported
+ * Generally, this should be set to the number of flexible keys
+ * supported
+ */
+void
+bnxt_ulp_num_key_recipes_set(struct bnxt_ulp_context *ulp_ctx,
+ uint16_t num_recipes)
{
- enum bnxt_session_type btype;
-
- if (type & BNXT_ULP_SESSION_TYPE_SHARED)
- btype = BNXT_SESSION_TYPE_SHARED_COMMON;
- else if (type & BNXT_ULP_SESSION_TYPE_SHARED_WC)
- btype = BNXT_SESSION_TYPE_SHARED_WC;
- else
- btype = BNXT_SESSION_TYPE_REGULAR;
+ if (!ulp_ctx || !ulp_ctx->cfg_data)
+ return;
+ ulp_ctx->cfg_data->num_key_recipes_per_dir = num_recipes;
+}
- return bnxt_get_tfp_session(bp, btype);
+/* This function gets the number of key recipes supported */
+int32_t
+bnxt_ulp_num_key_recipes_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (!ulp_ctx || !ulp_ctx->cfg_data)
+ return 0;
+ return ulp_ctx->cfg_data->num_key_recipes_per_dir;
}
@@ -40,7 +40,9 @@
#define BNXT_ULP_CUST_VXLAN_SUPPORT 0x100
#define BNXT_ULP_MULTI_SHARED_SUPPORT 0x200
#define BNXT_ULP_APP_HA_DYNAMIC 0x400
-#define BNXT_ULP_APP_L2_ETYPE 0x800
+#define BNXT_ULP_APP_SRV6 0x800
+#define BNXT_ULP_APP_L2_ETYPE 0x1000
+#define BNXT_ULP_SHARED_TBL_SCOPE_ENABLED 0x2000
#define ULP_VF_REP_IS_ENABLED(flag) ((flag) & BNXT_ULP_VF_REP_ENABLED)
#define ULP_SHARED_SESSION_IS_ENABLED(flag) ((flag) &\
@@ -106,6 +108,7 @@ struct bnxt_ulp_data {
struct bnxt_ulp_flow_db *flow_db;
pthread_mutex_t flow_db_lock;
void *mapper_data;
+ void *matcher_data;
struct bnxt_ulp_port_db *port_db;
struct bnxt_ulp_fc_info *fc_info;
struct bnxt_ulp_ha_mgr_info *ha_info;
@@ -125,17 +128,47 @@ struct bnxt_ulp_data {
uint32_t vxlan_ip_port;
uint32_t ecpri_udp_port;
uint32_t hu_session_type;
+ uint32_t max_pools;
+ uint32_t num_rx_flows;
+ uint32_t num_tx_flows;
+ uint16_t act_rx_max_sz;
+ uint16_t act_tx_max_sz;
+ uint16_t em_rx_key_max_sz;
+ uint16_t em_tx_key_max_sz;
+ uint32_t page_sz;
uint8_t hu_reg_state;
uint8_t hu_reg_cnt;
uint8_t ha_pool_id;
uint8_t tunnel_next_proto;
+ uint8_t em_multiplier;
enum bnxt_ulp_session_type def_session_type;
+ uint16_t num_key_recipes_per_dir;
+};
+
+enum bnxt_ulp_tfo_type {
+ BNXT_ULP_TFO_TYPE_INVALID = 0,
+ BNXT_ULP_TFO_TYPE_TF,
+ BNXT_ULP_TFO_TYPE_TFC
};
#define BNXT_ULP_SESSION_MAX 3
+#define BNXT_ULP_TFO_SID_FLAG (1)
+#define BNXT_ULP_TFO_TSID_FLAG (1 << 1)
+
struct bnxt_ulp_context {
struct bnxt_ulp_data *cfg_data;
- struct tf *g_tfp[BNXT_ULP_SESSION_MAX];
+ struct bnxt *bp;
+ enum bnxt_ulp_tfo_type tfo_type;
+ union {
+ void *g_tfp[BNXT_ULP_SESSION_MAX];
+ struct {
+ uint32_t tfo_flags;
+ void *tfcp;
+ uint16_t sid;
+ uint8_t tsid;
+ };
+ };
+ const struct bnxt_ulp_core_ops *ops;
};
struct bnxt_ulp_pci_info {
@@ -153,6 +186,8 @@ struct bnxt_ulp_session_state {
struct bnxt_ulp_data *cfg_data;
struct tf *g_tfp[BNXT_ULP_SESSION_MAX];
uint32_t session_opened[BNXT_ULP_SESSION_MAX];
+ /* Need to revisit a union for the tf related data */
+ uint16_t session_id;
};
/* ULP flow id structure */
@@ -171,6 +206,28 @@ struct ulp_context_list_entry {
struct bnxt_ulp_context *ulp_ctx;
};
+struct bnxt_ulp_core_ops {
+ int32_t
+ (*ulp_init)(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session);
+ void
+ (*ulp_deinit)(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session);
+ int32_t
+ (*ulp_ctx_attach)(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session);
+ void
+ (*ulp_ctx_detach)(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session);
+};
+
+extern const struct bnxt_ulp_core_ops bnxt_ulp_tf_core_ops;
+extern const struct bnxt_ulp_core_ops bnxt_ulp_tfc_core_ops;
+
+int32_t
+bnxt_ulp_devid_get(struct bnxt *bp,
+ enum bnxt_ulp_device_id *ulp_dev_id);
+
bool
ulp_is_default_session_active(struct bnxt_ulp_context *ulp_ctx);
@@ -209,7 +266,7 @@ int32_t
bnxt_ulp_cntxt_tbl_scope_id_get(struct bnxt_ulp_context *ulp_ctx,
uint32_t *tbl_scope_id);
-/* Function to set the tfp session details in the ulp context. */
+/* Function to set the bp associated with the ulp_ctx */
int32_t
bnxt_ulp_cntxt_tfp_set(struct bnxt_ulp_context *ulp,
enum bnxt_ulp_session_type s_type,
@@ -220,6 +277,48 @@ struct tf *
bnxt_ulp_cntxt_tfp_get(struct bnxt_ulp_context *ulp,
enum bnxt_ulp_session_type s_type);
+int32_t
+bnxt_ulp_cntxt_bp_set(struct bnxt_ulp_context *ulp, struct bnxt *bp);
+
+/* Function to get the bp associated with the ulp_ctx */
+struct bnxt *
+bnxt_ulp_cntxt_bp_get(struct bnxt_ulp_context *ulp);
+
+/* Function to set the v3 table scope id, only works for tfc objects */
+int32_t
+bnxt_ulp_cntxt_tsid_set(struct bnxt_ulp_context *ulp_ctx, uint8_t tsid);
+
+/*
+ * Function to set the v3 table scope id, only works for tfc objects
+ * There isn't a known invalid value for tsid, so this is necessary in order to
+ * know that the tsid is not set.
+ */
+void
+bnxt_ulp_cntxt_tsid_reset(struct bnxt_ulp_context *ulp_ctx);
+
+/* Function to set the v3 table scope id, only works for tfc objects */
+int32_t
+bnxt_ulp_cntxt_tsid_get(struct bnxt_ulp_context *ulp_ctx, uint8_t *tsid);
+
+/* Function to set the v3 session id, only works for tfc objects */
+int32_t
+bnxt_ulp_cntxt_sid_set(struct bnxt_ulp_context *ulp_ctx, uint16_t session_id);
+
+/*
+ * Function to reset the v3 session id, only works for tfc objects
+ * There isn't a known invalid value for sid, so this is necessary in order to
+ * know that the sid is not set.
+ */
+void
+bnxt_ulp_cntxt_sid_reset(struct bnxt_ulp_context *ulp_ctx);
+
+/* Function to get the v3 session id, only works for tfc objects */
+int32_t
+bnxt_ulp_cntxt_sid_get(struct bnxt_ulp_context *ulp_ctx, uint16_t *sid);
+
+int32_t
+bnxt_ulp_cntxt_fid_get(struct bnxt_ulp_context *ulp, uint16_t *fw_fid);
+
/* Get the device table entry based on the device id. */
struct bnxt_ulp_device_params *
bnxt_ulp_device_params_get(uint32_t dev_id);
@@ -257,6 +356,15 @@ bnxt_ulp_cntxt_ptr2_mapper_data_set(struct bnxt_ulp_context *ulp_ctx,
void *
bnxt_ulp_cntxt_ptr2_mapper_data_get(struct bnxt_ulp_context *ulp_ctx);
+/* Function to add the ulp matcher data to the ulp context */
+int32_t
+bnxt_ulp_cntxt_ptr2_matcher_data_set(struct bnxt_ulp_context *ulp_ctx,
+ void *matcher_data);
+
+/* Function to get the ulp matcher data from the ulp context */
+void *
+bnxt_ulp_cntxt_ptr2_matcher_data_get(struct bnxt_ulp_context *ulp_ctx);
+
/* Function to set the port database to the ulp context. */
int32_t
bnxt_ulp_cntxt_ptr2_port_db_set(struct bnxt_ulp_context *ulp_ctx,
@@ -340,9 +448,8 @@ bnxt_ulp_cntxt_multi_shared_session_enabled(struct bnxt_ulp_context *ulp_ctx);
struct bnxt_ulp_app_capabilities_info *
bnxt_ulp_app_cap_list_get(uint32_t *num_entries);
-int32_t
-bnxt_ulp_cntxt_app_caps_init(struct bnxt *bp,
- uint8_t app_id, uint32_t dev_id);
+struct bnxt_ulp_resource_resv_info *
+bnxt_ulp_app_resource_resv_list_get(uint32_t *num_entries);
struct bnxt_ulp_resource_resv_info *
bnxt_ulp_resource_resv_list_get(uint32_t *num_entries);
@@ -407,6 +514,26 @@ bnxt_ulp_vxlan_gpe_next_proto_set(struct bnxt_ulp_context *ulp_ctx,
uint8_t
bnxt_ulp_vxlan_gpe_next_proto_get(struct bnxt_ulp_context *ulp_ctx);
+int
+bnxt_ulp_cntxt_vxlan_port_set(struct bnxt_ulp_context *ulp_ctx,
+ uint32_t vxlan_port);
+unsigned int
+bnxt_ulp_cntxt_vxlan_port_get(struct bnxt_ulp_context *ulp_ctx);
+
+unsigned int
+bnxt_ulp_default_app_priority_get(struct bnxt_ulp_context *ulp_ctx);
+
+int
+bnxt_ulp_cntxt_vxlan_ip_port_set(struct bnxt_ulp_context *ulp_ctx,
+ uint32_t vxlan_ip_port);
+unsigned int
+bnxt_ulp_cntxt_vxlan_ip_port_get(struct bnxt_ulp_context *ulp_ctx);
+int
+bnxt_ulp_cntxt_ecpri_udp_port_set(struct bnxt_ulp_context *ulp_ctx,
+ uint32_t ecpri_udp_port);
+unsigned int
+bnxt_ulp_cntxt_ecpri_udp_port_get(struct bnxt_ulp_context *ulp_ctx);
+
int32_t
bnxt_flow_meter_init(struct bnxt *bp);
@@ -425,4 +552,28 @@ bnxt_ulp_ha_reg_cnt_get(struct bnxt_ulp_context *ulp_ctx);
struct tf*
bnxt_ulp_bp_tfp_get(struct bnxt *bp, enum bnxt_ulp_session_type type);
+
+int32_t
+bnxt_ulp_cntxt_ha_reg_set(struct bnxt_ulp_context *ulp_ctx,
+ uint8_t state, uint8_t cnt);
+
+uint32_t
+bnxt_ulp_cntxt_ha_reg_state_get(struct bnxt_ulp_context *ulp_ctx);
+
+uint32_t
+bnxt_ulp_cntxt_ha_reg_cnt_get(struct bnxt_ulp_context *ulp_ctx);
+
+int32_t bnxt_ulp_cntxt_list_init(void);
+
+int32_t bnxt_ulp_cntxt_list_add(struct bnxt_ulp_context *ulp_ctx);
+
+void bnxt_ulp_cntxt_list_del(struct bnxt_ulp_context *ulp_ctx);
+
+void
+bnxt_ulp_destroy_vfr_default_rules(struct bnxt *bp, bool global);
+
+void bnxt_ulp_num_key_recipes_set(struct bnxt_ulp_context *ulp_ctx,
+ uint16_t recipes);
+
+int32_t bnxt_ulp_num_key_recipes_get(struct bnxt_ulp_context *ulp_ctx);
#endif /* _BNXT_ULP_H_ */
@@ -91,42 +91,73 @@ bnxt_ulp_init_parser_cf_defaults(struct ulp_rte_parser_params *params,
BNXT_ULP_INVALID_SVIF_VAL);
}
+static void
+bnxt_ulp_init_cf_header_bitmap(struct ulp_rte_parser_params *params)
+{
+ uint64_t hdr_bits = 0;
+
+ /* Remove the internal tunnel bits */
+ hdr_bits = params->hdr_bitmap.bits;
+ ULP_BITMAP_RESET(hdr_bits, BNXT_ULP_HDR_BIT_F2);
+
+ /* Add untag bits */
+ if (!ULP_BITMAP_ISSET(hdr_bits, BNXT_ULP_HDR_BIT_OO_VLAN) &&
+ !ULP_BITMAP_ISSET(hdr_bits, BNXT_ULP_HDR_BIT_OI_VLAN)) {
+ ULP_BITMAP_SET(hdr_bits, BNXT_ULP_HDR_BIT_O_UNTAGGED);
+ }
+ if (!ULP_BITMAP_ISSET(hdr_bits, BNXT_ULP_HDR_BIT_IO_VLAN) &&
+ !ULP_BITMAP_ISSET(hdr_bits, BNXT_ULP_HDR_BIT_II_VLAN)) {
+ ULP_BITMAP_SET(hdr_bits, BNXT_ULP_HDR_BIT_I_UNTAGGED);
+ }
+ /* Add non-tunnel bit */
+ if (!ULP_BITMAP_SET(params->cf_bitmap, BNXT_ULP_CF_BIT_IS_TUNNEL))
+ ULP_BITMAP_SET(hdr_bits, BNXT_ULP_HDR_BIT_NON_TUNNEL);
+
+ /*update the comp field header bits */
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_HDR_BITMAP, hdr_bits);
+}
+
void
-bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms,
+bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_parms *mparms,
struct ulp_rte_parser_params *params,
enum bnxt_ulp_fdb_type flow_type)
{
uint32_t ulp_flags = 0;
- memset(mapper_cparms, 0, sizeof(*mapper_cparms));
- mapper_cparms->flow_type = flow_type;
- mapper_cparms->app_priority = params->priority;
- mapper_cparms->dir_attr = params->dir_attr;
- mapper_cparms->class_tid = params->class_id;
- mapper_cparms->act_tid = params->act_tmpl;
- mapper_cparms->func_id = params->func_id;
- mapper_cparms->hdr_bitmap = ¶ms->hdr_bitmap;
- mapper_cparms->enc_hdr_bitmap = ¶ms->enc_hdr_bitmap;
- mapper_cparms->hdr_field = params->hdr_field;
- mapper_cparms->enc_field = params->enc_field;
- mapper_cparms->comp_fld = params->comp_fld;
- mapper_cparms->act = ¶ms->act_bitmap;
- mapper_cparms->act_prop = ¶ms->act_prop;
- mapper_cparms->flow_id = params->fid;
- mapper_cparms->parent_flow = params->parent_flow;
- mapper_cparms->child_flow = params->child_flow;
- mapper_cparms->fld_bitmap = ¶ms->fld_bitmap;
- mapper_cparms->flow_pattern_id = params->flow_pattern_id;
- mapper_cparms->act_pattern_id = params->act_pattern_id;
- mapper_cparms->app_id = params->app_id;
- mapper_cparms->port_id = params->port_id;
- mapper_cparms->tun_idx = params->tun_idx;
+ mparms->flow_type = flow_type;
+ mparms->app_priority = params->priority;
+ mparms->class_tid = params->class_id;
+ mparms->act_tid = params->act_tmpl;
+ mparms->func_id = params->func_id;
+ mparms->hdr_bitmap = ¶ms->hdr_bitmap;
+ mparms->enc_hdr_bitmap = ¶ms->enc_hdr_bitmap;
+ mparms->hdr_field = params->hdr_field;
+ mparms->enc_field = params->enc_field;
+ mparms->comp_fld = params->comp_fld;
+ mparms->act_bitmap = ¶ms->act_bitmap;
+ mparms->act_prop = ¶ms->act_prop;
+ mparms->parent_flow = params->parent_flow;
+ mparms->child_flow = params->child_flow;
+ mparms->fld_bitmap = ¶ms->fld_bitmap;
+ mparms->flow_pattern_id = params->flow_pattern_id;
+ mparms->act_pattern_id = params->act_pattern_id;
+ mparms->wc_field_bitmap = params->wc_field_bitmap;
+ mparms->app_id = params->app_id;
+ mparms->tun_idx = params->tun_idx;
+ mparms->cf_bitmap = params->cf_bitmap;
+ mparms->exclude_field_bitmap = params->exclude_field_bitmap;
/* update the signature fields into the computed field list */
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_HDR_SIG_ID,
- params->hdr_sig_id);
+ params->class_info_idx);
+
+ /* update the header bitmap */
+ bnxt_ulp_init_cf_header_bitmap(params);
+
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_FLOW_SIG_ID,
params->flow_sig_id);
+ ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_FUNCTION_ID,
+ params->func_id);
if (bnxt_ulp_cntxt_ptr2_ulp_flags_get(params->ulp_ctx, &ulp_flags))
return;
@@ -138,7 +169,7 @@ bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms,
rc = ulp_ha_mgr_region_get(params->ulp_ctx, ®ion);
if (rc)
- BNXT_TF_DBG(ERR, "Unable to get WC region\n");
+ BNXT_DRV_DBG(ERR, "Unable to get WC region\n");
if (region == ULP_HA_REGION_HI)
ULP_COMP_FLD_IDX_WR(params,
BNXT_ULP_CF_IDX_WC_IS_HA_HIGH_REG,
@@ -159,13 +190,14 @@ bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms,
if (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx,
params->port_id,
&ifindex)) {
- BNXT_TF_DBG(ERR, "Invalid port id %u\n",
- params->port_id);
+ BNXT_DRV_DBG(ERR, "Invalid port id %u\n",
+ params->port_id);
return;
}
/* Update the phy port of the other interface */
if (ulp_port_db_vport_get(params->ulp_ctx, ifindex, &vport)) {
- BNXT_TF_DBG(ERR, "Invalid port if index %u\n", ifindex);
+ BNXT_DRV_DBG(ERR, "Invalid port if index %u\n",
+ ifindex);
return;
}
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_SOCKET_DIRECT_VPORT,
@@ -181,7 +213,7 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
const struct rte_flow_action actions[],
struct rte_flow_error *error)
{
- struct bnxt_ulp_mapper_create_parms mapper_cparms = { 0 };
+ struct bnxt_ulp_mapper_parms mparms = { 0 };
struct ulp_rte_parser_params params;
struct bnxt_ulp_context *ulp_ctx;
int rc, ret = BNXT_TF_RC_ERROR;
@@ -189,16 +221,19 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
uint16_t func_id;
uint32_t fid;
+ if (error != NULL)
+ error->type = RTE_FLOW_ERROR_TYPE_NONE;
+
if (bnxt_ulp_flow_validate_args(attr,
pattern, actions,
error) == BNXT_TF_RC_ERROR) {
- BNXT_TF_DBG(ERR, "Invalid arguments being passed\n");
+ BNXT_DRV_DBG(ERR, "Invalid arguments being passed\n");
goto flow_error;
}
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(dev);
if (!ulp_ctx) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
goto flow_error;
}
@@ -207,7 +242,7 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
params.ulp_ctx = ulp_ctx;
if (bnxt_ulp_cntxt_app_id_get(params.ulp_ctx, ¶ms.app_id)) {
- BNXT_TF_DBG(ERR, "failed to get the app id\n");
+ BNXT_DRV_DBG(ERR, "failed to get the app id\n");
goto flow_error;
}
@@ -220,13 +255,13 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
if (ulp_port_db_port_func_id_get(ulp_ctx,
dev->data->port_id,
&func_id)) {
- BNXT_TF_DBG(ERR, "conversion of port to func id failed\n");
+ BNXT_DRV_DBG(ERR, "conversion of port to func id failed\n");
goto flow_error;
}
/* Protect flow creation */
if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
- BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
+ BNXT_DRV_DBG(ERR, "Flow db lock acquire failed\n");
goto flow_error;
}
@@ -237,7 +272,7 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
rc = ulp_flow_db_fid_alloc(ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR,
func_id, &fid);
if (rc) {
- BNXT_TF_DBG(ERR, "Unable to allocate flow table entry\n");
+ BNXT_DRV_DBG(ERR, "Unable to allocate flow table entry\n");
goto release_lock;
}
@@ -251,10 +286,10 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
if (ret != BNXT_TF_RC_SUCCESS)
goto free_fid;
- params.fid = fid;
- params.func_id = func_id;
- params.priority = attr->priority;
- params.port_id = dev->data->port_id;
+ mparms.flow_id = fid;
+ mparms.func_id = func_id;
+ mparms.app_priority = attr->priority;
+ mparms.port_id = dev->data->port_id;
/* Perform the rte flow post process */
bnxt_ulp_rte_parser_post_process(¶ms);
@@ -272,10 +307,11 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
if (ret != BNXT_TF_RC_SUCCESS)
goto free_fid;
- bnxt_ulp_init_mapper_params(&mapper_cparms, ¶ms,
+ bnxt_ulp_init_mapper_params(&mparms, ¶ms,
BNXT_ULP_FDB_TYPE_REGULAR);
/* Call the ulp mapper to create the flow in the hardware. */
- ret = ulp_mapper_flow_create(ulp_ctx, &mapper_cparms);
+ ret = ulp_mapper_flow_create(ulp_ctx, &mparms,
+ (void *)error);
if (ret)
goto free_fid;
@@ -289,7 +325,10 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
release_lock:
bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx);
flow_error:
- rte_flow_error_set(error, ret, RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
+ if (error != NULL &&
+ error->type == RTE_FLOW_ERROR_TYPE_NONE)
+ rte_flow_error_set(error, ret,
+ RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"Failed to create flow.");
return NULL;
}
@@ -310,13 +349,13 @@ bnxt_ulp_flow_validate(struct rte_eth_dev *dev,
if (bnxt_ulp_flow_validate_args(attr,
pattern, actions,
error) == BNXT_TF_RC_ERROR) {
- BNXT_TF_DBG(ERR, "Invalid arguments being passed\n");
+ BNXT_DRV_DBG(ERR, "Invalid arguments being passed\n");
goto parse_error;
}
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(dev);
if (!ulp_ctx) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
goto parse_error;
}
@@ -325,7 +364,7 @@ bnxt_ulp_flow_validate(struct rte_eth_dev *dev,
params.ulp_ctx = ulp_ctx;
if (bnxt_ulp_cntxt_app_id_get(params.ulp_ctx, ¶ms.app_id)) {
- BNXT_TF_DBG(ERR, "failed to get the app id\n");
+ BNXT_DRV_DBG(ERR, "failed to get the app id\n");
goto parse_error;
}
@@ -380,9 +419,12 @@ bnxt_ulp_flow_destroy(struct rte_eth_dev *dev,
uint16_t func_id;
int ret;
+ if (error != NULL)
+ error->type = RTE_FLOW_ERROR_TYPE_NONE;
+
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(dev);
if (!ulp_ctx) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
if (error)
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
@@ -395,7 +437,7 @@ bnxt_ulp_flow_destroy(struct rte_eth_dev *dev,
if (ulp_port_db_port_func_id_get(ulp_ctx,
dev->data->port_id,
&func_id)) {
- BNXT_TF_DBG(ERR, "conversion of port to func id failed\n");
+ BNXT_DRV_DBG(ERR, "conversion of port to func id failed\n");
if (error)
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
@@ -405,7 +447,7 @@ bnxt_ulp_flow_destroy(struct rte_eth_dev *dev,
if (ulp_flow_db_validate_flow_func(ulp_ctx, flow_id, func_id) ==
false) {
- BNXT_TF_DBG(ERR, "Incorrect device params\n");
+ BNXT_DRV_DBG(ERR, "Incorrect device params\n");
if (error)
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
@@ -414,14 +456,15 @@ bnxt_ulp_flow_destroy(struct rte_eth_dev *dev,
}
if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
- BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
+ BNXT_DRV_DBG(ERR, "Flow db lock acquire failed\n");
return -EINVAL;
}
ret = ulp_mapper_flow_destroy(ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR,
- flow_id);
+ flow_id, (void *)error);
if (ret) {
- BNXT_TF_DBG(ERR, "Failed to destroy flow.\n");
- if (error)
+ BNXT_DRV_DBG(ERR, "Failed to destroy flow.\n");
+ if (error != NULL &&
+ error->type == RTE_FLOW_ERROR_TYPE_NONE)
rte_flow_error_set(error, -ret,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"Failed to destroy flow.");
@@ -455,7 +498,7 @@ bnxt_ulp_flow_flush(struct rte_eth_dev *eth_dev,
if (!ret)
ret = ulp_flow_db_function_flow_flush(ulp_ctx, func_id);
else
- BNXT_TF_DBG(ERR, "convert port to func id failed\n");
+ BNXT_DRV_DBG(ERR, "convert port to func id failed\n");
}
if (ret)
rte_flow_error_set(error, ret,
@@ -479,7 +522,7 @@ bnxt_ulp_flow_query(struct rte_eth_dev *eth_dev,
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(eth_dev);
if (!ulp_ctx) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"Failed to query flow.");
@@ -538,7 +581,7 @@ bnxt_ulp_action_handle_create(struct rte_eth_dev *dev,
struct rte_flow_error *error)
{
enum bnxt_ulp_intf_type port_type = BNXT_ULP_INTF_TYPE_INVALID;
- struct bnxt_ulp_mapper_create_parms mparms = { 0 };
+ struct bnxt_ulp_mapper_parms mparms = { 0 };
struct ulp_rte_parser_params params;
struct bnxt_ulp_context *ulp_ctx;
uint32_t act_tid;
@@ -555,12 +598,15 @@ bnxt_ulp_action_handle_create(struct rte_eth_dev *dev,
}
};
+ if (error != NULL)
+ error->type = RTE_FLOW_ERROR_TYPE_NONE;
+
if (bnxt_ulp_action_handle_chk_args(action, conf) != BNXT_TF_RC_SUCCESS)
goto parse_error;
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(dev);
if (!ulp_ctx) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
goto parse_error;
}
@@ -577,12 +623,12 @@ bnxt_ulp_action_handle_create(struct rte_eth_dev *dev,
if (ulp_port_db_dev_port_to_ulp_index(ulp_ctx,
dev->data->port_id,
&ifindex)) {
- BNXT_TF_DBG(ERR, "Port id is not valid\n");
+ BNXT_DRV_DBG(ERR, "Port id is not valid\n");
goto parse_error;
}
port_type = ulp_port_db_port_type_get(ulp_ctx, ifindex);
if (port_type == BNXT_ULP_INTF_TYPE_INVALID) {
- BNXT_TF_DBG(ERR, "Port type is not valid\n");
+ BNXT_DRV_DBG(ERR, "Port type is not valid\n");
goto parse_error;
}
@@ -610,12 +656,12 @@ bnxt_ulp_action_handle_create(struct rte_eth_dev *dev,
if (ulp_port_db_dev_port_to_ulp_index(ulp_ctx,
dev->data->port_id,
&ifindex)) {
- BNXT_TF_DBG(ERR, "Port id is not valid\n");
+ BNXT_DRV_DBG(ERR, "Port id is not valid\n");
goto parse_error;
}
port_type = ulp_port_db_port_type_get(ulp_ctx, ifindex);
if (port_type == BNXT_ULP_INTF_TYPE_INVALID) {
- BNXT_TF_DBG(ERR, "Port type is not valid\n");
+ BNXT_DRV_DBG(ERR, "Port type is not valid\n");
goto parse_error;
}
@@ -638,6 +684,7 @@ bnxt_ulp_action_handle_create(struct rte_eth_dev *dev,
ULP_COMP_FLD_IDX_WR(¶ms, BNXT_ULP_CF_IDX_DIRECTION,
BNXT_ULP_DIR_EGRESS);
}
+
/* Parse the shared action */
ret = bnxt_ulp_rte_parser_act_parse(actions, ¶ms);
if (ret != BNXT_TF_RC_SUCCESS)
@@ -663,17 +710,18 @@ bnxt_ulp_action_handle_create(struct rte_eth_dev *dev,
if (ulp_port_db_port_func_id_get(ulp_ctx,
dev->data->port_id,
&func_id)) {
- BNXT_TF_DBG(ERR, "conversion of port to func id failed\n");
+ BNXT_DRV_DBG(ERR, "conversion of port to func id failed\n");
goto parse_error;
}
/* Protect flow creation */
if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
- BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
+ BNXT_DRV_DBG(ERR, "Flow db lock acquire failed\n");
goto parse_error;
}
- ret = ulp_mapper_flow_create(params.ulp_ctx, &mparms);
+ ret = ulp_mapper_flow_create(params.ulp_ctx, &mparms,
+ (void *)error);
bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx);
if (ret)
@@ -682,7 +730,9 @@ bnxt_ulp_action_handle_create(struct rte_eth_dev *dev,
return (struct rte_flow_action_handle *)((uintptr_t)mparms.shared_hndl);
parse_error:
- rte_flow_error_set(error, ret, RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
+ if (error != NULL &&
+ error->type == RTE_FLOW_ERROR_TYPE_NONE)
+ rte_flow_error_set(error, ret, RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"Failed to create shared action.");
return NULL;
}
@@ -692,7 +742,7 @@ bnxt_ulp_action_handle_destroy(struct rte_eth_dev *dev,
struct rte_flow_action_handle *shared_hndl,
struct rte_flow_error *error)
{
- struct bnxt_ulp_mapper_create_parms mparms = { 0 };
+ struct bnxt_ulp_mapper_parms mparms = { 0 };
struct bnxt_ulp_shared_act_info *act_info;
struct ulp_rte_parser_params params;
struct ulp_rte_act_prop *act_prop;
@@ -703,14 +753,17 @@ bnxt_ulp_action_handle_destroy(struct rte_eth_dev *dev,
uint32_t shared_action_type;
uint64_t tmp64;
+ if (error != NULL)
+ error->type = RTE_FLOW_ERROR_TYPE_NONE;
+
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(dev);
if (!ulp_ctx) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
goto parse_error;
}
if (!shared_hndl) {
- BNXT_TF_DBG(ERR, "Invalid argument of shared handle\n");
+ BNXT_DRV_DBG(ERR, "Invalid argument of shared handle\n");
goto parse_error;
}
@@ -719,19 +772,19 @@ bnxt_ulp_action_handle_destroy(struct rte_eth_dev *dev,
params.ulp_ctx = ulp_ctx;
if (bnxt_ulp_cntxt_app_id_get(ulp_ctx, ¶ms.app_id)) {
- BNXT_TF_DBG(ERR, "failed to get the app id\n");
+ BNXT_DRV_DBG(ERR, "failed to get the app id\n");
goto parse_error;
}
/* The template will delete the entry if there are no references */
if (bnxt_get_action_handle_type(shared_hndl, &shared_action_type)) {
- BNXT_TF_DBG(ERR, "Invalid shared handle\n");
+ BNXT_DRV_DBG(ERR, "Invalid shared handle\n");
goto parse_error;
}
act_info_entries = 0;
act_info = bnxt_ulp_shared_act_info_get(&act_info_entries);
if (shared_action_type >= act_info_entries || !act_info) {
- BNXT_TF_DBG(ERR, "Invalid shared handle\n");
+ BNXT_DRV_DBG(ERR, "Invalid shared handle\n");
goto parse_error;
}
@@ -741,7 +794,7 @@ bnxt_ulp_action_handle_destroy(struct rte_eth_dev *dev,
ret = bnxt_get_action_handle_direction(shared_hndl, &dir);
if (ret) {
- BNXT_TF_DBG(ERR, "Invalid shared handle dir\n");
+ BNXT_DRV_DBG(ERR, "Invalid shared handle dir\n");
goto parse_error;
}
@@ -770,11 +823,12 @@ bnxt_ulp_action_handle_destroy(struct rte_eth_dev *dev,
mparms.act_tid = act_tid;
if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
- BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
+ BNXT_DRV_DBG(ERR, "Flow db lock acquire failed\n");
goto parse_error;
}
- ret = ulp_mapper_flow_create(ulp_ctx, &mparms);
+ ret = ulp_mapper_flow_create(ulp_ctx, &mparms,
+ (void *)error);
bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx);
if (ret)
goto parse_error;
@@ -782,7 +836,9 @@ bnxt_ulp_action_handle_destroy(struct rte_eth_dev *dev,
return 0;
parse_error:
- rte_flow_error_set(error, BNXT_TF_RC_ERROR,
+ if (error != NULL &&
+ error->type == RTE_FLOW_ERROR_TYPE_NONE)
+ rte_flow_error_set(error, BNXT_TF_RC_ERROR,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"Failed to destroy shared action.");
return -EINVAL;
@@ -804,7 +860,7 @@ bnxt_ulp_tunnel_decap_set(struct rte_eth_dev *eth_dev,
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(eth_dev);
if (ulp_ctx == NULL) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"ULP context uninitialized");
@@ -812,7 +868,7 @@ bnxt_ulp_tunnel_decap_set(struct rte_eth_dev *eth_dev,
}
if (tunnel == NULL) {
- BNXT_TF_DBG(ERR, "No tunnel specified\n");
+ BNXT_DRV_DBG(ERR, "No tunnel specified\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ATTR, NULL,
"no tunnel specified");
@@ -820,7 +876,7 @@ bnxt_ulp_tunnel_decap_set(struct rte_eth_dev *eth_dev,
}
if (tunnel->type != RTE_FLOW_ITEM_TYPE_VXLAN) {
- BNXT_TF_DBG(ERR, "Tunnel type unsupported\n");
+ BNXT_DRV_DBG(ERR, "Tunnel type unsupported\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ATTR, NULL,
"tunnel type unsupported");
@@ -861,7 +917,7 @@ bnxt_ulp_tunnel_match(struct rte_eth_dev *eth_dev,
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(eth_dev);
if (ulp_ctx == NULL) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"ULP context uninitialized");
@@ -869,7 +925,7 @@ bnxt_ulp_tunnel_match(struct rte_eth_dev *eth_dev,
}
if (tunnel == NULL) {
- BNXT_TF_DBG(ERR, "No tunnel specified\n");
+ BNXT_DRV_DBG(ERR, "No tunnel specified\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"no tunnel specified");
@@ -877,7 +933,7 @@ bnxt_ulp_tunnel_match(struct rte_eth_dev *eth_dev,
}
if (tunnel->type != RTE_FLOW_ITEM_TYPE_VXLAN) {
- BNXT_TF_DBG(ERR, "Tunnel type unsupported\n");
+ BNXT_DRV_DBG(ERR, "Tunnel type unsupported\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"tunnel type unsupported");
@@ -917,14 +973,14 @@ bnxt_ulp_tunnel_decap_release(struct rte_eth_dev *eth_dev,
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(eth_dev);
if (ulp_ctx == NULL) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"ULP context uninitialized");
return -EINVAL;
}
if (num_actions != BNXT_ULP_TUNNEL_OFFLOAD_NUM_ITEMS) {
- BNXT_TF_DBG(ERR, "num actions is invalid\n");
+ BNXT_DRV_DBG(ERR, "num actions is invalid\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ATTR, NULL,
"num actions is invalid");
@@ -953,14 +1009,14 @@ bnxt_ulp_tunnel_item_release(struct rte_eth_dev *eth_dev,
ulp_ctx = bnxt_ulp_eth_dev_ptr2_cntxt_get(eth_dev);
if (ulp_ctx == NULL) {
- BNXT_TF_DBG(ERR, "ULP context is not initialized\n");
+ BNXT_DRV_DBG(ERR, "ULP context is not initialized\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"ULP context uninitialized");
return -EINVAL;
}
if (num_items != BNXT_ULP_TUNNEL_OFFLOAD_NUM_ITEMS) {
- BNXT_TF_DBG(ERR, "num items is invalid\n");
+ BNXT_DRV_DBG(ERR, "num items is invalid\n");
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ATTR, NULL,
"num items is invalid");
@@ -27,6 +27,7 @@
#include "tfp.h"
#include "bnxt_tf_common.h"
+#include "bnxt_ulp_tf.h"
#include "ulp_rte_parser.h"
#include "ulp_matcher.h"
#include "ulp_flow_db.h"
@@ -67,8 +68,8 @@ bnxt_meter_global_cfg_update(struct bnxt *bp,
tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
rc = tf_get_global_cfg(tfp, &parms);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to get global cfg 0x%x rc:%d\n",
- type, rc);
+ BNXT_DRV_DBG(ERR, "Failed to get global cfg 0x%x rc:%d\n",
+ type, rc);
return rc;
}
@@ -79,8 +80,8 @@ bnxt_meter_global_cfg_update(struct bnxt *bp,
rc = tf_set_global_cfg(tfp, &parms);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to set global cfg 0x%x rc:%d\n",
- type, rc);
+ BNXT_DRV_DBG(ERR, "Failed to set global cfg 0x%x rc:%d\n",
+ type, rc);
return rc;
}
return rc;
@@ -107,7 +108,7 @@ bnxt_flow_meter_init(struct bnxt *bp)
BNXT_THOR_FMTCR_NUM_MET_MET_1K,
1);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to set rx meter configuration\n");
+ BNXT_DRV_DBG(ERR, "Failed to set rx meter configuration\n");
goto jump_to_error;
}
@@ -116,7 +117,7 @@ bnxt_flow_meter_init(struct bnxt *bp)
BNXT_THOR_FMTCR_NUM_MET_MET_1K,
1);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to set tx meter configuration\n");
+ BNXT_DRV_DBG(ERR, "Failed to set tx meter configuration\n");
goto jump_to_error;
}
@@ -129,7 +130,7 @@ bnxt_flow_meter_init(struct bnxt *bp)
BNXT_THOR_FMTCR_INTERVAL_1K,
1);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to set rx meter interval\n");
+ BNXT_DRV_DBG(ERR, "Failed to set rx meter interval\n");
goto jump_to_error;
}
@@ -138,12 +139,12 @@ bnxt_flow_meter_init(struct bnxt *bp)
BNXT_THOR_FMTCR_INTERVAL_1K,
1);
if (rc) {
- BNXT_TF_DBG(ERR, "Failed to set tx meter interval\n");
+ BNXT_DRV_DBG(ERR, "Failed to set tx meter interval\n");
goto jump_to_error;
}
bnxt_meter_initialized = 1;
- BNXT_TF_DBG(DEBUG, "Bnxt flow meter has been initialized\n");
+ BNXT_DRV_DBG(DEBUG, "Bnxt flow meter has been initialized\n");
return rc;
jump_to_error:
@@ -399,7 +400,7 @@ bnxt_flow_meter_profile_add(struct rte_eth_dev *dev,
struct bnxt_ulp_context *ulp_ctx;
struct ulp_rte_parser_params params;
struct ulp_rte_act_prop *act_prop = ¶ms.act_prop;
- struct bnxt_ulp_mapper_create_parms mparms = { 0 };
+ struct bnxt_ulp_mapper_parms mparms = { 0 };
uint32_t act_tid;
uint16_t func_id;
int ret;
@@ -446,17 +447,18 @@ bnxt_flow_meter_profile_add(struct rte_eth_dev *dev,
if (ulp_port_db_port_func_id_get(ulp_ctx,
dev->data->port_id,
&func_id)) {
- BNXT_TF_DBG(ERR, "conversion of port to func id failed\n");
+ BNXT_DRV_DBG(ERR, "conversion of port to func id failed\n");
goto act_error;
}
/* Protect flow creation */
if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
- BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
+ BNXT_DRV_DBG(ERR, "Flow db lock acquire failed\n");
goto act_error;
}
- ret = ulp_mapper_flow_create(params.ulp_ctx, &mparms);
+ ret = ulp_mapper_flow_create(params.ulp_ctx, &mparms,
+ (void *)error);
bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx);
if (ret)
@@ -483,7 +485,7 @@ bnxt_flow_meter_profile_delete(struct rte_eth_dev *dev,
struct bnxt_ulp_context *ulp_ctx;
struct ulp_rte_parser_params params;
struct ulp_rte_act_prop *act_prop = ¶ms.act_prop;
- struct bnxt_ulp_mapper_create_parms mparms = { 0 };
+ struct bnxt_ulp_mapper_parms mparms = { 0 };
uint32_t act_tid;
uint16_t func_id;
int ret;
@@ -527,24 +529,25 @@ bnxt_flow_meter_profile_delete(struct rte_eth_dev *dev,
if (ulp_port_db_port_func_id_get(ulp_ctx,
dev->data->port_id,
&func_id)) {
- BNXT_TF_DBG(ERR, "conversion of port to func id failed\n");
+ BNXT_DRV_DBG(ERR, "conversion of port to func id failed\n");
goto parse_error;
}
/* Protect flow creation */
if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
- BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
+ BNXT_DRV_DBG(ERR, "Flow db lock acquire failed\n");
goto parse_error;
}
- ret = ulp_mapper_flow_create(params.ulp_ctx, &mparms);
+ ret = ulp_mapper_flow_create(params.ulp_ctx, &mparms,
+ (void *)error);
bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx);
if (ret)
goto parse_error;
- BNXT_TF_DBG(DEBUG, "Bnxt flow meter profile %d deleted\n",
- meter_profile_id);
+ BNXT_DRV_DBG(DEBUG, "Bnxt flow meter profile %d deleted\n",
+ meter_profile_id);
return 0;
@@ -566,7 +569,7 @@ bnxt_flow_meter_create(struct rte_eth_dev *dev, uint32_t meter_id,
struct bnxt_ulp_context *ulp_ctx;
struct ulp_rte_parser_params pparams;
struct ulp_rte_act_prop *act_prop = &pparams.act_prop;
- struct bnxt_ulp_mapper_create_parms mparms = { 0 };
+ struct bnxt_ulp_mapper_parms mparms = { 0 };
uint32_t act_tid;
uint16_t func_id;
bool meter_en = params->meter_enable ? true : false;
@@ -619,23 +622,24 @@ bnxt_flow_meter_create(struct rte_eth_dev *dev, uint32_t meter_id,
if (ulp_port_db_port_func_id_get(ulp_ctx,
dev->data->port_id,
&func_id)) {
- BNXT_TF_DBG(ERR, "conversion of port to func id failed\n");
+ BNXT_DRV_DBG(ERR, "conversion of port to func id failed\n");
goto parse_error;
}
/* Protect flow creation */
if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
- BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
+ BNXT_DRV_DBG(ERR, "Flow db lock acquire failed\n");
goto parse_error;
}
- ret = ulp_mapper_flow_create(pparams.ulp_ctx, &mparms);
+ ret = ulp_mapper_flow_create(pparams.ulp_ctx, &mparms,
+ (void *)error);
bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx);
if (ret)
goto parse_error;
- BNXT_TF_DBG(DEBUG, "Bnxt flow meter %d is created\n", meter_id);
+ BNXT_DRV_DBG(DEBUG, "Bnxt flow meter %d is created\n", meter_id);
return 0;
parse_error:
@@ -656,7 +660,7 @@ bnxt_flow_meter_destroy(struct rte_eth_dev *dev,
struct bnxt_ulp_context *ulp_ctx;
struct ulp_rte_parser_params pparams;
struct ulp_rte_act_prop *act_prop = &pparams.act_prop;
- struct bnxt_ulp_mapper_create_parms mparms = { 0 };
+ struct bnxt_ulp_mapper_parms mparms = { 0 };
uint32_t act_tid;
uint16_t func_id;
int ret;
@@ -700,23 +704,24 @@ bnxt_flow_meter_destroy(struct rte_eth_dev *dev,
if (ulp_port_db_port_func_id_get(ulp_ctx,
dev->data->port_id,
&func_id)) {
- BNXT_TF_DBG(ERR, "conversion of port to func id failed\n");
+ BNXT_DRV_DBG(ERR, "conversion of port to func id failed\n");
goto parse_error;
}
/* Protect flow creation */
if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
- BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
+ BNXT_DRV_DBG(ERR, "Flow db lock acquire failed\n");
goto parse_error;
}
- ret = ulp_mapper_flow_create(pparams.ulp_ctx, &mparms);
+ ret = ulp_mapper_flow_create(pparams.ulp_ctx, &mparms,
+ (void *)error);
bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx);
if (ret)
goto parse_error;
- BNXT_TF_DBG(DEBUG, "Bnxt flow meter %d is deleted\n", meter_id);
+ BNXT_DRV_DBG(DEBUG, "Bnxt flow meter %d is deleted\n", meter_id);
return 0;
parse_error:
@@ -738,7 +743,7 @@ bnxt_flow_meter_enable_set(struct rte_eth_dev *dev,
struct bnxt_ulp_context *ulp_ctx;
struct ulp_rte_parser_params pparams;
struct ulp_rte_act_prop *act_prop = &pparams.act_prop;
- struct bnxt_ulp_mapper_create_parms mparms = { 0 };
+ struct bnxt_ulp_mapper_parms mparms = { 0 };
uint32_t act_tid;
uint16_t func_id;
int ret;
@@ -784,24 +789,25 @@ bnxt_flow_meter_enable_set(struct rte_eth_dev *dev,
if (ulp_port_db_port_func_id_get(ulp_ctx,
dev->data->port_id,
&func_id)) {
- BNXT_TF_DBG(ERR, "conversion of port to func id failed\n");
+ BNXT_DRV_DBG(ERR, "conversion of port to func id failed\n");
goto parse_error;
}
/* Protect flow creation */
if (bnxt_ulp_cntxt_acquire_fdb_lock(ulp_ctx)) {
- BNXT_TF_DBG(ERR, "Flow db lock acquire failed\n");
+ BNXT_DRV_DBG(ERR, "Flow db lock acquire failed\n");
goto parse_error;
}
- ret = ulp_mapper_flow_create(pparams.ulp_ctx, &mparms);
+ ret = ulp_mapper_flow_create(pparams.ulp_ctx, &mparms,
+ (void *)error);
bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx);
if (ret)
goto parse_error;
- BNXT_TF_DBG(DEBUG, "Bnxt flow meter %d is %s\n",
- meter_id, val ? "enabled" : "disabled");
+ BNXT_DRV_DBG(DEBUG, "Bnxt flow meter %d is %s\n",
+ meter_id, val ? "enabled" : "disabled");
return 0;
parse_error:
new file mode 100644
@@ -0,0 +1,1513 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2019-2021 Broadcom
+ * All rights reserved.
+ */
+
+#include <rte_log.h>
+#include <rte_malloc.h>
+#include <rte_flow.h>
+#include <rte_flow_driver.h>
+#include <rte_tailq.h>
+#include <rte_spinlock.h>
+
+#include "bnxt.h"
+#include "bnxt_ulp.h"
+#include "bnxt_ulp_tf.h"
+#include "bnxt_tf_common.h"
+#include "hsi_struct_def_dpdk.h"
+#include "tf_core.h"
+#include "tf_ext_flow_handle.h"
+
+#include "ulp_template_db_enum.h"
+#include "ulp_template_struct.h"
+#include "ulp_mark_mgr.h"
+#include "ulp_fc_mgr.h"
+#include "ulp_flow_db.h"
+#include "ulp_mapper.h"
+#include "ulp_matcher.h"
+#include "ulp_port_db.h"
+#include "ulp_tun.h"
+#include "ulp_ha_mgr.h"
+#include "bnxt_tf_pmd_shim.h"
+#include "ulp_template_db_tbl.h"
+
+/* Function to set the tfp session details from the ulp context. */
+int32_t
+bnxt_ulp_cntxt_tfp_set(struct bnxt_ulp_context *ulp,
+ enum bnxt_ulp_session_type s_type,
+ struct tf *tfp)
+{
+ uint32_t idx = 0;
+ enum bnxt_ulp_tfo_type tfo_type = BNXT_ULP_TFO_TYPE_TF;
+
+ if (ulp == NULL)
+ return -EINVAL;
+
+ if (ULP_MULTI_SHARED_IS_SUPPORTED(ulp)) {
+ if (s_type & BNXT_ULP_SESSION_TYPE_SHARED)
+ idx = 1;
+ else if (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC)
+ idx = 2;
+
+ } else {
+ if ((s_type & BNXT_ULP_SESSION_TYPE_SHARED) ||
+ (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC))
+ idx = 1;
+ }
+
+ ulp->g_tfp[idx] = tfp;
+
+ if (tfp == NULL) {
+ uint32_t i = 0;
+ while (i < BNXT_ULP_SESSION_MAX && ulp->g_tfp[i] == NULL)
+ i++;
+ if (i == BNXT_ULP_SESSION_MAX)
+ ulp->tfo_type = BNXT_ULP_TFO_TYPE_INVALID;
+ } else {
+ ulp->tfo_type = tfo_type;
+ }
+ return 0;
+}
+
+/* Function to get the tfp session details from the ulp context. */
+struct tf *
+bnxt_ulp_cntxt_tfp_get(struct bnxt_ulp_context *ulp,
+ enum bnxt_ulp_session_type s_type)
+{
+ uint32_t idx = 0;
+
+ if (ulp == NULL)
+ return NULL;
+
+ if (ulp->tfo_type != BNXT_ULP_TFO_TYPE_TF) {
+ BNXT_DRV_DBG(ERR, "Wrong tf type %d != %d\n",
+ ulp->tfo_type, BNXT_ULP_TFO_TYPE_TF);
+ return NULL;
+ }
+
+ if (ULP_MULTI_SHARED_IS_SUPPORTED(ulp)) {
+ if (s_type & BNXT_ULP_SESSION_TYPE_SHARED)
+ idx = 1;
+ else if (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC)
+ idx = 2;
+ } else {
+ if ((s_type & BNXT_ULP_SESSION_TYPE_SHARED) ||
+ (s_type & BNXT_ULP_SESSION_TYPE_SHARED_WC))
+ idx = 1;
+ }
+ return (struct tf *)ulp->g_tfp[idx];
+}
+
+struct tf *bnxt_get_tfp_session(struct bnxt *bp, enum bnxt_session_type type)
+{
+ return (type >= BNXT_SESSION_TYPE_LAST) ?
+ &bp->tfp[BNXT_SESSION_TYPE_REGULAR] : &bp->tfp[type];
+}
+
+struct tf *
+bnxt_ulp_bp_tfp_get(struct bnxt *bp, enum bnxt_ulp_session_type type)
+{
+ enum bnxt_session_type btype;
+
+ if (type & BNXT_ULP_SESSION_TYPE_SHARED)
+ btype = BNXT_SESSION_TYPE_SHARED_COMMON;
+ else if (type & BNXT_ULP_SESSION_TYPE_SHARED_WC)
+ btype = BNXT_SESSION_TYPE_SHARED_WC;
+ else
+ btype = BNXT_SESSION_TYPE_REGULAR;
+
+ return bnxt_get_tfp_session(bp, btype);
+}
+
+static int32_t
+ulp_tf_named_resources_calc(struct bnxt_ulp_context *ulp_ctx,
+ struct bnxt_ulp_glb_resource_info *info,
+ uint32_t num,
+ enum bnxt_ulp_session_type stype,
+ struct tf_session_resources *res)
+{
+ uint32_t dev_id = BNXT_ULP_DEVICE_ID_LAST, res_type, i;
+ enum tf_dir dir;
+ uint8_t app_id;
+ int32_t rc = 0;
+
+ if (ulp_ctx == NULL || info == NULL || res == NULL || num == 0) {
+ BNXT_DRV_DBG(ERR, "Invalid parms to named resources calc.\n");
+ return -EINVAL;
+ }
+
+ rc = bnxt_ulp_cntxt_app_id_get(ulp_ctx, &app_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get the app id from ulp.\n");
+ return -EINVAL;
+ }
+
+ rc = bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get the dev id from ulp.\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < num; i++) {
+ if (dev_id != info[i].device_id || app_id != info[i].app_id)
+ continue;
+ /* check to see if the session type matches only then include */
+ if ((stype || info[i].session_type) &&
+ !(info[i].session_type & stype))
+ continue;
+
+ dir = info[i].direction;
+ res_type = info[i].resource_type;
+
+ switch (info[i].resource_func) {
+ case BNXT_ULP_RESOURCE_FUNC_IDENTIFIER:
+ res->ident_cnt[dir].cnt[res_type]++;
+ break;
+ case BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE:
+ res->tbl_cnt[dir].cnt[res_type]++;
+ break;
+ case BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE:
+ res->tcam_cnt[dir].cnt[res_type]++;
+ break;
+ case BNXT_ULP_RESOURCE_FUNC_EM_TABLE:
+ res->em_cnt[dir].cnt[res_type]++;
+ break;
+ default:
+ BNXT_DRV_DBG(ERR, "Unknown resource func (0x%x)\n,",
+ info[i].resource_func);
+ continue;
+ }
+ }
+
+ return 0;
+}
+
+static int32_t
+ulp_tf_unnamed_resources_calc(struct bnxt_ulp_context *ulp_ctx,
+ struct bnxt_ulp_resource_resv_info *info,
+ uint32_t num,
+ enum bnxt_ulp_session_type stype,
+ struct tf_session_resources *res)
+{
+ uint32_t dev_id, res_type, i;
+ enum tf_dir dir;
+ uint8_t app_id;
+ int32_t rc = 0;
+
+ if (ulp_ctx == NULL || res == NULL || info == NULL || num == 0) {
+ BNXT_DRV_DBG(ERR, "Invalid arguments to get resources.\n");
+ return -EINVAL;
+ }
+
+ rc = bnxt_ulp_cntxt_app_id_get(ulp_ctx, &app_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get the app id from ulp.\n");
+ return -EINVAL;
+ }
+
+ rc = bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get the dev id from ulp.\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < num; i++) {
+ if (app_id != info[i].app_id || dev_id != info[i].device_id)
+ continue;
+
+ /* check to see if the session type matches only then include */
+ if ((stype || info[i].session_type) &&
+ !(info[i].session_type & stype))
+ continue;
+
+ dir = info[i].direction;
+ res_type = info[i].resource_type;
+
+ switch (info[i].resource_func) {
+ case BNXT_ULP_RESOURCE_FUNC_IDENTIFIER:
+ res->ident_cnt[dir].cnt[res_type] = info[i].count;
+ break;
+ case BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE:
+ res->tbl_cnt[dir].cnt[res_type] = info[i].count;
+ break;
+ case BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE:
+ res->tcam_cnt[dir].cnt[res_type] = info[i].count;
+ break;
+ case BNXT_ULP_RESOURCE_FUNC_EM_TABLE:
+ res->em_cnt[dir].cnt[res_type] = info[i].count;
+ break;
+ default:
+ break;
+ }
+ }
+ return 0;
+}
+
+static int32_t
+ulp_tf_resources_get(struct bnxt_ulp_context *ulp_ctx,
+ enum bnxt_ulp_session_type stype,
+ struct tf_session_resources *res)
+{
+ struct bnxt_ulp_resource_resv_info *unnamed = NULL;
+ uint32_t unum;
+ int32_t rc = 0;
+
+ if (ulp_ctx == NULL || res == NULL) {
+ BNXT_DRV_DBG(ERR, "Invalid arguments to get resources.\n");
+ return -EINVAL;
+ }
+
+ unnamed = bnxt_ulp_resource_resv_list_get(&unum);
+ if (unnamed == NULL) {
+ BNXT_DRV_DBG(ERR, "Unable to get resource resv list.\n");
+ return -EINVAL;
+ }
+
+ rc = ulp_tf_unnamed_resources_calc(ulp_ctx, unnamed, unum, stype, res);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Unable to calc resources for session.\n");
+
+ return rc;
+}
+
+static int32_t
+ulp_tf_shared_session_resources_get(struct bnxt_ulp_context *ulp_ctx,
+ enum bnxt_ulp_session_type stype,
+ struct tf_session_resources *res)
+{
+ struct bnxt_ulp_resource_resv_info *unnamed;
+ struct bnxt_ulp_glb_resource_info *named;
+ uint32_t unum = 0, nnum = 0;
+ int32_t rc;
+
+ if (ulp_ctx == NULL || res == NULL) {
+ BNXT_DRV_DBG(ERR, "Invalid arguments to get resources.\n");
+ return -EINVAL;
+ }
+
+ /* Make sure the resources are zero before accumulating. */
+ memset(res, 0, sizeof(struct tf_session_resources));
+
+ if (bnxt_ulp_cntxt_ha_enabled(ulp_ctx) &&
+ stype == BNXT_ULP_SESSION_TYPE_SHARED)
+ stype = ulp_ctx->cfg_data->hu_session_type;
+
+ /*
+ * Shared resources are comprised of both named and unnamed resources.
+ * First get the unnamed counts, and then add the named to the result.
+ */
+ /* Get the baseline counts */
+ unnamed = bnxt_ulp_app_resource_resv_list_get(&unum);
+ if (unum) {
+ rc = ulp_tf_unnamed_resources_calc(ulp_ctx, unnamed,
+ unum, stype, res);
+ if (rc) {
+ BNXT_DRV_DBG(ERR,
+ "Unable to calc resources for shared session.\n");
+ return -EINVAL;
+ }
+ }
+
+ /* Get the named list and add the totals */
+ named = bnxt_ulp_app_glb_resource_info_list_get(&nnum);
+ /* No need to calc resources, none to calculate */
+ if (!nnum)
+ return 0;
+
+ rc = ulp_tf_named_resources_calc(ulp_ctx, named, nnum, stype, res);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Unable to calc named resources\n");
+
+ return rc;
+}
+
+/* Function to set the hot upgrade support into the context */
+static int
+ulp_tf_multi_shared_session_support_set(struct bnxt *bp,
+ enum bnxt_ulp_device_id devid,
+ uint32_t fw_hu_update)
+{
+ struct bnxt_ulp_context *ulp_ctx = bp->ulp_ctx;
+ struct tf_get_version_parms v_params = { 0 };
+ struct tf *tfp;
+ int32_t rc = 0;
+ int32_t new_fw = 0;
+
+ v_params.device_type = bnxt_ulp_cntxt_convert_dev_id(devid);
+ v_params.bp = bp;
+
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ rc = tf_get_version(tfp, &v_params);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get tf version.\n");
+ return rc;
+ }
+
+ if (v_params.major == 1 && v_params.minor == 0 &&
+ v_params.update == 1) {
+ new_fw = 1;
+ }
+ /* if the version update is greater than 0 then set support for
+ * multiple version
+ */
+ if (new_fw) {
+ ulp_ctx->cfg_data->ulp_flags |= BNXT_ULP_MULTI_SHARED_SUPPORT;
+ ulp_ctx->cfg_data->hu_session_type =
+ BNXT_ULP_SESSION_TYPE_SHARED;
+ }
+ if (!new_fw && fw_hu_update) {
+ ulp_ctx->cfg_data->ulp_flags &= ~BNXT_ULP_HIGH_AVAIL_ENABLED;
+ ulp_ctx->cfg_data->hu_session_type =
+ BNXT_ULP_SESSION_TYPE_SHARED |
+ BNXT_ULP_SESSION_TYPE_SHARED_OWC;
+ }
+
+ if (!new_fw && !fw_hu_update) {
+ ulp_ctx->cfg_data->hu_session_type =
+ BNXT_ULP_SESSION_TYPE_SHARED |
+ BNXT_ULP_SESSION_TYPE_SHARED_OWC;
+ }
+
+ return rc;
+}
+
+static int32_t
+ulp_tf_cntxt_app_caps_init(struct bnxt *bp,
+ uint8_t app_id, uint32_t dev_id)
+{
+ struct bnxt_ulp_app_capabilities_info *info;
+ uint32_t num = 0, fw = 0;
+ uint16_t i;
+ bool found = false;
+ struct bnxt_ulp_context *ulp_ctx = bp->ulp_ctx;
+
+ if (ULP_APP_DEV_UNSUPPORTED_ENABLED(ulp_ctx->cfg_data->ulp_flags)) {
+ BNXT_DRV_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
+ app_id, dev_id);
+ return -EINVAL;
+ }
+
+ info = bnxt_ulp_app_cap_list_get(&num);
+ if (!info || !num) {
+ BNXT_DRV_DBG(ERR, "Failed to get app capabilities.\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < num; i++) {
+ if (info[i].app_id != app_id || info[i].device_id != dev_id)
+ continue;
+ found = true;
+ if (info[i].flags & BNXT_ULP_APP_CAP_SHARED_EN)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_SHARED_SESSION_ENABLED;
+ if (info[i].flags & BNXT_ULP_APP_CAP_HOT_UPGRADE_EN)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_HIGH_AVAIL_ENABLED;
+ if (info[i].flags & BNXT_ULP_APP_CAP_UNICAST_ONLY)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_UNICAST_ONLY;
+ if (info[i].flags & BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_TOS_PROTO_SUPPORT;
+ if (info[i].flags & BNXT_ULP_APP_CAP_BC_MC_SUPPORT)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_BC_MC_SUPPORT;
+ if (info[i].flags & BNXT_ULP_APP_CAP_SOCKET_DIRECT) {
+ /* Enable socket direction only if MR is enabled in fw*/
+ if (BNXT_MULTIROOT_EN(bp)) {
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_SOCKET_DIRECT;
+ BNXT_DRV_DBG(INFO,
+ "Socket Direct feature is enabled\n");
+ }
+ }
+ if (info[i].flags & BNXT_ULP_APP_CAP_HA_DYNAMIC) {
+ /* Read the environment variable to determine hot up */
+ if (!bnxt_pmd_get_hot_up_config()) {
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_HA_DYNAMIC;
+ /* reset Hot upgrade, dynamically disabled */
+ ulp_ctx->cfg_data->ulp_flags &=
+ ~BNXT_ULP_HIGH_AVAIL_ENABLED;
+ ulp_ctx->cfg_data->def_session_type =
+ BNXT_ULP_SESSION_TYPE_DEFAULT_NON_HA;
+ BNXT_DRV_DBG(INFO, "Hot upgrade disabled.\n");
+ }
+ }
+ if (info[i].flags & BNXT_ULP_APP_CAP_SRV6)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_SRV6;
+
+ if (info[i].flags & BNXT_ULP_APP_CAP_L2_ETYPE)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_L2_ETYPE;
+
+ if (info[i].flags & BNXT_ULP_APP_CAP_CUST_VXLAN)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_CUST_VXLAN_SUPPORT;
+
+ bnxt_ulp_cntxt_vxlan_ip_port_set(ulp_ctx, info[i].vxlan_ip_port);
+ bnxt_ulp_cntxt_vxlan_port_set(ulp_ctx, info[i].vxlan_port);
+ bnxt_ulp_cntxt_ecpri_udp_port_set(ulp_ctx, info[i].ecpri_udp_port);
+ bnxt_ulp_vxlan_gpe_next_proto_set(ulp_ctx, info[i].tunnel_next_proto);
+ bnxt_ulp_num_key_recipes_set(ulp_ctx,
+ info[i].num_key_recipes_per_dir);
+
+ /* set the shared session support from firmware */
+ fw = info[i].upgrade_fw_update;
+ if (ULP_HIGH_AVAIL_IS_ENABLED(ulp_ctx->cfg_data->ulp_flags) &&
+ ulp_tf_multi_shared_session_support_set(bp, dev_id, fw)) {
+ BNXT_DRV_DBG(ERR,
+ "Unable to get shared session support\n");
+ return -EINVAL;
+ }
+ bnxt_ulp_cntxt_ha_reg_set(ulp_ctx, info[i].ha_reg_state,
+ info[i].ha_reg_cnt);
+ ulp_ctx->cfg_data->ha_pool_id = info[i].ha_pool_id;
+ ulp_ctx->cfg_data->default_priority = info[i].default_priority;
+ }
+ if (!found) {
+ BNXT_DRV_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
+ app_id, dev_id);
+ ulp_ctx->cfg_data->ulp_flags |= BNXT_ULP_APP_DEV_UNSUPPORTED;
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static inline uint32_t
+ulp_tf_session_idx_get(enum bnxt_ulp_session_type session_type) {
+ if (session_type & BNXT_ULP_SESSION_TYPE_SHARED)
+ return 1;
+ else if (session_type & BNXT_ULP_SESSION_TYPE_SHARED_WC)
+ return 2;
+ return 0;
+}
+
+/* Function to set the tfp session details in session */
+static int32_t
+ulp_tf_session_tfp_set(struct bnxt_ulp_session_state *session,
+ enum bnxt_ulp_session_type session_type,
+ struct tf *tfp)
+{
+ uint32_t idx = ulp_tf_session_idx_get(session_type);
+ struct tf *local_tfp;
+ int32_t rc = 0;
+
+ if (!session->session_opened[idx]) {
+ local_tfp = rte_zmalloc("bnxt_ulp_session_tfp",
+ sizeof(struct tf), 0);
+
+ if (local_tfp == NULL) {
+ BNXT_DRV_DBG(DEBUG, "Failed to alloc session tfp\n");
+ return -ENOMEM;
+ }
+ local_tfp->session = tfp->session;
+ session->g_tfp[idx] = local_tfp;
+ session->session_opened[idx] = 1;
+ }
+ return rc;
+}
+
+/* Function to get the tfp session details in session */
+static struct tf_session_info *
+ulp_tf_session_tfp_get(struct bnxt_ulp_session_state *session,
+ enum bnxt_ulp_session_type session_type)
+{
+ uint32_t idx = ulp_tf_session_idx_get(session_type);
+ struct tf *local_tfp = session->g_tfp[idx];
+
+ if (session->session_opened[idx])
+ return local_tfp->session;
+ return NULL;
+}
+
+static uint32_t
+ulp_tf_session_is_open(struct bnxt_ulp_session_state *session,
+ enum bnxt_ulp_session_type session_type)
+{
+ uint32_t idx = ulp_tf_session_idx_get(session_type);
+
+ return session->session_opened[idx];
+}
+
+/* Function to reset the tfp session details in session */
+static void
+ulp_tf_session_tfp_reset(struct bnxt_ulp_session_state *session,
+ enum bnxt_ulp_session_type session_type)
+{
+ uint32_t idx = ulp_tf_session_idx_get(session_type);
+
+ if (session->session_opened[idx]) {
+ session->session_opened[idx] = 0;
+ rte_free(session->g_tfp[idx]);
+ session->g_tfp[idx] = NULL;
+ }
+}
+
+static void
+ulp_tf_ctx_shared_session_close(struct bnxt *bp,
+ enum bnxt_ulp_session_type session_type,
+ struct bnxt_ulp_session_state *session)
+{
+ struct tf *tfp;
+ int32_t rc;
+
+ tfp = bnxt_ulp_cntxt_tfp_get(bp->ulp_ctx, session_type);
+ if (!tfp) {
+ /*
+ * Log it under debug since this is likely a case of the
+ * shared session not being created. For example, a failed
+ * initialization.
+ */
+ BNXT_DRV_DBG(DEBUG, "Failed to get shared tfp on close.\n");
+ return;
+ }
+ rc = tf_close_session(tfp);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to close the shared session rc=%d.\n",
+ rc);
+ (void)bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, session_type, NULL);
+ ulp_tf_session_tfp_reset(session, session_type);
+}
+
+static int32_t
+ulp_tf_ctx_shared_session_open(struct bnxt *bp,
+ enum bnxt_ulp_session_type session_type,
+ struct bnxt_ulp_session_state *session)
+{
+ struct rte_eth_dev *ethdev = bp->eth_dev;
+ struct tf_session_resources *resources;
+ struct tf_open_session_parms parms;
+ size_t nb;
+ uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST;
+ int32_t rc = 0;
+ uint8_t app_id;
+ struct tf *tfp;
+ uint8_t pool_id;
+
+ memset(&parms, 0, sizeof(parms));
+ rc = rte_eth_dev_get_name_by_port(ethdev->data->port_id,
+ parms.ctrl_chan_name);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Invalid port %d, rc = %d\n",
+ ethdev->data->port_id, rc);
+ return rc;
+ }
+
+ /* On multi-host system, adjust ctrl_chan_name to avoid confliction */
+ if (BNXT_MH(bp)) {
+ rc = ulp_ctx_mh_get_session_name(bp, &parms);
+ if (rc)
+ return rc;
+ }
+
+ resources = &parms.resources;
+
+ /*
+ * Need to account for size of ctrl_chan_name and 1 extra for Null
+ * terminator
+ */
+ nb = sizeof(parms.ctrl_chan_name) - strlen(parms.ctrl_chan_name) - 1;
+
+ /*
+ * Build the ctrl_chan_name with shared token.
+ * When HA is enabled, the WC TCAM needs extra management by the core,
+ * so add the wc_tcam string to the control channel.
+ */
+ pool_id = bp->ulp_ctx->cfg_data->ha_pool_id;
+ if (!bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
+ if (bnxt_ulp_cntxt_ha_enabled(bp->ulp_ctx))
+ strncat(parms.ctrl_chan_name, "-tf_shared-wc_tcam", nb);
+ else
+ strncat(parms.ctrl_chan_name, "-tf_shared", nb);
+ } else if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
+ if (session_type == BNXT_ULP_SESSION_TYPE_SHARED) {
+ strncat(parms.ctrl_chan_name, "-tf_shared", nb);
+ } else if (session_type == BNXT_ULP_SESSION_TYPE_SHARED_WC) {
+ char session_pool_name[64];
+
+ sprintf(session_pool_name, "-tf_shared-pool%d",
+ pool_id);
+
+ if (nb >= strlen(session_pool_name)) {
+ strncat(parms.ctrl_chan_name, session_pool_name, nb);
+ } else {
+ BNXT_DRV_DBG(ERR, "No space left for session_name\n");
+ return -EINVAL;
+ }
+ }
+ }
+
+ rc = ulp_tf_shared_session_resources_get(bp->ulp_ctx, session_type,
+ resources);
+ if (rc)
+ return rc;
+
+ rc = bnxt_ulp_cntxt_app_id_get(bp->ulp_ctx, &app_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get the app id from ulp.\n");
+ return -EINVAL;
+ }
+
+ rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &ulp_dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get device id from ulp.\n");
+ return rc;
+ }
+
+ tfp = bnxt_ulp_bp_tfp_get(bp, session_type);
+ parms.device_type = bnxt_ulp_cntxt_convert_dev_id(ulp_dev_id);
+ parms.bp = bp;
+
+ /*
+ * Open the session here, but the collect the resources during the
+ * mapper initialization.
+ */
+ rc = tf_open_session(tfp, &parms);
+ if (rc)
+ return rc;
+
+ if (parms.shared_session_creator)
+ BNXT_DRV_DBG(DEBUG, "Shared session creator.\n");
+ else
+ BNXT_DRV_DBG(DEBUG, "Shared session attached.\n");
+
+ /* Save the shared session in global data */
+ rc = ulp_tf_session_tfp_set(session, session_type, tfp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add shared tfp to session\n");
+ return rc;
+ }
+
+ rc = bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, session_type, tfp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add shared tfp to ulp (%d)\n", rc);
+ return rc;
+ }
+
+ return rc;
+}
+
+static int32_t
+ulp_tf_ctx_shared_session_attach(struct bnxt *bp,
+ struct bnxt_ulp_session_state *ses)
+{
+ enum bnxt_ulp_session_type type;
+ struct tf *tfp;
+ int32_t rc = 0;
+
+ /* Simply return success if shared session not enabled */
+ if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) {
+ type = BNXT_ULP_SESSION_TYPE_SHARED;
+ tfp = bnxt_ulp_bp_tfp_get(bp, type);
+ tfp->session = ulp_tf_session_tfp_get(ses, type);
+ rc = ulp_tf_ctx_shared_session_open(bp, type, ses);
+ }
+
+ if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
+ type = BNXT_ULP_SESSION_TYPE_SHARED_WC;
+ tfp = bnxt_ulp_bp_tfp_get(bp, type);
+ tfp->session = ulp_tf_session_tfp_get(ses, type);
+ rc = ulp_tf_ctx_shared_session_open(bp, type, ses);
+ }
+
+ if (!rc)
+ bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, true);
+
+ return rc;
+}
+
+static void
+ulp_tf_ctx_shared_session_detach(struct bnxt *bp)
+{
+ struct tf *tfp;
+
+ if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) {
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_SHARED);
+ if (tfp->session) {
+ tf_close_session(tfp);
+ tfp->session = NULL;
+ }
+ }
+ if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_SHARED_WC);
+ if (tfp->session) {
+ tf_close_session(tfp);
+ tfp->session = NULL;
+ }
+ }
+ bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, false);
+}
+
+/*
+ * Initialize an ULP session.
+ * An ULP session will contain all the resources needed to support rte flow
+ * offloads. A session is initialized as part of rte_eth_device start.
+ * A single vswitch instance can have multiple uplinks which means
+ * rte_eth_device start will be called for each of these devices.
+ * ULP session manager will make sure that a single ULP session is only
+ * initialized once. Apart from this, it also initializes MARK database,
+ * EEM table & flow database. ULP session manager also manages a list of
+ * all opened ULP sessions.
+ */
+static int32_t
+ulp_tf_ctx_session_open(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ struct rte_eth_dev *ethdev = bp->eth_dev;
+ int32_t rc = 0;
+ struct tf_open_session_parms params;
+ struct tf_session_resources *resources;
+ uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST;
+ uint8_t app_id;
+ struct tf *tfp;
+
+ memset(¶ms, 0, sizeof(params));
+
+ rc = rte_eth_dev_get_name_by_port(ethdev->data->port_id,
+ params.ctrl_chan_name);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Invalid port %d, rc = %d\n",
+ ethdev->data->port_id, rc);
+ return rc;
+ }
+
+ /* On multi-host system, adjust ctrl_chan_name to avoid confliction */
+ if (BNXT_MH(bp)) {
+ rc = ulp_ctx_mh_get_session_name(bp, ¶ms);
+ if (rc)
+ return rc;
+ }
+
+ rc = bnxt_ulp_cntxt_app_id_get(bp->ulp_ctx, &app_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get the app id from ulp.\n");
+ return -EINVAL;
+ }
+
+ rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &ulp_dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get device id from ulp.\n");
+ return rc;
+ }
+
+ params.device_type = bnxt_ulp_cntxt_convert_dev_id(ulp_dev_id);
+ resources = ¶ms.resources;
+ rc = ulp_tf_resources_get(bp->ulp_ctx,
+ BNXT_ULP_SESSION_TYPE_DEFAULT,
+ resources);
+ if (rc)
+ return rc;
+
+ params.bp = bp;
+
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ rc = tf_open_session(tfp, ¶ms);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to open TF session - %s, rc = %d\n",
+ params.ctrl_chan_name, rc);
+ return -EINVAL;
+ }
+ rc = ulp_tf_session_tfp_set(session, BNXT_ULP_SESSION_TYPE_DEFAULT, tfp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to set TF session - %s, rc = %d\n",
+ params.ctrl_chan_name, rc);
+ return -EINVAL;
+ }
+ return rc;
+}
+
+/*
+ * Close the ULP session.
+ * It takes the ulp context pointer.
+ */
+static void
+ulp_tf_ctx_session_close(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ struct tf *tfp;
+
+ /* close the session in the hardware */
+ if (ulp_tf_session_is_open(session, BNXT_ULP_SESSION_TYPE_DEFAULT)) {
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ tf_close_session(tfp);
+ }
+ ulp_tf_session_tfp_reset(session, BNXT_ULP_SESSION_TYPE_DEFAULT);
+}
+
+static void
+ulp_tf_init_tbl_scope_parms(struct bnxt *bp,
+ struct tf_alloc_tbl_scope_parms *params)
+{
+ struct bnxt_ulp_device_params *dparms;
+ uint32_t dev_id;
+ int rc;
+
+ rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &dev_id);
+ if (rc)
+ /* TBD: For now, just use default. */
+ dparms = 0;
+ else
+ dparms = bnxt_ulp_device_params_get(dev_id);
+
+ /*
+ * Set the flush timer for EEM entries. The value is in 100ms intervals,
+ * so 100 is 10s.
+ */
+ params->hw_flow_cache_flush_timer = 100;
+
+ if (!dparms) {
+ params->rx_max_key_sz_in_bits = BNXT_ULP_DFLT_RX_MAX_KEY;
+ params->rx_max_action_entry_sz_in_bits =
+ BNXT_ULP_DFLT_RX_MAX_ACTN_ENTRY;
+ params->rx_mem_size_in_mb = BNXT_ULP_DFLT_RX_MEM;
+ params->rx_num_flows_in_k = BNXT_ULP_RX_NUM_FLOWS;
+
+ params->tx_max_key_sz_in_bits = BNXT_ULP_DFLT_TX_MAX_KEY;
+ params->tx_max_action_entry_sz_in_bits =
+ BNXT_ULP_DFLT_TX_MAX_ACTN_ENTRY;
+ params->tx_mem_size_in_mb = BNXT_ULP_DFLT_TX_MEM;
+ params->tx_num_flows_in_k = BNXT_ULP_TX_NUM_FLOWS;
+ } else {
+ params->rx_max_key_sz_in_bits = BNXT_ULP_DFLT_RX_MAX_KEY;
+ params->rx_max_action_entry_sz_in_bits =
+ BNXT_ULP_DFLT_RX_MAX_ACTN_ENTRY;
+ params->rx_mem_size_in_mb = BNXT_ULP_DFLT_RX_MEM;
+ params->rx_num_flows_in_k =
+ dparms->ext_flow_db_num_entries / 1024;
+
+ params->tx_max_key_sz_in_bits = BNXT_ULP_DFLT_TX_MAX_KEY;
+ params->tx_max_action_entry_sz_in_bits =
+ BNXT_ULP_DFLT_TX_MAX_ACTN_ENTRY;
+ params->tx_mem_size_in_mb = BNXT_ULP_DFLT_TX_MEM;
+ params->tx_num_flows_in_k =
+ dparms->ext_flow_db_num_entries / 1024;
+ }
+ BNXT_DRV_DBG(INFO, "Table Scope initialized with %uK flows.\n",
+ params->rx_num_flows_in_k);
+}
+
+/* Initialize Extended Exact Match host memory. */
+static int32_t
+ulp_tf_eem_tbl_scope_init(struct bnxt *bp)
+{
+ struct tf_alloc_tbl_scope_parms params = {0};
+ struct bnxt_ulp_device_params *dparms;
+ enum bnxt_ulp_flow_mem_type mtype;
+ uint32_t dev_id;
+ struct tf *tfp;
+ int rc;
+
+ /* Get the dev specific number of flows that needed to be supported. */
+ if (bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &dev_id)) {
+ BNXT_DRV_DBG(ERR, "Invalid device id\n");
+ return -EINVAL;
+ }
+
+ dparms = bnxt_ulp_device_params_get(dev_id);
+ if (!dparms) {
+ BNXT_DRV_DBG(ERR, "could not fetch the device params\n");
+ return -ENODEV;
+ }
+
+ if (bnxt_ulp_cntxt_mem_type_get(bp->ulp_ctx, &mtype))
+ return -EINVAL;
+ if (mtype != BNXT_ULP_FLOW_MEM_TYPE_EXT) {
+ BNXT_DRV_DBG(INFO, "Table Scope alloc is not required\n");
+ return 0;
+ }
+
+ ulp_tf_init_tbl_scope_parms(bp, ¶ms);
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ rc = tf_alloc_tbl_scope(tfp, ¶ms);
+ if (rc) {
+ BNXT_DRV_DBG(ERR,
+ "Unable to allocate eem table scope rc = %d\n",
+ rc);
+ return rc;
+ }
+
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ BNXT_DRV_DBG(DEBUG, "TableScope=0x%0x %d\n",
+ params.tbl_scope_id,
+ params.tbl_scope_id);
+#endif
+
+ rc = bnxt_ulp_cntxt_tbl_scope_id_set(bp->ulp_ctx, params.tbl_scope_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to set table scope id\n");
+ return rc;
+ }
+
+ return 0;
+}
+
+/* Free Extended Exact Match host memory */
+static int32_t
+ulp_tf_eem_tbl_scope_deinit(struct bnxt *bp, struct bnxt_ulp_context *ulp_ctx)
+{
+ struct tf_free_tbl_scope_parms params = {0};
+ struct tf *tfp;
+ int32_t rc = 0;
+ struct bnxt_ulp_device_params *dparms;
+ enum bnxt_ulp_flow_mem_type mtype;
+ uint32_t dev_id;
+
+ if (!ulp_ctx || !ulp_ctx->cfg_data)
+ return -EINVAL;
+
+ tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ if (!tfp) {
+ BNXT_DRV_DBG(ERR, "Failed to get the truflow pointer\n");
+ return -EINVAL;
+ }
+
+ /* Get the dev specific number of flows that needed to be supported. */
+ if (bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &dev_id)) {
+ BNXT_DRV_DBG(ERR, "Invalid device id\n");
+ return -EINVAL;
+ }
+
+ dparms = bnxt_ulp_device_params_get(dev_id);
+ if (!dparms) {
+ BNXT_DRV_DBG(ERR, "could not fetch the device params\n");
+ return -ENODEV;
+ }
+
+ if (bnxt_ulp_cntxt_mem_type_get(ulp_ctx, &mtype))
+ return -EINVAL;
+ if (mtype != BNXT_ULP_FLOW_MEM_TYPE_EXT) {
+ BNXT_DRV_DBG(INFO, "Table Scope free is not required\n");
+ return 0;
+ }
+
+ rc = bnxt_ulp_cntxt_tbl_scope_id_get(ulp_ctx, ¶ms.tbl_scope_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to get the table scope id\n");
+ return -EINVAL;
+ }
+
+ rc = tf_free_tbl_scope(tfp, ¶ms);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to free table scope\n");
+ return -EINVAL;
+ }
+ return rc;
+}
+
+/* The function to free and deinit the ulp context data. */
+static int32_t
+ulp_tf_ctx_deinit(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ /* close the tf session */
+ ulp_tf_ctx_session_close(bp, session);
+
+ /* The shared session must be closed last. */
+ if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx))
+ ulp_tf_ctx_shared_session_close(bp, BNXT_ULP_SESSION_TYPE_SHARED,
+ session);
+
+ if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx))
+ ulp_tf_ctx_shared_session_close(bp,
+ BNXT_ULP_SESSION_TYPE_SHARED_WC,
+ session);
+
+ bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, false);
+
+ /* Free the contents */
+ if (session->cfg_data) {
+ rte_free(session->cfg_data);
+ bp->ulp_ctx->cfg_data = NULL;
+ session->cfg_data = NULL;
+ }
+ return 0;
+}
+
+/* The function to allocate and initialize the ulp context data. */
+static int32_t
+ulp_tf_ctx_init(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ struct bnxt_ulp_data *ulp_data;
+ int32_t rc = 0;
+ enum bnxt_ulp_device_id devid;
+ enum bnxt_ulp_session_type stype;
+ struct tf *tfp;
+
+ /* Initialize the context entries list */
+ bnxt_ulp_cntxt_list_init();
+
+ /* Add the context to the context entries list */
+ rc = bnxt_ulp_cntxt_list_add(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add the context list entry\n");
+ return -ENOMEM;
+ }
+
+ /* Allocate memory to hold ulp context data. */
+ ulp_data = rte_zmalloc("bnxt_ulp_data",
+ sizeof(struct bnxt_ulp_data), 0);
+ if (!ulp_data) {
+ BNXT_DRV_DBG(ERR, "Failed to allocate memory for ulp data\n");
+ return -ENOMEM;
+ }
+
+ /* Increment the ulp context data reference count usage. */
+ bp->ulp_ctx->cfg_data = ulp_data;
+ session->cfg_data = ulp_data;
+ ulp_data->ref_cnt++;
+ ulp_data->ulp_flags |= BNXT_ULP_VF_REP_ENABLED;
+
+ rc = bnxt_ulp_devid_get(bp, &devid);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to determine device for ULP init.\n");
+ goto error_deinit;
+ }
+
+ rc = bnxt_ulp_cntxt_dev_id_set(bp->ulp_ctx, devid);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to set device for ULP init.\n");
+ goto error_deinit;
+ }
+
+ rc = bnxt_ulp_cntxt_app_id_set(bp->ulp_ctx, bp->app_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to set app_id for ULP init.\n");
+ goto error_deinit;
+ }
+ BNXT_DRV_DBG(DEBUG, "Ulp initialized with app id %d\n", bp->app_id);
+
+ rc = ulp_tf_cntxt_app_caps_init(bp, bp->app_id, devid);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to set caps for app(%x)/dev(%x)\n",
+ bp->app_id, devid);
+ goto error_deinit;
+ }
+
+ if (BNXT_TESTPMD_EN(bp)) {
+ ulp_data->ulp_flags &= ~BNXT_ULP_VF_REP_ENABLED;
+ BNXT_DRV_DBG(ERR, "Enabled Testpmd forward mode\n");
+ }
+
+ /*
+ * Shared session must be created before first regular session but after
+ * the ulp_ctx is valid.
+ */
+ if (bnxt_ulp_cntxt_shared_session_enabled(bp->ulp_ctx)) {
+ rc = ulp_tf_ctx_shared_session_open(bp,
+ BNXT_ULP_SESSION_TYPE_SHARED,
+ session);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to open shared session (%d)\n",
+ rc);
+ goto error_deinit;
+ }
+ }
+
+ /* Multiple session support */
+ if (bnxt_ulp_cntxt_multi_shared_session_enabled(bp->ulp_ctx)) {
+ stype = BNXT_ULP_SESSION_TYPE_SHARED_WC;
+ rc = ulp_tf_ctx_shared_session_open(bp, stype, session);
+ if (rc) {
+ BNXT_DRV_DBG(ERR,
+ "Unable to open shared wc session (%d)\n",
+ rc);
+ goto error_deinit;
+ }
+ }
+ bnxt_ulp_cntxt_num_shared_clients_set(bp->ulp_ctx, true);
+
+ /* Open the ulp session. */
+ rc = ulp_tf_ctx_session_open(bp, session);
+ if (rc)
+ goto error_deinit;
+
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT, tfp);
+ return rc;
+
+error_deinit:
+ session->session_opened[BNXT_ULP_SESSION_TYPE_DEFAULT] = 1;
+ (void)ulp_tf_ctx_deinit(bp, session);
+ return rc;
+}
+
+/* The function to initialize ulp dparms with devargs */
+static int32_t
+ulp_tf_dparms_init(struct bnxt *bp, struct bnxt_ulp_context *ulp_ctx)
+{
+ struct bnxt_ulp_device_params *dparms;
+ uint32_t dev_id = BNXT_ULP_DEVICE_ID_LAST;
+
+ if (!bp->max_num_kflows) {
+ /* Defaults to Internal */
+ bnxt_ulp_cntxt_mem_type_set(ulp_ctx,
+ BNXT_ULP_FLOW_MEM_TYPE_INT);
+ return 0;
+ }
+
+ /* The max_num_kflows were set, so move to external */
+ if (bnxt_ulp_cntxt_mem_type_set(ulp_ctx, BNXT_ULP_FLOW_MEM_TYPE_EXT))
+ return -EINVAL;
+
+ if (bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &dev_id)) {
+ BNXT_DRV_DBG(DEBUG, "Failed to get device id\n");
+ return -EINVAL;
+ }
+
+ dparms = bnxt_ulp_device_params_get(dev_id);
+ if (!dparms) {
+ BNXT_DRV_DBG(DEBUG, "Failed to get device parms\n");
+ return -EINVAL;
+ }
+
+ /* num_flows = max_num_kflows * 1024 */
+ dparms->ext_flow_db_num_entries = bp->max_num_kflows * 1024;
+ /* GFID = 2 * num_flows */
+ dparms->mark_db_gfid_entries = dparms->ext_flow_db_num_entries * 2;
+ BNXT_DRV_DBG(DEBUG, "Set the number of flows = %" PRIu64 "\n",
+ dparms->ext_flow_db_num_entries);
+
+ return 0;
+}
+
+static int32_t
+ulp_tf_ctx_attach(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ int32_t rc = 0;
+ uint32_t flags, dev_id = BNXT_ULP_DEVICE_ID_LAST;
+ struct tf *tfp;
+ uint8_t app_id;
+
+ /* Increment the ulp context data reference count usage. */
+ bp->ulp_ctx->cfg_data = session->cfg_data;
+ bp->ulp_ctx->cfg_data->ref_cnt++;
+
+ /* update the session details in bnxt tfp */
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ tfp->session = ulp_tf_session_tfp_get(session,
+ BNXT_ULP_SESSION_TYPE_DEFAULT);
+
+ /* Add the context to the context entries list */
+ rc = bnxt_ulp_cntxt_list_add(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add the context list entry\n");
+ return -EINVAL;
+ }
+
+ /*
+ * The supported flag will be set during the init. Use it now to
+ * know if we should go through the attach.
+ */
+ rc = bnxt_ulp_cntxt_app_id_get(bp->ulp_ctx, &app_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get the app id from ulp.\n");
+ return -EINVAL;
+ }
+
+ rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable do get the dev_id.\n");
+ return -EINVAL;
+ }
+
+ flags = bp->ulp_ctx->cfg_data->ulp_flags;
+ if (ULP_APP_DEV_UNSUPPORTED_ENABLED(flags)) {
+ BNXT_DRV_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
+ app_id, dev_id);
+ return -EINVAL;
+ }
+
+ /* Create a TF Client */
+ rc = ulp_tf_ctx_session_open(bp, session);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to open ctxt session, rc:%d\n", rc);
+ tfp->session = NULL;
+ return rc;
+ }
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, BNXT_ULP_SESSION_TYPE_DEFAULT, tfp);
+
+ /*
+ * Attach to the shared session, must be called after the
+ * ulp_ctx_attach in order to ensure that ulp data is available
+ * for attaching.
+ */
+ rc = ulp_tf_ctx_shared_session_attach(bp, session);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed attach to shared session (%d)", rc);
+
+ return rc;
+}
+
+static void
+ulp_tf_ctx_detach(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session __rte_unused)
+{
+ struct tf *tfp;
+
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ if (tfp->session) {
+ tf_close_session(tfp);
+ tfp->session = NULL;
+ }
+
+ /* always detach/close shared after the session. */
+ ulp_tf_ctx_shared_session_detach(bp);
+}
+
+/*
+ * Internal api to enable NAT feature.
+ * Set set_flag to 1 to set the value or zero to reset the value.
+ * returns 0 on success.
+ */
+static int32_t
+ulp_tf_global_cfg_update(struct bnxt *bp,
+ enum tf_dir dir,
+ enum tf_global_config_type type,
+ uint32_t offset,
+ uint32_t value,
+ uint32_t set_flag)
+{
+ uint32_t global_cfg = 0;
+ int rc;
+ struct tf_global_cfg_parms parms = { 0 };
+ struct tf *tfp;
+
+ /* Initialize the params */
+ parms.dir = dir,
+ parms.type = type,
+ parms.offset = offset,
+ parms.config = (uint8_t *)&global_cfg,
+ parms.config_sz_in_bytes = sizeof(global_cfg);
+
+ tfp = bnxt_ulp_bp_tfp_get(bp, BNXT_ULP_SESSION_TYPE_DEFAULT);
+ rc = tf_get_global_cfg(tfp, &parms);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to get global cfg 0x%x rc:%d\n",
+ type, rc);
+ return rc;
+ }
+
+ if (set_flag)
+ global_cfg |= value;
+ else
+ global_cfg &= ~value;
+
+ /* SET the register RE_CFA_REG_ACT_TECT */
+ rc = tf_set_global_cfg(tfp, &parms);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to set global cfg 0x%x rc:%d\n",
+ type, rc);
+ return rc;
+ }
+ return rc;
+}
+
+/*
+ * When a port is deinit'ed by dpdk. This function is called
+ * and this function clears the ULP context and rest of the
+ * infrastructure associated with it.
+ */
+static void
+ulp_tf_deinit(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ bool ha_enabled;
+
+ if (!bp->ulp_ctx || !bp->ulp_ctx->cfg_data)
+ return;
+
+ ha_enabled = bnxt_ulp_cntxt_ha_enabled(bp->ulp_ctx);
+ if (ha_enabled &&
+ ulp_tf_session_is_open(session, BNXT_ULP_SESSION_TYPE_DEFAULT)) {
+ int32_t rc = ulp_ha_mgr_close(bp->ulp_ctx);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to close HA (%d)\n", rc);
+ }
+
+ /* cleanup the eem table scope */
+ ulp_tf_eem_tbl_scope_deinit(bp, bp->ulp_ctx);
+
+ /* cleanup the flow database */
+ ulp_flow_db_deinit(bp->ulp_ctx);
+
+ /* Delete the Mark database */
+ ulp_mark_db_deinit(bp->ulp_ctx);
+
+ /* cleanup the ulp mapper */
+ ulp_mapper_deinit(bp->ulp_ctx);
+
+ /* cleanup the ulp matcher */
+ ulp_matcher_deinit(bp->ulp_ctx);
+
+ /* Delete the Flow Counter Manager */
+ ulp_fc_mgr_deinit(bp->ulp_ctx);
+
+ /* Delete the Port database */
+ ulp_port_db_deinit(bp->ulp_ctx);
+
+ /* Disable NAT feature */
+ (void)ulp_tf_global_cfg_update(bp, TF_DIR_RX, TF_TUNNEL_ENCAP,
+ TF_TUNNEL_ENCAP_NAT,
+ BNXT_ULP_NAT_OUTER_MOST_FLAGS, 0);
+
+ (void)ulp_tf_global_cfg_update(bp, TF_DIR_TX, TF_TUNNEL_ENCAP,
+ TF_TUNNEL_ENCAP_NAT,
+ BNXT_ULP_NAT_OUTER_MOST_FLAGS, 0);
+
+ /* free the flow db lock */
+ pthread_mutex_destroy(&bp->ulp_ctx->cfg_data->flow_db_lock);
+
+ if (ha_enabled)
+ ulp_ha_mgr_deinit(bp->ulp_ctx);
+
+ /* Delete the ulp context and tf session and free the ulp context */
+ ulp_tf_ctx_deinit(bp, session);
+ BNXT_DRV_DBG(DEBUG, "ulp ctx has been deinitialized\n");
+}
+
+/*
+ * When a port is initialized by dpdk. This functions is called
+ * and this function initializes the ULP context and rest of the
+ * infrastructure associated with it.
+ */
+static int32_t
+ulp_tf_init(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ int rc;
+ uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST;
+
+ /* Allocate and Initialize the ulp context. */
+ rc = ulp_tf_ctx_init(bp, session);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the ulp context\n");
+ goto jump_to_error;
+ }
+
+ rc = pthread_mutex_init(&bp->ulp_ctx->cfg_data->flow_db_lock, NULL);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to initialize flow db lock\n");
+ goto jump_to_error;
+ }
+
+ /* Initialize ulp dparms with values devargs passed */
+ rc = ulp_tf_dparms_init(bp, bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize the dparms\n");
+ goto jump_to_error;
+ }
+
+ /* create the port database */
+ rc = ulp_port_db_init(bp->ulp_ctx, bp->port_cnt);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the port database\n");
+ goto jump_to_error;
+ }
+
+ /* Create the Mark database. */
+ rc = ulp_mark_db_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the mark database\n");
+ goto jump_to_error;
+ }
+
+ /* Create the flow database. */
+ rc = ulp_flow_db_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the flow database\n");
+ goto jump_to_error;
+ }
+
+ /* Create the eem table scope. */
+ rc = ulp_tf_eem_tbl_scope_init(bp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the eem scope table\n");
+ goto jump_to_error;
+ }
+
+ rc = ulp_matcher_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize ulp matcher\n");
+ goto jump_to_error;
+ }
+
+ rc = ulp_mapper_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize ulp mapper\n");
+ goto jump_to_error;
+ }
+
+ rc = ulp_fc_mgr_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize ulp flow counter mgr\n");
+ goto jump_to_error;
+ }
+
+ /*
+ * Enable NAT feature. Set the global configuration register
+ * Tunnel encap to enable NAT with the reuse of existing inner
+ * L2 header smac and dmac
+ */
+ rc = ulp_tf_global_cfg_update(bp, TF_DIR_RX, TF_TUNNEL_ENCAP,
+ TF_TUNNEL_ENCAP_NAT,
+ BNXT_ULP_NAT_OUTER_MOST_FLAGS, 1);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to set rx global configuration\n");
+ goto jump_to_error;
+ }
+
+ rc = ulp_tf_global_cfg_update(bp, TF_DIR_TX, TF_TUNNEL_ENCAP,
+ TF_TUNNEL_ENCAP_NAT,
+ BNXT_ULP_NAT_OUTER_MOST_FLAGS, 1);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to set tx global configuration\n");
+ goto jump_to_error;
+ }
+
+ if (bnxt_ulp_cntxt_ha_enabled(bp->ulp_ctx)) {
+ rc = ulp_ha_mgr_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize HA %d\n", rc);
+ goto jump_to_error;
+ }
+ rc = ulp_ha_mgr_open(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to Process HA Open %d\n", rc);
+ goto jump_to_error;
+ }
+ }
+
+ rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &ulp_dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get device id from ulp.\n");
+ return rc;
+ }
+
+ if (ulp_dev_id == BNXT_ULP_DEVICE_ID_THOR) {
+ rc = bnxt_flow_meter_init(bp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to config meter\n");
+ goto jump_to_error;
+ }
+ }
+
+ BNXT_DRV_DBG(DEBUG, "ulp ctx has been initialized\n");
+ return rc;
+
+jump_to_error:
+ bp->ulp_ctx->ops->ulp_deinit(bp, session);
+ return rc;
+}
+
+const struct bnxt_ulp_core_ops bnxt_ulp_tf_core_ops = {
+ .ulp_ctx_attach = ulp_tf_ctx_attach,
+ .ulp_ctx_detach = ulp_tf_ctx_detach,
+ .ulp_deinit = ulp_tf_deinit,
+ .ulp_init = ulp_tf_init,
+};
new file mode 100644
@@ -0,0 +1,24 @@
+#ifndef _BNXT_ULP_TF_H_
+#define _BNXT_ULP_TF_H_
+
+#include "bnxt.h"
+#include <inttypes.h>
+#include "ulp_template_db_enum.h"
+
+struct tf *
+bnxt_ulp_bp_tfp_get(struct bnxt *bp, enum bnxt_ulp_session_type type);
+
+struct tf *
+bnxt_get_tfp_session(struct bnxt *bp, enum bnxt_session_type type);
+
+/* Function to set the tfp session details in the ulp context. */
+int32_t
+bnxt_ulp_cntxt_tfp_set(struct bnxt_ulp_context *ulp,
+ enum bnxt_ulp_session_type s_type,
+ struct tf *tfp);
+
+/* Function to get the tfp session details from ulp context. */
+struct tf *
+bnxt_ulp_cntxt_tfp_get(struct bnxt_ulp_context *ulp,
+ enum bnxt_ulp_session_type s_type);
+#endif
new file mode 100644
@@ -0,0 +1,971 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2019-2021 Broadcom
+ * All rights reserved.
+ */
+
+#include <rte_log.h>
+#include <rte_malloc.h>
+#include <rte_flow.h>
+#include <rte_flow_driver.h>
+#include <rte_tailq.h>
+#include <rte_spinlock.h>
+
+#include "bnxt.h"
+#include "bnxt_ulp.h"
+#include "bnxt_ulp_tfc.h"
+#include "bnxt_tf_common.h"
+#include "hsi_struct_def_dpdk.h"
+#include "tf_core.h"
+#include "tf_ext_flow_handle.h"
+
+#include "ulp_template_db_enum.h"
+#include "ulp_template_struct.h"
+#include "ulp_mark_mgr.h"
+#include "ulp_fc_mgr.h"
+#include "ulp_flow_db.h"
+#include "ulp_mapper.h"
+#include "ulp_matcher.h"
+#include "ulp_port_db.h"
+#include "ulp_tun.h"
+#include "ulp_ha_mgr.h"
+#include "bnxt_tf_pmd_shim.h"
+#include "ulp_template_db_tbl.h"
+
+/* define to enable shared table scope */
+#define TFC_SHARED_TBL_SCOPE_ENABLE 0
+
+bool
+bnxt_ulp_cntxt_shared_tbl_scope_enabled(struct bnxt_ulp_context *ulp_ctx)
+{
+ uint32_t flags = 0;
+ int rc;
+
+ rc = bnxt_ulp_cntxt_ptr2_ulp_flags_get(ulp_ctx, &flags);
+ if (rc)
+ return false;
+ return !!(flags & BNXT_ULP_SHARED_TBL_SCOPE_ENABLED);
+}
+
+int32_t
+bnxt_ulp_cntxt_tfcp_set(struct bnxt_ulp_context *ulp, struct tfc *tfcp)
+{
+ enum bnxt_ulp_tfo_type tfo_type = BNXT_ULP_TFO_TYPE_TFC;
+
+ if (ulp == NULL)
+ return -EINVAL;
+
+ /* If NULL, this is invalidating an entry */
+ if (tfcp == NULL)
+ tfo_type = BNXT_ULP_TFO_TYPE_INVALID;
+ ulp->tfo_type = tfo_type;
+ ulp->tfcp = tfcp;
+
+ return 0;
+}
+
+struct tfc *
+bnxt_ulp_cntxt_tfcp_get(struct bnxt_ulp_context *ulp)
+{
+ if (ulp == NULL)
+ return NULL;
+
+ if (ulp->tfo_type != BNXT_ULP_TFO_TYPE_TFC) {
+ BNXT_DRV_DBG(ERR, "Wrong tf type %d != %d\n",
+ ulp->tfo_type, BNXT_ULP_TFO_TYPE_TFC);
+ return NULL;
+ }
+
+ return (struct tfc *)ulp->tfcp;
+}
+
+uint32_t
+bnxt_ulp_cntxt_tbl_scope_max_pools_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ /* Max pools can be 1 or greater, always return workable value */
+ if (ulp_ctx != NULL &&
+ ulp_ctx->cfg_data != NULL &&
+ ulp_ctx->cfg_data->max_pools)
+ return ulp_ctx->cfg_data->max_pools;
+ return 1;
+}
+
+int32_t
+bnxt_ulp_cntxt_tbl_scope_max_pools_set(struct bnxt_ulp_context *ulp_ctx,
+ uint32_t max)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return -EINVAL;
+
+ /* make sure that max is at least 1 */
+ if (max == 0)
+ max = 1;
+
+ ulp_ctx->cfg_data->max_pools = max;
+ return 0;
+}
+
+enum tfc_tbl_scope_bucket_factor
+bnxt_ulp_cntxt_em_mulitplier_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return TFC_TBL_SCOPE_BUCKET_FACTOR_1;
+
+ return ulp_ctx->cfg_data->em_multiplier;
+}
+
+int32_t
+bnxt_ulp_cntxt_em_mulitplier_set(struct bnxt_ulp_context *ulp_ctx,
+ enum tfc_tbl_scope_bucket_factor factor)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return -EINVAL;
+ ulp_ctx->cfg_data->em_multiplier = factor;
+ return 0;
+}
+
+uint32_t
+bnxt_ulp_cntxt_num_rx_flows_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return 0;
+ return ulp_ctx->cfg_data->num_rx_flows;
+}
+
+int32_t
+bnxt_ulp_cntxt_num_rx_flows_set(struct bnxt_ulp_context *ulp_ctx, uint32_t num)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return -EINVAL;
+ ulp_ctx->cfg_data->num_rx_flows = num;
+ return 0;
+}
+
+uint32_t
+bnxt_ulp_cntxt_num_tx_flows_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return 0;
+ return ulp_ctx->cfg_data->num_tx_flows;
+}
+
+int32_t
+bnxt_ulp_cntxt_num_tx_flows_set(struct bnxt_ulp_context *ulp_ctx, uint32_t num)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return -EINVAL;
+ ulp_ctx->cfg_data->num_tx_flows = num;
+ return 0;
+}
+
+uint16_t
+bnxt_ulp_cntxt_em_rx_key_max_sz_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return 0;
+ return ulp_ctx->cfg_data->em_rx_key_max_sz;
+}
+
+int32_t
+bnxt_ulp_cntxt_em_rx_key_max_sz_set(struct bnxt_ulp_context *ulp_ctx,
+ uint16_t max)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return -EINVAL;
+
+ ulp_ctx->cfg_data->em_rx_key_max_sz = max;
+ return 0;
+}
+
+uint16_t
+bnxt_ulp_cntxt_em_tx_key_max_sz_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return 0;
+ return ulp_ctx->cfg_data->em_tx_key_max_sz;
+}
+
+int32_t
+bnxt_ulp_cntxt_em_tx_key_max_sz_set(struct bnxt_ulp_context *ulp_ctx,
+ uint16_t max)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return -EINVAL;
+
+ ulp_ctx->cfg_data->em_tx_key_max_sz = max;
+ return 0;
+}
+
+uint16_t
+bnxt_ulp_cntxt_act_rec_rx_max_sz_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return 0;
+ return ulp_ctx->cfg_data->act_rx_max_sz;
+}
+
+int32_t
+bnxt_ulp_cntxt_act_rec_rx_max_sz_set(struct bnxt_ulp_context *ulp_ctx,
+ int16_t max)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return -EINVAL;
+
+ ulp_ctx->cfg_data->act_rx_max_sz = max;
+ return 0;
+}
+
+uint16_t
+bnxt_ulp_cntxt_act_rec_tx_max_sz_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return 0;
+ return ulp_ctx->cfg_data->act_tx_max_sz;
+}
+
+int32_t
+bnxt_ulp_cntxt_act_rec_tx_max_sz_set(struct bnxt_ulp_context *ulp_ctx,
+ int16_t max)
+{
+ if (ulp_ctx == NULL || ulp_ctx->cfg_data == NULL)
+ return -EINVAL;
+
+ ulp_ctx->cfg_data->act_tx_max_sz = max;
+ return 0;
+}
+
+uint32_t
+bnxt_ulp_cntxt_page_sz_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (ulp_ctx == NULL)
+ return 0;
+
+ return ulp_ctx->cfg_data->page_sz;
+}
+
+int32_t
+bnxt_ulp_cntxt_page_sz_set(struct bnxt_ulp_context *ulp_ctx,
+ uint32_t page_sz)
+{
+ if (ulp_ctx == NULL)
+ return -EINVAL;
+ ulp_ctx->cfg_data->page_sz = page_sz;
+ return 0;
+}
+
+static int32_t
+ulp_tfc_dparms_init(struct bnxt *bp,
+ struct bnxt_ulp_context *ulp_ctx,
+ uint32_t dev_id)
+{
+ struct bnxt_ulp_device_params *dparms;
+ uint32_t num_flows = 0, num_rx_flows = 0, num_tx_flows = 0;
+
+ /* The max_num_kflows were set, so move to external */
+ if (bnxt_ulp_cntxt_mem_type_set(ulp_ctx, BNXT_ULP_FLOW_MEM_TYPE_EXT))
+ return -EINVAL;
+
+ dparms = bnxt_ulp_device_params_get(dev_id);
+ if (!dparms) {
+ BNXT_DRV_DBG(DEBUG, "Failed to get device parms\n");
+ return -EINVAL;
+ }
+
+ if (bp->max_num_kflows) {
+ num_flows = bp->max_num_kflows * 1024;
+ dparms->ext_flow_db_num_entries = bp->max_num_kflows * 1024;
+ } else {
+ num_rx_flows = bnxt_ulp_cntxt_num_rx_flows_get(ulp_ctx);
+ num_tx_flows = bnxt_ulp_cntxt_num_tx_flows_get(ulp_ctx);
+ num_flows = num_rx_flows + num_tx_flows;
+ }
+
+ dparms->ext_flow_db_num_entries = num_flows;
+
+ /* GFID = 2 * num_flows */
+ dparms->mark_db_gfid_entries = dparms->ext_flow_db_num_entries * 2;
+ BNXT_DRV_DBG(DEBUG, "Set the number of flows = %" PRIu64 "\n",
+ dparms->ext_flow_db_num_entries);
+
+ return 0;
+}
+
+static void
+ulp_tfc_tbl_scope_deinit(struct bnxt *bp)
+{
+ uint16_t fid = 0, fid_cnt = 0;
+ struct tfc *tfcp;
+ uint8_t tsid = 0;
+ int32_t rc;
+
+ tfcp = bnxt_ulp_cntxt_tfcp_get(bp->ulp_ctx);
+ if (tfcp == NULL)
+ return;
+
+ rc = bnxt_ulp_cntxt_tsid_get(bp->ulp_ctx, &tsid);
+
+ rc = bnxt_ulp_cntxt_fid_get(bp->ulp_ctx, &fid);
+ if (rc)
+ return;
+
+ rc = tfc_tbl_scope_cpm_free(tfcp, tsid);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed Freeing CPM TSID:%d FID:%d\n",
+ tsid, fid);
+ else
+ BNXT_DRV_DBG(DEBUG, "Freed CPM TSID:%d FID: %d\n", tsid, fid);
+
+ rc = tfc_tbl_scope_mem_free(tfcp, fid, tsid);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed freeing tscope mem TSID:%d FID:%d\n",
+ tsid, fid);
+ else
+ BNXT_DRV_DBG(DEBUG, "Freed tscope mem TSID:%d FID:%d\n",
+ tsid, fid);
+
+ rc = tfc_tbl_scope_fid_rem(tfcp, fid, tsid, &fid_cnt);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed removing FID from TSID:%d FID:%d\n",
+ tsid, fid);
+ else
+ BNXT_DRV_DBG(DEBUG, "Removed FID from TSID:%d FID:%d\n",
+ tsid, fid);
+}
+
+static int32_t
+ulp_tfc_tbl_scope_init(struct bnxt *bp)
+{
+ struct tfc_tbl_scope_mem_alloc_parms mem_parms;
+ struct tfc_tbl_scope_size_query_parms qparms = { 0 };
+ uint8_t max_lkup_sz[CFA_DIR_MAX], max_act_sz[CFA_DIR_MAX];
+ struct tfc_tbl_scope_cpm_alloc_parms cparms;
+ uint16_t fid, max_pools;
+ bool first = true, shared = false;
+ uint8_t tsid = 0;
+ struct tfc *tfcp;
+ int32_t rc = 0;
+
+ tfcp = bnxt_ulp_cntxt_tfcp_get(bp->ulp_ctx);
+ if (tfcp == NULL)
+ return -EINVAL;
+
+ fid = bp->fw_fid;
+
+ max_pools = bnxt_ulp_cntxt_tbl_scope_max_pools_get(bp->ulp_ctx);
+ max_lkup_sz[CFA_DIR_RX] =
+ bnxt_ulp_cntxt_em_rx_key_max_sz_get(bp->ulp_ctx);
+ max_lkup_sz[CFA_DIR_TX] =
+ bnxt_ulp_cntxt_em_tx_key_max_sz_get(bp->ulp_ctx);
+ max_act_sz[CFA_DIR_RX] =
+ bnxt_ulp_cntxt_act_rec_rx_max_sz_get(bp->ulp_ctx);
+ max_act_sz[CFA_DIR_TX] =
+ bnxt_ulp_cntxt_act_rec_tx_max_sz_get(bp->ulp_ctx);
+
+ shared = bnxt_ulp_cntxt_shared_tbl_scope_enabled(bp->ulp_ctx);
+
+#if (TFC_SHARED_TBL_SCOPE_ENABLE == 1)
+ /* Temporary code for testing shared table scopes until ULP
+ * usage defined.
+ */
+ if (!BNXT_PF(bp)) {
+ shared = true;
+ max_pools = 8;
+ }
+#endif
+ /* Calculate the sizes for setting up memory */
+ qparms.shared = shared;
+ qparms.max_pools = max_pools;
+ qparms.factor = bnxt_ulp_cntxt_em_mulitplier_get(bp->ulp_ctx);
+ qparms.flow_cnt[CFA_DIR_RX] =
+ bnxt_ulp_cntxt_num_rx_flows_get(bp->ulp_ctx);
+ qparms.flow_cnt[CFA_DIR_TX] =
+ bnxt_ulp_cntxt_num_tx_flows_get(bp->ulp_ctx);
+ qparms.key_sz_in_bytes[CFA_DIR_RX] = max_lkup_sz[CFA_DIR_RX];
+ qparms.key_sz_in_bytes[CFA_DIR_TX] = max_lkup_sz[CFA_DIR_TX];
+ qparms.act_rec_sz_in_bytes[CFA_DIR_RX] = max_act_sz[CFA_DIR_RX];
+ qparms.act_rec_sz_in_bytes[CFA_DIR_TX] = max_act_sz[CFA_DIR_TX];
+ rc = tfc_tbl_scope_size_query(tfcp, &qparms);
+ if (rc)
+ return rc;
+
+
+
+ rc = tfc_tbl_scope_id_alloc(tfcp, shared, CFA_APP_TYPE_TF, &tsid,
+ &first);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to allocate tscope\n");
+ return rc;
+ }
+ BNXT_DRV_DBG(DEBUG, "Allocated tscope TSID:%d\n", tsid);
+
+ rc = bnxt_ulp_cntxt_tsid_set(bp->ulp_ctx, tsid);
+ if (rc)
+ return rc;
+
+ /* If we are shared and not the first table scope creator
+ */
+ if (shared && !first) {
+ bool configured;
+ #define ULP_SHARED_TSID_WAIT_TIMEOUT 5000
+ #define ULP_SHARED_TSID_WAIT_TIME 50
+ int32_t timeout = ULP_SHARED_TSID_WAIT_TIMEOUT;
+ do {
+ rte_delay_ms(ULP_SHARED_TSID_WAIT_TIME);
+ rc = tfc_tbl_scope_config_state_get(tfcp, tsid, &configured);
+ if (rc) {
+ BNXT_DRV_DBG(ERR,
+ "Failed get tsid(%d) config state\n",
+ rc);
+ return rc;
+ }
+ timeout -= ULP_SHARED_TSID_WAIT_TIME;
+ BNXT_DRV_DBG(INFO,
+ "Waiting %d ms for shared tsid(%d)\n",
+ timeout, tsid);
+ } while (!configured && timeout > 0);
+ if (timeout <= 0) {
+ BNXT_DRV_DBG(ERR, "Timed out on shared tsid(%d)\n",
+ tsid);
+ return -ETIMEDOUT;
+ }
+ }
+ mem_parms.first = first;
+ mem_parms.static_bucket_cnt_exp[CFA_DIR_RX] =
+ qparms.static_bucket_cnt_exp[CFA_DIR_RX];
+ mem_parms.static_bucket_cnt_exp[CFA_DIR_TX] =
+ qparms.static_bucket_cnt_exp[CFA_DIR_TX];
+ mem_parms.lkup_rec_cnt[CFA_DIR_RX] = qparms.lkup_rec_cnt[CFA_DIR_RX];
+ mem_parms.lkup_rec_cnt[CFA_DIR_TX] = qparms.lkup_rec_cnt[CFA_DIR_TX];
+ mem_parms.act_rec_cnt[CFA_DIR_RX] = qparms.act_rec_cnt[CFA_DIR_RX];
+ mem_parms.act_rec_cnt[CFA_DIR_TX] = qparms.act_rec_cnt[CFA_DIR_TX];
+ mem_parms.pbl_page_sz_in_bytes =
+ bnxt_ulp_cntxt_page_sz_get(bp->ulp_ctx);
+ mem_parms.max_pools = max_pools;
+
+ mem_parms.lkup_pool_sz_exp[CFA_DIR_RX] =
+ qparms.lkup_pool_sz_exp[CFA_DIR_RX];
+ mem_parms.lkup_pool_sz_exp[CFA_DIR_TX] =
+ qparms.lkup_pool_sz_exp[CFA_DIR_TX];
+
+ mem_parms.act_pool_sz_exp[CFA_DIR_RX] =
+ qparms.act_pool_sz_exp[CFA_DIR_RX];
+ mem_parms.act_pool_sz_exp[CFA_DIR_TX] =
+ qparms.act_pool_sz_exp[CFA_DIR_TX];
+ mem_parms.local = true;
+ rc = tfc_tbl_scope_mem_alloc(tfcp, fid, tsid, &mem_parms);
+ if (rc) {
+ BNXT_DRV_DBG(ERR,
+ "Failed to allocate tscope mem TSID:%d on FID:%d\n",
+ tsid, fid);
+ return rc;
+ }
+
+ BNXT_DRV_DBG(DEBUG, "Allocated or set tscope mem TSID:%d on FID:%d\n",
+ tsid, fid);
+
+
+ /* The max contiguous is in 32 Bytes records, so convert Bytes to 32
+ * Byte records.
+ */
+ cparms.lkup_max_contig_rec[CFA_DIR_RX] = (max_lkup_sz[CFA_DIR_RX] + 31) / 32;
+ cparms.lkup_max_contig_rec[CFA_DIR_TX] = (max_lkup_sz[CFA_DIR_TX] + 31) / 32;
+ cparms.act_max_contig_rec[CFA_DIR_RX] = (max_act_sz[CFA_DIR_RX] + 31) / 32;
+ cparms.act_max_contig_rec[CFA_DIR_TX] = (max_act_sz[CFA_DIR_TX] + 31) / 32;
+ cparms.max_pools = max_pools;
+
+ rc = tfc_tbl_scope_cpm_alloc(tfcp, tsid, &cparms);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to allocate CPM TSID:%d FID:%d\n",
+ tsid, fid);
+ else
+ BNXT_DRV_DBG(DEBUG, "Allocated CPM TSID:%d FID:%d\n", tsid, fid);
+
+ return rc;
+}
+
+static int32_t
+ulp_tfc_cntxt_app_caps_init(struct bnxt *bp, uint8_t app_id, uint32_t dev_id)
+{
+ struct bnxt_ulp_app_capabilities_info *info;
+ struct bnxt_ulp_context *ulp_ctx = bp->ulp_ctx;
+ uint32_t num = 0, rc;
+ bool found = false;
+ uint16_t i;
+
+ if (ULP_APP_DEV_UNSUPPORTED_ENABLED(ulp_ctx->cfg_data->ulp_flags)) {
+ BNXT_DRV_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
+ app_id, dev_id);
+ return -EINVAL;
+ }
+
+ info = bnxt_ulp_app_cap_list_get(&num);
+ if (!info || !num) {
+ BNXT_DRV_DBG(ERR, "Failed to get app capabilities.\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < num && !found; i++) {
+ if (info[i].app_id != app_id || info[i].device_id != dev_id)
+ continue;
+ found = true;
+ if (info[i].flags & BNXT_ULP_APP_CAP_SHARED_EN)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_SHARED_SESSION_ENABLED;
+ if (info[i].flags & BNXT_ULP_APP_CAP_HOT_UPGRADE_EN)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_HIGH_AVAIL_ENABLED;
+ if (info[i].flags & BNXT_ULP_APP_CAP_UNICAST_ONLY)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_UNICAST_ONLY;
+ if (info[i].flags & BNXT_ULP_APP_CAP_IP_TOS_PROTO_SUPPORT)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_TOS_PROTO_SUPPORT;
+ if (info[i].flags & BNXT_ULP_APP_CAP_BC_MC_SUPPORT)
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_BC_MC_SUPPORT;
+ if (info[i].flags & BNXT_ULP_APP_CAP_SOCKET_DIRECT) {
+ /* Enable socket direction only if MR is enabled in fw*/
+ if (BNXT_MULTIROOT_EN(bp)) {
+ ulp_ctx->cfg_data->ulp_flags |=
+ BNXT_ULP_APP_SOCKET_DIRECT;
+ BNXT_DRV_DBG(DEBUG,
+ "Socket Direct feature is enabled\n");
+ }
+ }
+
+ rc = bnxt_ulp_cntxt_tbl_scope_max_pools_set(ulp_ctx,
+ info[i].max_pools);
+ if (rc)
+ return rc;
+ rc = bnxt_ulp_cntxt_em_mulitplier_set(ulp_ctx,
+ info[i].em_multiplier);
+ if (rc)
+ return rc;
+
+ rc = bnxt_ulp_cntxt_num_rx_flows_set(ulp_ctx,
+ info[i].num_rx_flows);
+ if (rc)
+ return rc;
+
+ rc = bnxt_ulp_cntxt_num_tx_flows_set(ulp_ctx,
+ info[i].num_tx_flows);
+ if (rc)
+ return rc;
+
+ rc = bnxt_ulp_cntxt_em_rx_key_max_sz_set(ulp_ctx,
+ info[i].em_rx_key_max_sz);
+ if (rc)
+ return rc;
+
+ rc = bnxt_ulp_cntxt_em_tx_key_max_sz_set(ulp_ctx,
+ info[i].em_tx_key_max_sz);
+ if (rc)
+ return rc;
+
+ rc = bnxt_ulp_cntxt_act_rec_rx_max_sz_set(ulp_ctx,
+ info[i].act_rx_max_sz);
+ if (rc)
+ return rc;
+
+ rc = bnxt_ulp_cntxt_act_rec_tx_max_sz_set(ulp_ctx,
+ info[i].act_tx_max_sz);
+ if (rc)
+ return rc;
+
+ rc = bnxt_ulp_cntxt_page_sz_set(ulp_ctx,
+ info[i].pbl_page_sz_in_bytes);
+ if (rc)
+ return rc;
+ bnxt_ulp_num_key_recipes_set(ulp_ctx,
+ info[i].num_key_recipes_per_dir);
+ }
+ if (!found) {
+ BNXT_DRV_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
+ app_id, dev_id);
+ ulp_ctx->cfg_data->ulp_flags |= BNXT_ULP_APP_DEV_UNSUPPORTED;
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/* The function to free and deinit the ulp context data. */
+static int32_t
+ulp_tfc_ctx_deinit(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ /* Free the contents */
+ if (session->cfg_data) {
+ rte_free(session->cfg_data);
+ bp->ulp_ctx->cfg_data = NULL;
+ session->cfg_data = NULL;
+ }
+ return 0;
+}
+
+/* The function to allocate and initialize the ulp context data. */
+static int32_t
+ulp_tfc_ctx_init(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ struct bnxt_ulp_data *ulp_data;
+ enum bnxt_ulp_device_id devid;
+ int32_t rc = 0;
+
+ /* Initialize the context entries list */
+ bnxt_ulp_cntxt_list_init();
+
+ /* Add the context to the context entries list */
+ rc = bnxt_ulp_cntxt_list_add(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add the context list entry\n");
+ return -ENOMEM;
+ }
+
+ /* Allocate memory to hold ulp context data. */
+ ulp_data = rte_zmalloc("bnxt_ulp_data",
+ sizeof(struct bnxt_ulp_data), 0);
+ if (!ulp_data) {
+ BNXT_DRV_DBG(ERR, "Failed to allocate memory for ulp data\n");
+ return -ENOMEM;
+ }
+
+ /* Increment the ulp context data reference count usage. */
+ bp->ulp_ctx->cfg_data = ulp_data;
+ session->cfg_data = ulp_data;
+ ulp_data->ref_cnt++;
+ ulp_data->ulp_flags |= BNXT_ULP_VF_REP_ENABLED;
+
+ rc = bnxt_ulp_devid_get(bp, &devid);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to determine device for ULP init.\n");
+ goto error_deinit;
+ }
+
+ rc = bnxt_ulp_cntxt_dev_id_set(bp->ulp_ctx, devid);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to set device for ULP init.\n");
+ goto error_deinit;
+ }
+
+ rc = bnxt_ulp_cntxt_app_id_set(bp->ulp_ctx, bp->app_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to set app_id for ULP init.\n");
+ goto error_deinit;
+ }
+ BNXT_DRV_DBG(DEBUG, "Ulp initialized with app id %d\n", bp->app_id);
+
+ rc = ulp_tfc_dparms_init(bp, bp->ulp_ctx, devid);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to init dparms for app(%x)/dev(%x)\n",
+ bp->app_id, devid);
+ goto error_deinit;
+ }
+
+ rc = ulp_tfc_cntxt_app_caps_init(bp, bp->app_id, devid);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to set caps for app(%x)/dev(%x)\n",
+ bp->app_id, devid);
+ goto error_deinit;
+ }
+
+ if (BNXT_TESTPMD_EN(bp)) {
+ ulp_data->ulp_flags &= ~BNXT_ULP_VF_REP_ENABLED;
+ BNXT_DRV_DBG(ERR, "Enabled Testpmd forward mode\n");
+ }
+
+ return rc;
+
+error_deinit:
+ session->session_opened[BNXT_ULP_SESSION_TYPE_DEFAULT] = 1;
+ (void)ulp_tfc_ctx_deinit(bp, session);
+ return rc;
+}
+
+static int32_t
+ulp_tfc_ctx_attach(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ uint32_t flags, dev_id = BNXT_ULP_DEVICE_ID_LAST;
+ uint16_t fid_cnt = 0;
+ int32_t rc = 0;
+ uint8_t app_id;
+
+ bp->tfcp.bp = bp;
+ rc = tfc_open(&bp->tfcp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize the tfc object\n");
+ return rc;
+ }
+
+ rc = bnxt_ulp_cntxt_tfcp_set(bp->ulp_ctx, &bp->tfcp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add tfcp to ulp ctxt\n");
+ return rc;
+ }
+
+ /* Increment the ulp context data reference count usage. */
+ bp->ulp_ctx->cfg_data = session->cfg_data;
+ bp->ulp_ctx->cfg_data->ref_cnt++;
+
+ rc = tfc_session_fid_add(&bp->tfcp, bp->fw_fid,
+ session->session_id, &fid_cnt);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add FID:%d to SID:%d.\n",
+ bp->fw_fid, session->session_id);
+ return rc;
+ }
+ BNXT_DRV_DBG(DEBUG, "SID:%d added FID:%d\n",
+ session->session_id, bp->fw_fid);
+
+ rc = bnxt_ulp_cntxt_sid_set(bp->ulp_ctx, session->session_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add fid to session.\n");
+ return rc;
+ }
+
+ /* Add the context to the context entries list */
+ rc = bnxt_ulp_cntxt_list_add(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add the context list entry\n");
+ return -EINVAL;
+ }
+
+ /*
+ * The supported flag will be set during the init. Use it now to
+ * know if we should go through the attach.
+ */
+ rc = bnxt_ulp_cntxt_app_id_get(bp->ulp_ctx, &app_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get the app id from ulp.\n");
+ return -EINVAL;
+ }
+
+ rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable do get the dev_id.\n");
+ return -EINVAL;
+ }
+
+ flags = bp->ulp_ctx->cfg_data->ulp_flags;
+ if (ULP_APP_DEV_UNSUPPORTED_ENABLED(flags)) {
+ BNXT_DRV_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
+ app_id, dev_id);
+ return -EINVAL;
+ }
+
+ rc = ulp_tfc_tbl_scope_init(bp);
+
+ return rc;
+}
+
+static void
+ulp_tfc_ctx_detach(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ uint16_t fid_cnt = 0;
+ int32_t rc;
+
+ ulp_tfc_tbl_scope_deinit(bp);
+
+ rc = tfc_session_fid_rem(&bp->tfcp, bp->fw_fid, &fid_cnt);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to remove FID:%d from SID:%d\n",
+ bp->fw_fid, session->session_id);
+ else
+ BNXT_DRV_DBG(DEBUG, "SID:%d removed FID:%d CNT:%d\n",
+ session->session_id, bp->fw_fid, fid_cnt);
+ bnxt_ulp_cntxt_sid_reset(bp->ulp_ctx);
+ (void)tfc_close(&bp->tfcp);
+}
+
+/*
+ * When a port is deinit'ed by dpdk. This function is called
+ * and this function clears the ULP context and rest of the
+ * infrastructure associated with it.
+ */
+static void
+ulp_tfc_deinit(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ bool ha_enabled;
+ uint16_t fid_cnt = 0;
+ int32_t rc;
+
+ if (!bp->ulp_ctx || !bp->ulp_ctx->cfg_data)
+ return;
+
+ ha_enabled = bnxt_ulp_cntxt_ha_enabled(bp->ulp_ctx);
+ if (ha_enabled) {
+ rc = ulp_ha_mgr_close(bp->ulp_ctx);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to close HA (%d)\n", rc);
+ }
+
+ /* cleanup the flow database */
+ ulp_flow_db_deinit(bp->ulp_ctx);
+
+ /* Delete the Mark database */
+ ulp_mark_db_deinit(bp->ulp_ctx);
+
+ /* cleanup the ulp mapper */
+ ulp_mapper_deinit(bp->ulp_ctx);
+
+ /* cleanup the ulp matcher */
+ ulp_matcher_deinit(bp->ulp_ctx);
+
+ /* Delete the Flow Counter Manager */
+ ulp_fc_mgr_deinit(bp->ulp_ctx);
+
+ /* Delete the Port database */
+ ulp_port_db_deinit(bp->ulp_ctx);
+
+ /* free the flow db lock */
+ pthread_mutex_destroy(&bp->ulp_ctx->cfg_data->flow_db_lock);
+
+ ulp_tfc_tbl_scope_deinit(bp);
+
+ rc = tfc_session_fid_rem(&bp->tfcp, bp->fw_fid, &fid_cnt);
+ if (rc)
+ BNXT_DRV_DBG(ERR, "Failed to remove FID:%d from SID:%d\n",
+ bp->fw_fid, session->session_id);
+ else
+ BNXT_DRV_DBG(DEBUG, "SID:%d removed FID:%d CNT:%d\n",
+ session->session_id, bp->fw_fid, fid_cnt);
+ bnxt_ulp_cntxt_sid_reset(bp->ulp_ctx);
+ (void)tfc_close(&bp->tfcp);
+
+ /* Delete the ulp context and tf session and free the ulp context */
+ ulp_tfc_ctx_deinit(bp, session);
+
+ BNXT_DRV_DBG(DEBUG, "ulp ctx has been deinitialized\n");
+}
+
+/*
+ * When a port is initialized by dpdk. This functions is called
+ * and this function initializes the ULP context and rest of the
+ * infrastructure associated with it.
+ */
+static int32_t
+ulp_tfc_init(struct bnxt *bp,
+ struct bnxt_ulp_session_state *session)
+{
+ uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST;
+ uint16_t sid;
+ int rc;
+
+ bp->tfcp.bp = bp;
+ rc = tfc_open(&bp->tfcp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize the tfc object\n");
+ return rc;
+ }
+
+ rc = bnxt_ulp_cntxt_tfcp_set(bp->ulp_ctx, &bp->tfcp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to add tfcp to ulp cntxt\n");
+ return rc;
+ }
+
+ /* First time, so allocate a session and save it. */
+ rc = tfc_session_id_alloc(&bp->tfcp, bp->fw_fid, &sid);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to allocate a session id\n");
+ return rc;
+ }
+ BNXT_DRV_DBG(DEBUG, "SID:%d allocated with FID:%d\n", sid, bp->fw_fid);
+ session->session_id = sid;
+ rc = bnxt_ulp_cntxt_sid_set(bp->ulp_ctx, sid);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to sid to ulp cntxt\n");
+ return rc;
+ }
+
+ /* Allocate and Initialize the ulp context. */
+ rc = ulp_tfc_ctx_init(bp, session);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the ulp context\n");
+ goto jump_to_error;
+ }
+
+ rc = ulp_tfc_tbl_scope_init(bp);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the ulp context\n");
+ goto jump_to_error;
+ }
+
+ rc = pthread_mutex_init(&bp->ulp_ctx->cfg_data->flow_db_lock, NULL);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to initialize flow db lock\n");
+ goto jump_to_error;
+ }
+
+ /* Initialize ulp dparms with values devargs passed */
+ rc = bnxt_ulp_cntxt_dev_id_get(bp->ulp_ctx, &ulp_dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Unable to get device id from ulp.\n");
+ return rc;
+ }
+
+ rc = ulp_tfc_dparms_init(bp, bp->ulp_ctx, ulp_dev_id);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize the dparms\n");
+ goto jump_to_error;
+ }
+
+ /* create the port database */
+ rc = ulp_port_db_init(bp->ulp_ctx, bp->port_cnt);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the port database\n");
+ goto jump_to_error;
+ }
+
+ /* BAUCOM TODO: Mark database assumes LFID/GFID Parms, need to look at
+ * alternatives.
+ */
+ /* Create the Mark database. */
+ rc = ulp_mark_db_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the mark database\n");
+ goto jump_to_error;
+ }
+
+ /* Create the flow database. */
+ rc = ulp_flow_db_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to create the flow database\n");
+ goto jump_to_error;
+ }
+
+ rc = ulp_matcher_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize ulp matcher\n");
+ goto jump_to_error;
+ }
+
+ rc = ulp_mapper_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize ulp mapper\n");
+ goto jump_to_error;
+ }
+
+ /* BAUCOM TODO: need to make FC Mgr not start the thread. */
+ rc = ulp_fc_mgr_init(bp->ulp_ctx);
+ if (rc) {
+ BNXT_DRV_DBG(ERR, "Failed to initialize ulp flow counter mgr\n");
+ goto jump_to_error;
+ }
+
+ BNXT_DRV_DBG(DEBUG, "ulp ctx has been initialized\n");
+ return rc;
+
+jump_to_error:
+ bp->ulp_ctx->ops->ulp_deinit(bp, session);
+ return rc;
+}
+
+const struct bnxt_ulp_core_ops bnxt_ulp_tfc_core_ops = {
+ .ulp_ctx_attach = ulp_tfc_ctx_attach,
+ .ulp_ctx_detach = ulp_tfc_ctx_detach,
+ .ulp_deinit = ulp_tfc_deinit,
+ .ulp_init = ulp_tfc_init,
+};
@@ -4,10 +4,12 @@
includes += include_directories('.')
sources += files(
- 'ulp_template_db_class.c',
- 'ulp_template_db_act.c',
- 'ulp_template_db_tbl.c',
- 'ulp_template_db_wh_plus_act.c',
- 'ulp_template_db_wh_plus_class.c',
- 'ulp_template_db_thor_act.c',
- 'ulp_template_db_thor_class.c')
+ 'ulp_template_db_class.c',
+ 'ulp_template_db_act.c',
+ 'ulp_template_db_tbl.c',
+ 'ulp_template_db_wh_plus_act.c',
+ 'ulp_template_db_wh_plus_class.c',
+ 'ulp_template_db_thor_act.c',
+ 'ulp_template_db_thor_class.c',
+ 'ulp_template_db_thor2_act.c',
+ 'ulp_template_db_thor2_class.c')
@@ -8,9525 +8,151 @@
#include "ulp_template_struct.h"
#include "ulp_template_db_tbl.h"
-/*
- * Action signature table:
- * maps hash id to ulp_act_match_list[] index
- */
-uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
- [BNXT_ULP_ACT_HID_0000] = 1,
- [BNXT_ULP_ACT_HID_0040] = 2,
- [BNXT_ULP_ACT_HID_10000] = 3,
- [BNXT_ULP_ACT_HID_cc40] = 4,
- [BNXT_ULP_ACT_HID_0400] = 5,
- [BNXT_ULP_ACT_HID_1cc40] = 6,
- [BNXT_ULP_ACT_HID_d040] = 7,
- [BNXT_ULP_ACT_HID_0080] = 8,
- [BNXT_ULP_ACT_HID_0200] = 9,
- [BNXT_ULP_ACT_HID_0280] = 10,
- [BNXT_ULP_ACT_HID_00c0] = 11,
- [BNXT_ULP_ACT_HID_10080] = 12,
- [BNXT_ULP_ACT_HID_ccc0] = 13,
- [BNXT_ULP_ACT_HID_0480] = 14,
- [BNXT_ULP_ACT_HID_1ccc0] = 15,
- [BNXT_ULP_ACT_HID_d0c0] = 16,
- [BNXT_ULP_ACT_HID_19742] = 17,
- [BNXT_ULP_ACT_HID_19782] = 18,
- [BNXT_ULP_ACT_HID_29742] = 19,
- [BNXT_ULP_ACT_HID_26382] = 20,
- [BNXT_ULP_ACT_HID_19b42] = 21,
- [BNXT_ULP_ACT_HID_36382] = 22,
- [BNXT_ULP_ACT_HID_26782] = 23,
- [BNXT_ULP_ACT_HID_197c2] = 24,
- [BNXT_ULP_ACT_HID_19802] = 25,
- [BNXT_ULP_ACT_HID_297c2] = 26,
- [BNXT_ULP_ACT_HID_26402] = 27,
- [BNXT_ULP_ACT_HID_19bc2] = 28,
- [BNXT_ULP_ACT_HID_36402] = 29,
- [BNXT_ULP_ACT_HID_26802] = 30,
- [BNXT_ULP_ACT_HID_bca0] = 31,
- [BNXT_ULP_ACT_HID_bce0] = 32,
- [BNXT_ULP_ACT_HID_1bca0] = 33,
- [BNXT_ULP_ACT_HID_168e0] = 34,
- [BNXT_ULP_ACT_HID_a0a0] = 35,
- [BNXT_ULP_ACT_HID_268e0] = 36,
- [BNXT_ULP_ACT_HID_16ce0] = 37,
- [BNXT_ULP_ACT_HID_bd20] = 38,
- [BNXT_ULP_ACT_HID_bd60] = 39,
- [BNXT_ULP_ACT_HID_1bd20] = 40,
- [BNXT_ULP_ACT_HID_16960] = 41,
- [BNXT_ULP_ACT_HID_a120] = 42,
- [BNXT_ULP_ACT_HID_26960] = 43,
- [BNXT_ULP_ACT_HID_16d60] = 44,
- [BNXT_ULP_ACT_HID_4040] = 45,
- [BNXT_ULP_ACT_HID_8040] = 46,
- [BNXT_ULP_ACT_HID_c040] = 47,
- [BNXT_ULP_ACT_HID_40c0] = 48,
- [BNXT_ULP_ACT_HID_80c0] = 49,
- [BNXT_ULP_ACT_HID_c0c0] = 50,
- [BNXT_ULP_ACT_HID_4400] = 51,
- [BNXT_ULP_ACT_HID_8400] = 52,
- [BNXT_ULP_ACT_HID_c400] = 53,
- [BNXT_ULP_ACT_HID_4480] = 54,
- [BNXT_ULP_ACT_HID_8480] = 55,
- [BNXT_ULP_ACT_HID_c480] = 56,
- [BNXT_ULP_ACT_HID_1d782] = 57,
- [BNXT_ULP_ACT_HID_21782] = 58,
- [BNXT_ULP_ACT_HID_25782] = 59,
- [BNXT_ULP_ACT_HID_1d802] = 60,
- [BNXT_ULP_ACT_HID_21802] = 61,
- [BNXT_ULP_ACT_HID_25802] = 62,
- [BNXT_ULP_ACT_HID_1db42] = 63,
- [BNXT_ULP_ACT_HID_21b42] = 64,
- [BNXT_ULP_ACT_HID_25b42] = 65,
- [BNXT_ULP_ACT_HID_1dbc2] = 66,
- [BNXT_ULP_ACT_HID_21bc2] = 67,
- [BNXT_ULP_ACT_HID_25bc2] = 68,
- [BNXT_ULP_ACT_HID_fce0] = 69,
- [BNXT_ULP_ACT_HID_13ce0] = 70,
- [BNXT_ULP_ACT_HID_17ce0] = 71,
- [BNXT_ULP_ACT_HID_fd60] = 72,
- [BNXT_ULP_ACT_HID_13d60] = 73,
- [BNXT_ULP_ACT_HID_17d60] = 74,
- [BNXT_ULP_ACT_HID_e0a0] = 75,
- [BNXT_ULP_ACT_HID_120a0] = 76,
- [BNXT_ULP_ACT_HID_160a0] = 77,
- [BNXT_ULP_ACT_HID_e120] = 78,
- [BNXT_ULP_ACT_HID_12120] = 79,
- [BNXT_ULP_ACT_HID_16120] = 80,
- [BNXT_ULP_ACT_HID_32061] = 81,
- [BNXT_ULP_ACT_HID_320e1] = 82,
- [BNXT_ULP_ACT_HID_388a] = 83,
- [BNXT_ULP_ACT_HID_4000] = 84,
- [BNXT_ULP_ACT_HID_8000] = 85,
- [BNXT_ULP_ACT_HID_c000] = 86,
- [BNXT_ULP_ACT_HID_4080] = 87,
- [BNXT_ULP_ACT_HID_8080] = 88,
- [BNXT_ULP_ACT_HID_c080] = 89,
- [BNXT_ULP_ACT_HID_8880] = 90,
- [BNXT_ULP_ACT_HID_22100] = 91,
- [BNXT_ULP_ACT_HID_11100] = 92,
- [BNXT_ULP_ACT_HID_6420] = 93,
- [BNXT_ULP_ACT_HID_1fca0] = 94,
- [BNXT_ULP_ACT_HID_19980] = 95,
- [BNXT_ULP_ACT_HID_28520] = 96,
- [BNXT_ULP_ACT_HID_c880] = 97,
- [BNXT_ULP_ACT_HID_26100] = 98,
- [BNXT_ULP_ACT_HID_15100] = 99,
- [BNXT_ULP_ACT_HID_a420] = 100,
- [BNXT_ULP_ACT_HID_23ca0] = 101,
- [BNXT_ULP_ACT_HID_1d980] = 102,
- [BNXT_ULP_ACT_HID_2c520] = 103,
- [BNXT_ULP_ACT_HID_10880] = 104,
- [BNXT_ULP_ACT_HID_2a100] = 105,
- [BNXT_ULP_ACT_HID_19100] = 106,
- [BNXT_ULP_ACT_HID_e420] = 107,
- [BNXT_ULP_ACT_HID_27ca0] = 108,
- [BNXT_ULP_ACT_HID_21980] = 109,
- [BNXT_ULP_ACT_HID_30520] = 110,
- [BNXT_ULP_ACT_HID_14880] = 111,
- [BNXT_ULP_ACT_HID_2e100] = 112,
- [BNXT_ULP_ACT_HID_1d100] = 113,
- [BNXT_ULP_ACT_HID_12420] = 114,
- [BNXT_ULP_ACT_HID_2bca0] = 115,
- [BNXT_ULP_ACT_HID_25980] = 116,
- [BNXT_ULP_ACT_HID_34520] = 117,
- [BNXT_ULP_ACT_HID_8900] = 118,
- [BNXT_ULP_ACT_HID_22180] = 119,
- [BNXT_ULP_ACT_HID_11180] = 120,
- [BNXT_ULP_ACT_HID_64a0] = 121,
- [BNXT_ULP_ACT_HID_1fd20] = 122,
- [BNXT_ULP_ACT_HID_19a00] = 123,
- [BNXT_ULP_ACT_HID_285a0] = 124,
- [BNXT_ULP_ACT_HID_c900] = 125,
- [BNXT_ULP_ACT_HID_26180] = 126,
- [BNXT_ULP_ACT_HID_15180] = 127,
- [BNXT_ULP_ACT_HID_a4a0] = 128,
- [BNXT_ULP_ACT_HID_23d20] = 129,
- [BNXT_ULP_ACT_HID_1da00] = 130,
- [BNXT_ULP_ACT_HID_2c5a0] = 131,
- [BNXT_ULP_ACT_HID_10900] = 132,
- [BNXT_ULP_ACT_HID_2a180] = 133,
- [BNXT_ULP_ACT_HID_19180] = 134,
- [BNXT_ULP_ACT_HID_e4a0] = 135,
- [BNXT_ULP_ACT_HID_27d20] = 136,
- [BNXT_ULP_ACT_HID_21a00] = 137,
- [BNXT_ULP_ACT_HID_305a0] = 138,
- [BNXT_ULP_ACT_HID_14900] = 139,
- [BNXT_ULP_ACT_HID_2e180] = 140,
- [BNXT_ULP_ACT_HID_1d180] = 141,
- [BNXT_ULP_ACT_HID_124a0] = 142,
- [BNXT_ULP_ACT_HID_2bd20] = 143,
- [BNXT_ULP_ACT_HID_25a00] = 144,
- [BNXT_ULP_ACT_HID_345a0] = 145,
- [BNXT_ULP_ACT_HID_154c0] = 146,
- [BNXT_ULP_ACT_HID_2ed40] = 147,
- [BNXT_ULP_ACT_HID_1dd40] = 148,
- [BNXT_ULP_ACT_HID_13060] = 149,
- [BNXT_ULP_ACT_HID_2c8e0] = 150,
- [BNXT_ULP_ACT_HID_35160] = 151,
- [BNXT_ULP_ACT_HID_15540] = 152,
- [BNXT_ULP_ACT_HID_2edc0] = 153,
- [BNXT_ULP_ACT_HID_1ddc0] = 154,
- [BNXT_ULP_ACT_HID_130e0] = 155,
- [BNXT_ULP_ACT_HID_2c960] = 156,
- [BNXT_ULP_ACT_HID_351e0] = 157,
- [BNXT_ULP_ACT_HID_194c0] = 158,
- [BNXT_ULP_ACT_HID_32d40] = 159,
- [BNXT_ULP_ACT_HID_21d40] = 160,
- [BNXT_ULP_ACT_HID_17060] = 161,
- [BNXT_ULP_ACT_HID_308e0] = 162,
- [BNXT_ULP_ACT_HID_39160] = 163,
- [BNXT_ULP_ACT_HID_19540] = 164,
- [BNXT_ULP_ACT_HID_32dc0] = 165,
- [BNXT_ULP_ACT_HID_21dc0] = 166,
- [BNXT_ULP_ACT_HID_170e0] = 167,
- [BNXT_ULP_ACT_HID_30960] = 168,
- [BNXT_ULP_ACT_HID_391e0] = 169,
- [BNXT_ULP_ACT_HID_1d4c0] = 170,
- [BNXT_ULP_ACT_HID_36d40] = 171,
- [BNXT_ULP_ACT_HID_25d40] = 172,
- [BNXT_ULP_ACT_HID_1b060] = 173,
- [BNXT_ULP_ACT_HID_348e0] = 174,
- [BNXT_ULP_ACT_HID_3d160] = 175,
- [BNXT_ULP_ACT_HID_1d540] = 176,
- [BNXT_ULP_ACT_HID_36dc0] = 177,
- [BNXT_ULP_ACT_HID_25dc0] = 178,
- [BNXT_ULP_ACT_HID_1b0e0] = 179,
- [BNXT_ULP_ACT_HID_34960] = 180,
- [BNXT_ULP_ACT_HID_3d1e0] = 181,
- [BNXT_ULP_ACT_HID_214c0] = 182,
- [BNXT_ULP_ACT_HID_3ad40] = 183,
- [BNXT_ULP_ACT_HID_29d40] = 184,
- [BNXT_ULP_ACT_HID_1f060] = 185,
- [BNXT_ULP_ACT_HID_388e0] = 186,
- [BNXT_ULP_ACT_HID_3380] = 187,
- [BNXT_ULP_ACT_HID_21540] = 188,
- [BNXT_ULP_ACT_HID_3adc0] = 189,
- [BNXT_ULP_ACT_HID_29dc0] = 190,
- [BNXT_ULP_ACT_HID_1f0e0] = 191,
- [BNXT_ULP_ACT_HID_38960] = 192,
- [BNXT_ULP_ACT_HID_3400] = 193,
- [BNXT_ULP_ACT_HID_1d742] = 194,
- [BNXT_ULP_ACT_HID_21742] = 195,
- [BNXT_ULP_ACT_HID_25742] = 196,
- [BNXT_ULP_ACT_HID_1d7c2] = 197,
- [BNXT_ULP_ACT_HID_217c2] = 198,
- [BNXT_ULP_ACT_HID_257c2] = 199,
- [BNXT_ULP_ACT_HID_21fc2] = 200,
- [BNXT_ULP_ACT_HID_3b842] = 201,
- [BNXT_ULP_ACT_HID_2a842] = 202,
- [BNXT_ULP_ACT_HID_1fb62] = 203,
- [BNXT_ULP_ACT_HID_393e2] = 204,
- [BNXT_ULP_ACT_HID_330c2] = 205,
- [BNXT_ULP_ACT_HID_3e82] = 206,
- [BNXT_ULP_ACT_HID_25fc2] = 207,
- [BNXT_ULP_ACT_HID_1a62] = 208,
- [BNXT_ULP_ACT_HID_2e842] = 209,
- [BNXT_ULP_ACT_HID_23b62] = 210,
- [BNXT_ULP_ACT_HID_3d3e2] = 211,
- [BNXT_ULP_ACT_HID_370c2] = 212,
- [BNXT_ULP_ACT_HID_7e82] = 213,
- [BNXT_ULP_ACT_HID_29fc2] = 214,
- [BNXT_ULP_ACT_HID_5a62] = 215,
- [BNXT_ULP_ACT_HID_32842] = 216,
- [BNXT_ULP_ACT_HID_27b62] = 217,
- [BNXT_ULP_ACT_HID_3602] = 218,
- [BNXT_ULP_ACT_HID_3b0c2] = 219,
- [BNXT_ULP_ACT_HID_be82] = 220,
- [BNXT_ULP_ACT_HID_2dfc2] = 221,
- [BNXT_ULP_ACT_HID_9a62] = 222,
- [BNXT_ULP_ACT_HID_36842] = 223,
- [BNXT_ULP_ACT_HID_2bb62] = 224,
- [BNXT_ULP_ACT_HID_7602] = 225,
- [BNXT_ULP_ACT_HID_12e2] = 226,
- [BNXT_ULP_ACT_HID_fe82] = 227,
- [BNXT_ULP_ACT_HID_22042] = 228,
- [BNXT_ULP_ACT_HID_3b8c2] = 229,
- [BNXT_ULP_ACT_HID_2a8c2] = 230,
- [BNXT_ULP_ACT_HID_1fbe2] = 231,
- [BNXT_ULP_ACT_HID_39462] = 232,
- [BNXT_ULP_ACT_HID_33142] = 233,
- [BNXT_ULP_ACT_HID_3f02] = 234,
- [BNXT_ULP_ACT_HID_26042] = 235,
- [BNXT_ULP_ACT_HID_1ae2] = 236,
- [BNXT_ULP_ACT_HID_2e8c2] = 237,
- [BNXT_ULP_ACT_HID_23be2] = 238,
- [BNXT_ULP_ACT_HID_3d462] = 239,
- [BNXT_ULP_ACT_HID_37142] = 240,
- [BNXT_ULP_ACT_HID_7f02] = 241,
- [BNXT_ULP_ACT_HID_2a042] = 242,
- [BNXT_ULP_ACT_HID_5ae2] = 243,
- [BNXT_ULP_ACT_HID_328c2] = 244,
- [BNXT_ULP_ACT_HID_27be2] = 245,
- [BNXT_ULP_ACT_HID_3682] = 246,
- [BNXT_ULP_ACT_HID_3b142] = 247,
- [BNXT_ULP_ACT_HID_bf02] = 248,
- [BNXT_ULP_ACT_HID_2e042] = 249,
- [BNXT_ULP_ACT_HID_9ae2] = 250,
- [BNXT_ULP_ACT_HID_368c2] = 251,
- [BNXT_ULP_ACT_HID_2bbe2] = 252,
- [BNXT_ULP_ACT_HID_7682] = 253,
- [BNXT_ULP_ACT_HID_1362] = 254,
- [BNXT_ULP_ACT_HID_ff02] = 255,
- [BNXT_ULP_ACT_HID_2ec02] = 256,
- [BNXT_ULP_ACT_HID_a6a2] = 257,
- [BNXT_ULP_ACT_HID_37482] = 258,
- [BNXT_ULP_ACT_HID_2c7a2] = 259,
- [BNXT_ULP_ACT_HID_8242] = 260,
- [BNXT_ULP_ACT_HID_10ac2] = 261,
- [BNXT_ULP_ACT_HID_2ec82] = 262,
- [BNXT_ULP_ACT_HID_a722] = 263,
- [BNXT_ULP_ACT_HID_37502] = 264,
- [BNXT_ULP_ACT_HID_2c822] = 265,
- [BNXT_ULP_ACT_HID_82c2] = 266,
- [BNXT_ULP_ACT_HID_10b42] = 267,
- [BNXT_ULP_ACT_HID_32c02] = 268,
- [BNXT_ULP_ACT_HID_e6a2] = 269,
- [BNXT_ULP_ACT_HID_3b482] = 270,
- [BNXT_ULP_ACT_HID_307a2] = 271,
- [BNXT_ULP_ACT_HID_c242] = 272,
- [BNXT_ULP_ACT_HID_14ac2] = 273,
- [BNXT_ULP_ACT_HID_32c82] = 274,
- [BNXT_ULP_ACT_HID_e722] = 275,
- [BNXT_ULP_ACT_HID_3b502] = 276,
- [BNXT_ULP_ACT_HID_30822] = 277,
- [BNXT_ULP_ACT_HID_c2c2] = 278,
- [BNXT_ULP_ACT_HID_14b42] = 279,
- [BNXT_ULP_ACT_HID_36c02] = 280,
- [BNXT_ULP_ACT_HID_126a2] = 281,
- [BNXT_ULP_ACT_HID_16a2] = 282,
- [BNXT_ULP_ACT_HID_347a2] = 283,
- [BNXT_ULP_ACT_HID_10242] = 284,
- [BNXT_ULP_ACT_HID_18ac2] = 285,
- [BNXT_ULP_ACT_HID_36c82] = 286,
- [BNXT_ULP_ACT_HID_12722] = 287,
- [BNXT_ULP_ACT_HID_1722] = 288,
- [BNXT_ULP_ACT_HID_34822] = 289,
- [BNXT_ULP_ACT_HID_102c2] = 290,
- [BNXT_ULP_ACT_HID_18b42] = 291,
- [BNXT_ULP_ACT_HID_3ac02] = 292,
- [BNXT_ULP_ACT_HID_166a2] = 293,
- [BNXT_ULP_ACT_HID_56a2] = 294,
- [BNXT_ULP_ACT_HID_387a2] = 295,
- [BNXT_ULP_ACT_HID_14242] = 296,
- [BNXT_ULP_ACT_HID_1cac2] = 297,
- [BNXT_ULP_ACT_HID_3ac82] = 298,
- [BNXT_ULP_ACT_HID_16722] = 299,
- [BNXT_ULP_ACT_HID_5722] = 300,
- [BNXT_ULP_ACT_HID_38822] = 301,
- [BNXT_ULP_ACT_HID_142c2] = 302,
- [BNXT_ULP_ACT_HID_1cb42] = 303,
- [BNXT_ULP_ACT_HID_12520] = 304,
- [BNXT_ULP_ACT_HID_2bda0] = 305,
- [BNXT_ULP_ACT_HID_1ada0] = 306,
- [BNXT_ULP_ACT_HID_120c0] = 307,
- [BNXT_ULP_ACT_HID_2b940] = 308,
- [BNXT_ULP_ACT_HID_23620] = 309,
- [BNXT_ULP_ACT_HID_321c0] = 310,
- [BNXT_ULP_ACT_HID_125a0] = 311,
- [BNXT_ULP_ACT_HID_2be20] = 312,
- [BNXT_ULP_ACT_HID_1ae20] = 313,
- [BNXT_ULP_ACT_HID_12140] = 314,
- [BNXT_ULP_ACT_HID_2b9c0] = 315,
- [BNXT_ULP_ACT_HID_236a0] = 316,
- [BNXT_ULP_ACT_HID_32240] = 317,
- [BNXT_ULP_ACT_HID_1f160] = 318,
- [BNXT_ULP_ACT_HID_3a9e0] = 319,
- [BNXT_ULP_ACT_HID_279e0] = 320,
- [BNXT_ULP_ACT_HID_1ed00] = 321,
- [BNXT_ULP_ACT_HID_36580] = 322,
- [BNXT_ULP_ACT_HID_3020] = 323,
- [BNXT_ULP_ACT_HID_1f1e0] = 324,
- [BNXT_ULP_ACT_HID_3aa60] = 325,
- [BNXT_ULP_ACT_HID_27a60] = 326,
- [BNXT_ULP_ACT_HID_1ed80] = 327,
- [BNXT_ULP_ACT_HID_36600] = 328,
- [BNXT_ULP_ACT_HID_30a0] = 329,
- [BNXT_ULP_ACT_HID_0100] = 330,
- [BNXT_ULP_ACT_HID_0180] = 331,
- [BNXT_ULP_ACT_HID_32e84] = 332,
- [BNXT_ULP_ACT_HID_32f04] = 333,
- [BNXT_ULP_ACT_HID_19842] = 334,
- [BNXT_ULP_ACT_HID_198c2] = 335,
- [BNXT_ULP_ACT_HID_e7e6] = 336,
- [BNXT_ULP_ACT_HID_e866] = 337,
- [BNXT_ULP_ACT_HID_a3e0] = 338,
- [BNXT_ULP_ACT_HID_240e0] = 339,
- [BNXT_ULP_ACT_HID_322c8] = 340,
- [BNXT_ULP_ACT_HID_e228] = 341,
- [BNXT_ULP_ACT_HID_36130] = 342,
- [BNXT_ULP_ACT_HID_2e840] = 343,
- [BNXT_ULP_ACT_HID_2e880] = 344,
- [BNXT_ULP_ACT_HID_2e900] = 345,
- [BNXT_ULP_ACT_HID_170c0] = 346,
- [BNXT_ULP_ACT_HID_14ea0] = 347,
- [BNXT_ULP_ACT_HID_3b480] = 348,
- [BNXT_ULP_ACT_HID_23d00] = 349,
- [BNXT_ULP_ACT_HID_21ae0] = 350,
- [BNXT_ULP_ACT_HID_2e8c0] = 351,
- [BNXT_ULP_ACT_HID_17140] = 352,
- [BNXT_ULP_ACT_HID_14f20] = 353,
- [BNXT_ULP_ACT_HID_3b500] = 354,
- [BNXT_ULP_ACT_HID_23d80] = 355,
- [BNXT_ULP_ACT_HID_21b60] = 356,
- [BNXT_ULP_ACT_HID_a1a2] = 357,
- [BNXT_ULP_ACT_HID_a1e2] = 358,
- [BNXT_ULP_ACT_HID_a262] = 359,
- [BNXT_ULP_ACT_HID_30802] = 360,
- [BNXT_ULP_ACT_HID_2e5e2] = 361,
- [BNXT_ULP_ACT_HID_16de2] = 362,
- [BNXT_ULP_ACT_HID_3d442] = 363,
- [BNXT_ULP_ACT_HID_3b222] = 364,
- [BNXT_ULP_ACT_HID_a222] = 365,
- [BNXT_ULP_ACT_HID_30882] = 366,
- [BNXT_ULP_ACT_HID_2e662] = 367,
- [BNXT_ULP_ACT_HID_16e62] = 368,
- [BNXT_ULP_ACT_HID_3d4c2] = 369,
- [BNXT_ULP_ACT_HID_3b2a2] = 370,
- [BNXT_ULP_ACT_HID_3a4e0] = 371,
- [BNXT_ULP_ACT_HID_3a520] = 372,
- [BNXT_ULP_ACT_HID_3a5a0] = 373,
- [BNXT_ULP_ACT_HID_22d60] = 374,
- [BNXT_ULP_ACT_HID_1eb40] = 375,
- [BNXT_ULP_ACT_HID_7340] = 376,
- [BNXT_ULP_ACT_HID_2f9a0] = 377,
- [BNXT_ULP_ACT_HID_2b780] = 378,
- [BNXT_ULP_ACT_HID_3a560] = 379,
- [BNXT_ULP_ACT_HID_22de0] = 380,
- [BNXT_ULP_ACT_HID_1ebc0] = 381,
- [BNXT_ULP_ACT_HID_73c0] = 382,
- [BNXT_ULP_ACT_HID_2fa20] = 383,
- [BNXT_ULP_ACT_HID_2b800] = 384,
- [BNXT_ULP_ACT_HID_32840] = 385,
- [BNXT_ULP_ACT_HID_36840] = 386,
- [BNXT_ULP_ACT_HID_3a840] = 387,
- [BNXT_ULP_ACT_HID_328c0] = 388,
- [BNXT_ULP_ACT_HID_368c0] = 389,
- [BNXT_ULP_ACT_HID_3a8c0] = 390,
- [BNXT_ULP_ACT_HID_370c0] = 391,
- [BNXT_ULP_ACT_HID_12b60] = 392,
- [BNXT_ULP_ACT_HID_1b60] = 393,
- [BNXT_ULP_ACT_HID_34c60] = 394,
- [BNXT_ULP_ACT_HID_10700] = 395,
- [BNXT_ULP_ACT_HID_18f80] = 396,
- [BNXT_ULP_ACT_HID_3b0c0] = 397,
- [BNXT_ULP_ACT_HID_16b60] = 398,
- [BNXT_ULP_ACT_HID_5b60] = 399,
- [BNXT_ULP_ACT_HID_38c60] = 400,
- [BNXT_ULP_ACT_HID_14700] = 401,
- [BNXT_ULP_ACT_HID_1cf80] = 402,
- [BNXT_ULP_ACT_HID_12e0] = 403,
- [BNXT_ULP_ACT_HID_1ab60] = 404,
- [BNXT_ULP_ACT_HID_9b60] = 405,
- [BNXT_ULP_ACT_HID_3cc60] = 406,
- [BNXT_ULP_ACT_HID_18700] = 407,
- [BNXT_ULP_ACT_HID_20f80] = 408,
- [BNXT_ULP_ACT_HID_52e0] = 409,
- [BNXT_ULP_ACT_HID_1eb60] = 410,
- [BNXT_ULP_ACT_HID_db60] = 411,
- [BNXT_ULP_ACT_HID_2e80] = 412,
- [BNXT_ULP_ACT_HID_1c700] = 413,
- [BNXT_ULP_ACT_HID_24f80] = 414,
- [BNXT_ULP_ACT_HID_37140] = 415,
- [BNXT_ULP_ACT_HID_12be0] = 416,
- [BNXT_ULP_ACT_HID_1be0] = 417,
- [BNXT_ULP_ACT_HID_34ce0] = 418,
- [BNXT_ULP_ACT_HID_10780] = 419,
- [BNXT_ULP_ACT_HID_19000] = 420,
- [BNXT_ULP_ACT_HID_3b140] = 421,
- [BNXT_ULP_ACT_HID_16be0] = 422,
- [BNXT_ULP_ACT_HID_5be0] = 423,
- [BNXT_ULP_ACT_HID_38ce0] = 424,
- [BNXT_ULP_ACT_HID_14780] = 425,
- [BNXT_ULP_ACT_HID_1d000] = 426,
- [BNXT_ULP_ACT_HID_1360] = 427,
- [BNXT_ULP_ACT_HID_1abe0] = 428,
- [BNXT_ULP_ACT_HID_9be0] = 429,
- [BNXT_ULP_ACT_HID_3cce0] = 430,
- [BNXT_ULP_ACT_HID_18780] = 431,
- [BNXT_ULP_ACT_HID_21000] = 432,
- [BNXT_ULP_ACT_HID_5360] = 433,
- [BNXT_ULP_ACT_HID_1ebe0] = 434,
- [BNXT_ULP_ACT_HID_dbe0] = 435,
- [BNXT_ULP_ACT_HID_2f00] = 436,
- [BNXT_ULP_ACT_HID_1c780] = 437,
- [BNXT_ULP_ACT_HID_25000] = 438,
- [BNXT_ULP_ACT_HID_5f20] = 439,
- [BNXT_ULP_ACT_HID_1f7a0] = 440,
- [BNXT_ULP_ACT_HID_e7a0] = 441,
- [BNXT_ULP_ACT_HID_3ac0] = 442,
- [BNXT_ULP_ACT_HID_1d340] = 443,
- [BNXT_ULP_ACT_HID_25bc0] = 444,
- [BNXT_ULP_ACT_HID_5fa0] = 445,
- [BNXT_ULP_ACT_HID_1f820] = 446,
- [BNXT_ULP_ACT_HID_e820] = 447,
- [BNXT_ULP_ACT_HID_3b40] = 448,
- [BNXT_ULP_ACT_HID_1d3c0] = 449,
- [BNXT_ULP_ACT_HID_25c40] = 450,
- [BNXT_ULP_ACT_HID_237a0] = 451,
- [BNXT_ULP_ACT_HID_127a0] = 452,
- [BNXT_ULP_ACT_HID_7ac0] = 453,
- [BNXT_ULP_ACT_HID_9f20] = 454,
- [BNXT_ULP_ACT_HID_21340] = 455,
- [BNXT_ULP_ACT_HID_29bc0] = 456,
- [BNXT_ULP_ACT_HID_9fa0] = 457,
- [BNXT_ULP_ACT_HID_23820] = 458,
- [BNXT_ULP_ACT_HID_12820] = 459,
- [BNXT_ULP_ACT_HID_7b40] = 460,
- [BNXT_ULP_ACT_HID_213c0] = 461,
- [BNXT_ULP_ACT_HID_29c40] = 462,
- [BNXT_ULP_ACT_HID_df20] = 463,
- [BNXT_ULP_ACT_HID_277a0] = 464,
- [BNXT_ULP_ACT_HID_167a0] = 465,
- [BNXT_ULP_ACT_HID_bac0] = 466,
- [BNXT_ULP_ACT_HID_25340] = 467,
- [BNXT_ULP_ACT_HID_2dbc0] = 468,
- [BNXT_ULP_ACT_HID_dfa0] = 469,
- [BNXT_ULP_ACT_HID_27820] = 470,
- [BNXT_ULP_ACT_HID_16820] = 471,
- [BNXT_ULP_ACT_HID_bb40] = 472,
- [BNXT_ULP_ACT_HID_253c0] = 473,
- [BNXT_ULP_ACT_HID_2dc40] = 474,
- [BNXT_ULP_ACT_HID_11f20] = 475,
- [BNXT_ULP_ACT_HID_2b7a0] = 476,
- [BNXT_ULP_ACT_HID_1a7a0] = 477,
- [BNXT_ULP_ACT_HID_fac0] = 478,
- [BNXT_ULP_ACT_HID_29340] = 479,
- [BNXT_ULP_ACT_HID_31bc0] = 480,
- [BNXT_ULP_ACT_HID_11fa0] = 481,
- [BNXT_ULP_ACT_HID_2b820] = 482,
- [BNXT_ULP_ACT_HID_1a820] = 483,
- [BNXT_ULP_ACT_HID_fb40] = 484,
- [BNXT_ULP_ACT_HID_293c0] = 485,
- [BNXT_ULP_ACT_HID_31c40] = 486,
- [BNXT_ULP_ACT_HID_e1a2] = 487,
- [BNXT_ULP_ACT_HID_121a2] = 488,
- [BNXT_ULP_ACT_HID_161a2] = 489,
- [BNXT_ULP_ACT_HID_e222] = 490,
- [BNXT_ULP_ACT_HID_12222] = 491,
- [BNXT_ULP_ACT_HID_16222] = 492,
- [BNXT_ULP_ACT_HID_12a22] = 493,
- [BNXT_ULP_ACT_HID_2c2a2] = 494,
- [BNXT_ULP_ACT_HID_1b2a2] = 495,
- [BNXT_ULP_ACT_HID_105c2] = 496,
- [BNXT_ULP_ACT_HID_29e42] = 497,
- [BNXT_ULP_ACT_HID_326c2] = 498,
- [BNXT_ULP_ACT_HID_16a22] = 499,
- [BNXT_ULP_ACT_HID_302a2] = 500,
- [BNXT_ULP_ACT_HID_1f2a2] = 501,
- [BNXT_ULP_ACT_HID_145c2] = 502,
- [BNXT_ULP_ACT_HID_2de42] = 503,
- [BNXT_ULP_ACT_HID_366c2] = 504,
- [BNXT_ULP_ACT_HID_1aa22] = 505,
- [BNXT_ULP_ACT_HID_342a2] = 506,
- [BNXT_ULP_ACT_HID_232a2] = 507,
- [BNXT_ULP_ACT_HID_185c2] = 508,
- [BNXT_ULP_ACT_HID_31e42] = 509,
- [BNXT_ULP_ACT_HID_3a6c2] = 510,
- [BNXT_ULP_ACT_HID_1ea22] = 511,
- [BNXT_ULP_ACT_HID_382a2] = 512,
- [BNXT_ULP_ACT_HID_272a2] = 513,
- [BNXT_ULP_ACT_HID_1c5c2] = 514,
- [BNXT_ULP_ACT_HID_35e42] = 515,
- [BNXT_ULP_ACT_HID_08e2] = 516,
- [BNXT_ULP_ACT_HID_12aa2] = 517,
- [BNXT_ULP_ACT_HID_2c322] = 518,
- [BNXT_ULP_ACT_HID_1b322] = 519,
- [BNXT_ULP_ACT_HID_10642] = 520,
- [BNXT_ULP_ACT_HID_29ec2] = 521,
- [BNXT_ULP_ACT_HID_32742] = 522,
- [BNXT_ULP_ACT_HID_16aa2] = 523,
- [BNXT_ULP_ACT_HID_30322] = 524,
- [BNXT_ULP_ACT_HID_1f322] = 525,
- [BNXT_ULP_ACT_HID_14642] = 526,
- [BNXT_ULP_ACT_HID_2dec2] = 527,
- [BNXT_ULP_ACT_HID_36742] = 528,
- [BNXT_ULP_ACT_HID_1aaa2] = 529,
- [BNXT_ULP_ACT_HID_34322] = 530,
- [BNXT_ULP_ACT_HID_23322] = 531,
- [BNXT_ULP_ACT_HID_18642] = 532,
- [BNXT_ULP_ACT_HID_31ec2] = 533,
- [BNXT_ULP_ACT_HID_3a742] = 534,
- [BNXT_ULP_ACT_HID_1eaa2] = 535,
- [BNXT_ULP_ACT_HID_38322] = 536,
- [BNXT_ULP_ACT_HID_27322] = 537,
- [BNXT_ULP_ACT_HID_1c642] = 538,
- [BNXT_ULP_ACT_HID_35ec2] = 539,
- [BNXT_ULP_ACT_HID_0962] = 540,
- [BNXT_ULP_ACT_HID_1f662] = 541,
- [BNXT_ULP_ACT_HID_38ee2] = 542,
- [BNXT_ULP_ACT_HID_27ee2] = 543,
- [BNXT_ULP_ACT_HID_1d202] = 544,
- [BNXT_ULP_ACT_HID_36a82] = 545,
- [BNXT_ULP_ACT_HID_1522] = 546,
- [BNXT_ULP_ACT_HID_1f6e2] = 547,
- [BNXT_ULP_ACT_HID_38f62] = 548,
- [BNXT_ULP_ACT_HID_27f62] = 549,
- [BNXT_ULP_ACT_HID_1d282] = 550,
- [BNXT_ULP_ACT_HID_36b02] = 551,
- [BNXT_ULP_ACT_HID_15a2] = 552,
- [BNXT_ULP_ACT_HID_3cee2] = 553,
- [BNXT_ULP_ACT_HID_2bee2] = 554,
- [BNXT_ULP_ACT_HID_21202] = 555,
- [BNXT_ULP_ACT_HID_23662] = 556,
- [BNXT_ULP_ACT_HID_3aa82] = 557,
- [BNXT_ULP_ACT_HID_5522] = 558,
- [BNXT_ULP_ACT_HID_236e2] = 559,
- [BNXT_ULP_ACT_HID_3cf62] = 560,
- [BNXT_ULP_ACT_HID_2bf62] = 561,
- [BNXT_ULP_ACT_HID_21282] = 562,
- [BNXT_ULP_ACT_HID_3ab02] = 563,
- [BNXT_ULP_ACT_HID_55a2] = 564,
- [BNXT_ULP_ACT_HID_27662] = 565,
- [BNXT_ULP_ACT_HID_3102] = 566,
- [BNXT_ULP_ACT_HID_2fee2] = 567,
- [BNXT_ULP_ACT_HID_25202] = 568,
- [BNXT_ULP_ACT_HID_0ca2] = 569,
- [BNXT_ULP_ACT_HID_9522] = 570,
- [BNXT_ULP_ACT_HID_276e2] = 571,
- [BNXT_ULP_ACT_HID_3182] = 572,
- [BNXT_ULP_ACT_HID_2ff62] = 573,
- [BNXT_ULP_ACT_HID_25282] = 574,
- [BNXT_ULP_ACT_HID_0d22] = 575,
- [BNXT_ULP_ACT_HID_95a2] = 576,
- [BNXT_ULP_ACT_HID_2b662] = 577,
- [BNXT_ULP_ACT_HID_7102] = 578,
- [BNXT_ULP_ACT_HID_33ee2] = 579,
- [BNXT_ULP_ACT_HID_29202] = 580,
- [BNXT_ULP_ACT_HID_4ca2] = 581,
- [BNXT_ULP_ACT_HID_d522] = 582,
- [BNXT_ULP_ACT_HID_2b6e2] = 583,
- [BNXT_ULP_ACT_HID_7182] = 584,
- [BNXT_ULP_ACT_HID_33f62] = 585,
- [BNXT_ULP_ACT_HID_29282] = 586,
- [BNXT_ULP_ACT_HID_4d22] = 587,
- [BNXT_ULP_ACT_HID_d5a2] = 588,
- [BNXT_ULP_ACT_HID_3e4e0] = 589,
- [BNXT_ULP_ACT_HID_2700] = 590,
- [BNXT_ULP_ACT_HID_6700] = 591,
- [BNXT_ULP_ACT_HID_3e560] = 592,
- [BNXT_ULP_ACT_HID_2780] = 593,
- [BNXT_ULP_ACT_HID_6780] = 594,
- [BNXT_ULP_ACT_HID_2f80] = 595,
- [BNXT_ULP_ACT_HID_1e800] = 596,
- [BNXT_ULP_ACT_HID_b800] = 597,
- [BNXT_ULP_ACT_HID_2b20] = 598,
- [BNXT_ULP_ACT_HID_1a3a0] = 599,
- [BNXT_ULP_ACT_HID_22c20] = 600,
- [BNXT_ULP_ACT_HID_6f80] = 601,
- [BNXT_ULP_ACT_HID_22800] = 602,
- [BNXT_ULP_ACT_HID_f800] = 603,
- [BNXT_ULP_ACT_HID_6b20] = 604,
- [BNXT_ULP_ACT_HID_1e3a0] = 605,
- [BNXT_ULP_ACT_HID_26c20] = 606,
- [BNXT_ULP_ACT_HID_af80] = 607,
- [BNXT_ULP_ACT_HID_26800] = 608,
- [BNXT_ULP_ACT_HID_13800] = 609,
- [BNXT_ULP_ACT_HID_ab20] = 610,
- [BNXT_ULP_ACT_HID_223a0] = 611,
- [BNXT_ULP_ACT_HID_2ac20] = 612,
- [BNXT_ULP_ACT_HID_ef80] = 613,
- [BNXT_ULP_ACT_HID_2a800] = 614,
- [BNXT_ULP_ACT_HID_17800] = 615,
- [BNXT_ULP_ACT_HID_eb20] = 616,
- [BNXT_ULP_ACT_HID_263a0] = 617,
- [BNXT_ULP_ACT_HID_2ec20] = 618,
- [BNXT_ULP_ACT_HID_3000] = 619,
- [BNXT_ULP_ACT_HID_1e880] = 620,
- [BNXT_ULP_ACT_HID_b880] = 621,
- [BNXT_ULP_ACT_HID_2ba0] = 622,
- [BNXT_ULP_ACT_HID_1a420] = 623,
- [BNXT_ULP_ACT_HID_22ca0] = 624,
- [BNXT_ULP_ACT_HID_7000] = 625,
- [BNXT_ULP_ACT_HID_22880] = 626,
- [BNXT_ULP_ACT_HID_f880] = 627,
- [BNXT_ULP_ACT_HID_6ba0] = 628,
- [BNXT_ULP_ACT_HID_1e420] = 629,
- [BNXT_ULP_ACT_HID_26ca0] = 630,
- [BNXT_ULP_ACT_HID_b000] = 631,
- [BNXT_ULP_ACT_HID_26880] = 632,
- [BNXT_ULP_ACT_HID_13880] = 633,
- [BNXT_ULP_ACT_HID_aba0] = 634,
- [BNXT_ULP_ACT_HID_22420] = 635,
- [BNXT_ULP_ACT_HID_2aca0] = 636,
- [BNXT_ULP_ACT_HID_f000] = 637,
- [BNXT_ULP_ACT_HID_2a880] = 638,
- [BNXT_ULP_ACT_HID_17880] = 639,
- [BNXT_ULP_ACT_HID_eba0] = 640,
- [BNXT_ULP_ACT_HID_26420] = 641,
- [BNXT_ULP_ACT_HID_2eca0] = 642,
- [BNXT_ULP_ACT_HID_fbc0] = 643,
- [BNXT_ULP_ACT_HID_2b440] = 644,
- [BNXT_ULP_ACT_HID_1a440] = 645,
- [BNXT_ULP_ACT_HID_f760] = 646,
- [BNXT_ULP_ACT_HID_26fe0] = 647,
- [BNXT_ULP_ACT_HID_2f860] = 648,
- [BNXT_ULP_ACT_HID_fc40] = 649,
- [BNXT_ULP_ACT_HID_2b4c0] = 650,
- [BNXT_ULP_ACT_HID_1a4c0] = 651,
- [BNXT_ULP_ACT_HID_f7e0] = 652,
- [BNXT_ULP_ACT_HID_27060] = 653,
- [BNXT_ULP_ACT_HID_2f8e0] = 654,
- [BNXT_ULP_ACT_HID_2f440] = 655,
- [BNXT_ULP_ACT_HID_1e440] = 656,
- [BNXT_ULP_ACT_HID_13760] = 657,
- [BNXT_ULP_ACT_HID_13bc0] = 658,
- [BNXT_ULP_ACT_HID_2afe0] = 659,
- [BNXT_ULP_ACT_HID_33860] = 660,
- [BNXT_ULP_ACT_HID_13c40] = 661,
- [BNXT_ULP_ACT_HID_2f4c0] = 662,
- [BNXT_ULP_ACT_HID_1e4c0] = 663,
- [BNXT_ULP_ACT_HID_137e0] = 664,
- [BNXT_ULP_ACT_HID_2b060] = 665,
- [BNXT_ULP_ACT_HID_338e0] = 666,
- [BNXT_ULP_ACT_HID_17bc0] = 667,
- [BNXT_ULP_ACT_HID_33440] = 668,
- [BNXT_ULP_ACT_HID_22440] = 669,
- [BNXT_ULP_ACT_HID_17760] = 670,
- [BNXT_ULP_ACT_HID_2efe0] = 671,
- [BNXT_ULP_ACT_HID_37860] = 672,
- [BNXT_ULP_ACT_HID_17c40] = 673,
- [BNXT_ULP_ACT_HID_334c0] = 674,
- [BNXT_ULP_ACT_HID_224c0] = 675,
- [BNXT_ULP_ACT_HID_177e0] = 676,
- [BNXT_ULP_ACT_HID_2f060] = 677,
- [BNXT_ULP_ACT_HID_378e0] = 678,
- [BNXT_ULP_ACT_HID_1bbc0] = 679,
- [BNXT_ULP_ACT_HID_37440] = 680,
- [BNXT_ULP_ACT_HID_26440] = 681,
- [BNXT_ULP_ACT_HID_1b760] = 682,
- [BNXT_ULP_ACT_HID_32fe0] = 683,
- [BNXT_ULP_ACT_HID_3b860] = 684,
- [BNXT_ULP_ACT_HID_1bc40] = 685,
- [BNXT_ULP_ACT_HID_374c0] = 686,
- [BNXT_ULP_ACT_HID_264c0] = 687,
- [BNXT_ULP_ACT_HID_1b7e0] = 688,
- [BNXT_ULP_ACT_HID_33060] = 689,
- [BNXT_ULP_ACT_HID_3b8e0] = 690,
- [BNXT_ULP_ACT_HID_18e80] = 691,
- [BNXT_ULP_ACT_HID_18f00] = 692,
- [BNXT_ULP_ACT_HID_1ce80] = 693,
- [BNXT_ULP_ACT_HID_1cf00] = 694,
- [BNXT_ULP_ACT_HID_20e80] = 695,
- [BNXT_ULP_ACT_HID_20f00] = 696,
- [BNXT_ULP_ACT_HID_24e80] = 697,
- [BNXT_ULP_ACT_HID_24f00] = 698,
- [BNXT_ULP_ACT_HID_325c2] = 699,
- [BNXT_ULP_ACT_HID_32642] = 700,
- [BNXT_ULP_ACT_HID_365c2] = 701,
- [BNXT_ULP_ACT_HID_36642] = 702,
- [BNXT_ULP_ACT_HID_3a5c2] = 703,
- [BNXT_ULP_ACT_HID_3a642] = 704,
- [BNXT_ULP_ACT_HID_07e2] = 705,
- [BNXT_ULP_ACT_HID_0862] = 706,
- [BNXT_ULP_ACT_HID_22b20] = 707,
- [BNXT_ULP_ACT_HID_22ba0] = 708,
- [BNXT_ULP_ACT_HID_26b20] = 709,
- [BNXT_ULP_ACT_HID_26ba0] = 710,
- [BNXT_ULP_ACT_HID_2ab20] = 711,
- [BNXT_ULP_ACT_HID_2aba0] = 712,
- [BNXT_ULP_ACT_HID_2eb20] = 713,
- [BNXT_ULP_ACT_HID_2eba0] = 714,
- [BNXT_ULP_ACT_HID_199e0] = 715,
- [BNXT_ULP_ACT_HID_19960] = 716,
- [BNXT_ULP_ACT_HID_33122] = 717,
- [BNXT_ULP_ACT_HID_331a2] = 718,
- [BNXT_ULP_ACT_HID_23580] = 719,
- [BNXT_ULP_ACT_HID_23700] = 720,
- [BNXT_ULP_ACT_HID_db61] = 721,
- [BNXT_ULP_ACT_HID_dbe1] = 722,
- [BNXT_ULP_ACT_HID_320ca] = 723
-};
-
/* Array for the act matcher list */
struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
[1] = {
- .act_hid = BNXT_ULP_ACT_HID_0000,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [2] = {
- .act_hid = BNXT_ULP_ACT_HID_0040,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [3] = {
- .act_hid = BNXT_ULP_ACT_HID_10000,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [4] = {
- .act_hid = BNXT_ULP_ACT_HID_cc40,
- .act_pattern_id = 3,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [5] = {
- .act_hid = BNXT_ULP_ACT_HID_0400,
- .act_pattern_id = 4,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [6] = {
- .act_hid = BNXT_ULP_ACT_HID_1cc40,
- .act_pattern_id = 5,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [7] = {
- .act_hid = BNXT_ULP_ACT_HID_d040,
- .act_pattern_id = 6,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [8] = {
- .act_hid = BNXT_ULP_ACT_HID_0080,
- .act_pattern_id = 7,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [9] = {
- .act_hid = BNXT_ULP_ACT_HID_0200,
- .act_pattern_id = 8,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_METER |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [10] = {
- .act_hid = BNXT_ULP_ACT_HID_0280,
- .act_pattern_id = 9,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_METER |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [11] = {
- .act_hid = BNXT_ULP_ACT_HID_00c0,
- .act_pattern_id = 10,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [12] = {
- .act_hid = BNXT_ULP_ACT_HID_10080,
- .act_pattern_id = 11,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [13] = {
- .act_hid = BNXT_ULP_ACT_HID_ccc0,
- .act_pattern_id = 12,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [14] = {
- .act_hid = BNXT_ULP_ACT_HID_0480,
- .act_pattern_id = 13,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [15] = {
- .act_hid = BNXT_ULP_ACT_HID_1ccc0,
- .act_pattern_id = 14,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [16] = {
- .act_hid = BNXT_ULP_ACT_HID_d0c0,
- .act_pattern_id = 15,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [17] = {
- .act_hid = BNXT_ULP_ACT_HID_19742,
- .act_pattern_id = 16,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [18] = {
- .act_hid = BNXT_ULP_ACT_HID_19782,
- .act_pattern_id = 17,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [19] = {
- .act_hid = BNXT_ULP_ACT_HID_29742,
- .act_pattern_id = 18,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [20] = {
- .act_hid = BNXT_ULP_ACT_HID_26382,
- .act_pattern_id = 19,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [21] = {
- .act_hid = BNXT_ULP_ACT_HID_19b42,
- .act_pattern_id = 20,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [22] = {
- .act_hid = BNXT_ULP_ACT_HID_36382,
- .act_pattern_id = 21,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [23] = {
- .act_hid = BNXT_ULP_ACT_HID_26782,
- .act_pattern_id = 22,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [24] = {
- .act_hid = BNXT_ULP_ACT_HID_197c2,
- .act_pattern_id = 23,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [25] = {
- .act_hid = BNXT_ULP_ACT_HID_19802,
- .act_pattern_id = 24,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [26] = {
- .act_hid = BNXT_ULP_ACT_HID_297c2,
- .act_pattern_id = 25,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [27] = {
- .act_hid = BNXT_ULP_ACT_HID_26402,
- .act_pattern_id = 26,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [28] = {
- .act_hid = BNXT_ULP_ACT_HID_19bc2,
- .act_pattern_id = 27,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [29] = {
- .act_hid = BNXT_ULP_ACT_HID_36402,
- .act_pattern_id = 28,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [30] = {
- .act_hid = BNXT_ULP_ACT_HID_26802,
- .act_pattern_id = 29,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [31] = {
- .act_hid = BNXT_ULP_ACT_HID_bca0,
- .act_pattern_id = 30,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [32] = {
- .act_hid = BNXT_ULP_ACT_HID_bce0,
- .act_pattern_id = 31,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [33] = {
- .act_hid = BNXT_ULP_ACT_HID_1bca0,
- .act_pattern_id = 32,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [34] = {
- .act_hid = BNXT_ULP_ACT_HID_168e0,
- .act_pattern_id = 33,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [35] = {
- .act_hid = BNXT_ULP_ACT_HID_a0a0,
- .act_pattern_id = 34,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [36] = {
- .act_hid = BNXT_ULP_ACT_HID_268e0,
- .act_pattern_id = 35,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [37] = {
- .act_hid = BNXT_ULP_ACT_HID_16ce0,
- .act_pattern_id = 36,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [38] = {
- .act_hid = BNXT_ULP_ACT_HID_bd20,
- .act_pattern_id = 37,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [39] = {
- .act_hid = BNXT_ULP_ACT_HID_bd60,
- .act_pattern_id = 38,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
+ .act_bitmap = { .bits =
BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [40] = {
- .act_hid = BNXT_ULP_ACT_HID_1bd20,
- .act_pattern_id = 39,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [41] = {
- .act_hid = BNXT_ULP_ACT_HID_16960,
- .act_pattern_id = 40,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [42] = {
- .act_hid = BNXT_ULP_ACT_HID_a120,
- .act_pattern_id = 41,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [43] = {
- .act_hid = BNXT_ULP_ACT_HID_26960,
- .act_pattern_id = 42,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_POP_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [44] = {
- .act_hid = BNXT_ULP_ACT_HID_16d60,
- .act_pattern_id = 43,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [45] = {
- .act_hid = BNXT_ULP_ACT_HID_4040,
- .act_pattern_id = 44,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [46] = {
- .act_hid = BNXT_ULP_ACT_HID_8040,
- .act_pattern_id = 45,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [47] = {
- .act_hid = BNXT_ULP_ACT_HID_c040,
- .act_pattern_id = 46,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [48] = {
- .act_hid = BNXT_ULP_ACT_HID_40c0,
- .act_pattern_id = 47,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [49] = {
- .act_hid = BNXT_ULP_ACT_HID_80c0,
- .act_pattern_id = 48,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [50] = {
- .act_hid = BNXT_ULP_ACT_HID_c0c0,
- .act_pattern_id = 49,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [51] = {
- .act_hid = BNXT_ULP_ACT_HID_4400,
- .act_pattern_id = 50,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [52] = {
- .act_hid = BNXT_ULP_ACT_HID_8400,
- .act_pattern_id = 51,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [53] = {
- .act_hid = BNXT_ULP_ACT_HID_c400,
- .act_pattern_id = 52,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [54] = {
- .act_hid = BNXT_ULP_ACT_HID_4480,
- .act_pattern_id = 53,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [55] = {
- .act_hid = BNXT_ULP_ACT_HID_8480,
- .act_pattern_id = 54,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [56] = {
- .act_hid = BNXT_ULP_ACT_HID_c480,
- .act_pattern_id = 55,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [57] = {
- .act_hid = BNXT_ULP_ACT_HID_1d782,
- .act_pattern_id = 56,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [58] = {
- .act_hid = BNXT_ULP_ACT_HID_21782,
- .act_pattern_id = 57,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [59] = {
- .act_hid = BNXT_ULP_ACT_HID_25782,
- .act_pattern_id = 58,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [60] = {
- .act_hid = BNXT_ULP_ACT_HID_1d802,
- .act_pattern_id = 59,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [61] = {
- .act_hid = BNXT_ULP_ACT_HID_21802,
- .act_pattern_id = 60,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [62] = {
- .act_hid = BNXT_ULP_ACT_HID_25802,
- .act_pattern_id = 61,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [63] = {
- .act_hid = BNXT_ULP_ACT_HID_1db42,
- .act_pattern_id = 62,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [64] = {
- .act_hid = BNXT_ULP_ACT_HID_21b42,
- .act_pattern_id = 63,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [65] = {
- .act_hid = BNXT_ULP_ACT_HID_25b42,
- .act_pattern_id = 64,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [66] = {
- .act_hid = BNXT_ULP_ACT_HID_1dbc2,
- .act_pattern_id = 65,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [67] = {
- .act_hid = BNXT_ULP_ACT_HID_21bc2,
- .act_pattern_id = 66,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [68] = {
- .act_hid = BNXT_ULP_ACT_HID_25bc2,
- .act_pattern_id = 67,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [69] = {
- .act_hid = BNXT_ULP_ACT_HID_fce0,
- .act_pattern_id = 68,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [70] = {
- .act_hid = BNXT_ULP_ACT_HID_13ce0,
- .act_pattern_id = 69,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [71] = {
- .act_hid = BNXT_ULP_ACT_HID_17ce0,
- .act_pattern_id = 70,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [72] = {
- .act_hid = BNXT_ULP_ACT_HID_fd60,
- .act_pattern_id = 71,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [73] = {
- .act_hid = BNXT_ULP_ACT_HID_13d60,
- .act_pattern_id = 72,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [74] = {
- .act_hid = BNXT_ULP_ACT_HID_17d60,
- .act_pattern_id = 73,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [75] = {
- .act_hid = BNXT_ULP_ACT_HID_e0a0,
- .act_pattern_id = 74,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [76] = {
- .act_hid = BNXT_ULP_ACT_HID_120a0,
- .act_pattern_id = 75,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [77] = {
- .act_hid = BNXT_ULP_ACT_HID_160a0,
- .act_pattern_id = 76,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [78] = {
- .act_hid = BNXT_ULP_ACT_HID_e120,
- .act_pattern_id = 77,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [79] = {
- .act_hid = BNXT_ULP_ACT_HID_12120,
- .act_pattern_id = 78,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [80] = {
- .act_hid = BNXT_ULP_ACT_HID_16120,
- .act_pattern_id = 79,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 1
- },
- [81] = {
- .act_hid = BNXT_ULP_ACT_HID_32061,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED |
- BNXT_ULP_ACT_BIT_SAMPLE |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 2
- },
- [82] = {
- .act_hid = BNXT_ULP_ACT_HID_320e1,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED |
- BNXT_ULP_ACT_BIT_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 2
- },
- [83] = {
- .act_hid = BNXT_ULP_ACT_HID_388a,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DELETE |
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 2
- },
- [84] = {
- .act_hid = BNXT_ULP_ACT_HID_4000,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [85] = {
- .act_hid = BNXT_ULP_ACT_HID_8000,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [86] = {
- .act_hid = BNXT_ULP_ACT_HID_c000,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [87] = {
- .act_hid = BNXT_ULP_ACT_HID_4080,
- .act_pattern_id = 3,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [88] = {
- .act_hid = BNXT_ULP_ACT_HID_8080,
- .act_pattern_id = 4,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [89] = {
- .act_hid = BNXT_ULP_ACT_HID_c080,
- .act_pattern_id = 5,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [90] = {
- .act_hid = BNXT_ULP_ACT_HID_8880,
- .act_pattern_id = 6,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [91] = {
- .act_hid = BNXT_ULP_ACT_HID_22100,
- .act_pattern_id = 7,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [92] = {
- .act_hid = BNXT_ULP_ACT_HID_11100,
- .act_pattern_id = 8,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [93] = {
- .act_hid = BNXT_ULP_ACT_HID_6420,
- .act_pattern_id = 9,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [94] = {
- .act_hid = BNXT_ULP_ACT_HID_1fca0,
- .act_pattern_id = 10,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [95] = {
- .act_hid = BNXT_ULP_ACT_HID_19980,
- .act_pattern_id = 11,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [96] = {
- .act_hid = BNXT_ULP_ACT_HID_28520,
- .act_pattern_id = 12,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [97] = {
- .act_hid = BNXT_ULP_ACT_HID_c880,
- .act_pattern_id = 13,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [98] = {
- .act_hid = BNXT_ULP_ACT_HID_26100,
- .act_pattern_id = 14,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [99] = {
- .act_hid = BNXT_ULP_ACT_HID_15100,
- .act_pattern_id = 15,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [100] = {
- .act_hid = BNXT_ULP_ACT_HID_a420,
- .act_pattern_id = 16,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [101] = {
- .act_hid = BNXT_ULP_ACT_HID_23ca0,
- .act_pattern_id = 17,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [102] = {
- .act_hid = BNXT_ULP_ACT_HID_1d980,
- .act_pattern_id = 18,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [103] = {
- .act_hid = BNXT_ULP_ACT_HID_2c520,
- .act_pattern_id = 19,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [104] = {
- .act_hid = BNXT_ULP_ACT_HID_10880,
- .act_pattern_id = 20,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [105] = {
- .act_hid = BNXT_ULP_ACT_HID_2a100,
- .act_pattern_id = 21,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [106] = {
- .act_hid = BNXT_ULP_ACT_HID_19100,
- .act_pattern_id = 22,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [107] = {
- .act_hid = BNXT_ULP_ACT_HID_e420,
- .act_pattern_id = 23,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [108] = {
- .act_hid = BNXT_ULP_ACT_HID_27ca0,
- .act_pattern_id = 24,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [109] = {
- .act_hid = BNXT_ULP_ACT_HID_21980,
- .act_pattern_id = 25,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [110] = {
- .act_hid = BNXT_ULP_ACT_HID_30520,
- .act_pattern_id = 26,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [111] = {
- .act_hid = BNXT_ULP_ACT_HID_14880,
- .act_pattern_id = 27,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [112] = {
- .act_hid = BNXT_ULP_ACT_HID_2e100,
- .act_pattern_id = 28,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [113] = {
- .act_hid = BNXT_ULP_ACT_HID_1d100,
- .act_pattern_id = 29,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [114] = {
- .act_hid = BNXT_ULP_ACT_HID_12420,
- .act_pattern_id = 30,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [115] = {
- .act_hid = BNXT_ULP_ACT_HID_2bca0,
- .act_pattern_id = 31,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [116] = {
- .act_hid = BNXT_ULP_ACT_HID_25980,
- .act_pattern_id = 32,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [117] = {
- .act_hid = BNXT_ULP_ACT_HID_34520,
- .act_pattern_id = 33,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [118] = {
- .act_hid = BNXT_ULP_ACT_HID_8900,
- .act_pattern_id = 34,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [119] = {
- .act_hid = BNXT_ULP_ACT_HID_22180,
- .act_pattern_id = 35,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [120] = {
- .act_hid = BNXT_ULP_ACT_HID_11180,
- .act_pattern_id = 36,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [121] = {
- .act_hid = BNXT_ULP_ACT_HID_64a0,
- .act_pattern_id = 37,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [122] = {
- .act_hid = BNXT_ULP_ACT_HID_1fd20,
- .act_pattern_id = 38,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [123] = {
- .act_hid = BNXT_ULP_ACT_HID_19a00,
- .act_pattern_id = 39,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [124] = {
- .act_hid = BNXT_ULP_ACT_HID_285a0,
- .act_pattern_id = 40,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [125] = {
- .act_hid = BNXT_ULP_ACT_HID_c900,
- .act_pattern_id = 41,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [126] = {
- .act_hid = BNXT_ULP_ACT_HID_26180,
- .act_pattern_id = 42,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [127] = {
- .act_hid = BNXT_ULP_ACT_HID_15180,
- .act_pattern_id = 43,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [128] = {
- .act_hid = BNXT_ULP_ACT_HID_a4a0,
- .act_pattern_id = 44,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [129] = {
- .act_hid = BNXT_ULP_ACT_HID_23d20,
- .act_pattern_id = 45,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [130] = {
- .act_hid = BNXT_ULP_ACT_HID_1da00,
- .act_pattern_id = 46,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [131] = {
- .act_hid = BNXT_ULP_ACT_HID_2c5a0,
- .act_pattern_id = 47,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [132] = {
- .act_hid = BNXT_ULP_ACT_HID_10900,
- .act_pattern_id = 48,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [133] = {
- .act_hid = BNXT_ULP_ACT_HID_2a180,
- .act_pattern_id = 49,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [134] = {
- .act_hid = BNXT_ULP_ACT_HID_19180,
- .act_pattern_id = 50,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [135] = {
- .act_hid = BNXT_ULP_ACT_HID_e4a0,
- .act_pattern_id = 51,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [136] = {
- .act_hid = BNXT_ULP_ACT_HID_27d20,
- .act_pattern_id = 52,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [137] = {
- .act_hid = BNXT_ULP_ACT_HID_21a00,
- .act_pattern_id = 53,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [138] = {
- .act_hid = BNXT_ULP_ACT_HID_305a0,
- .act_pattern_id = 54,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [139] = {
- .act_hid = BNXT_ULP_ACT_HID_14900,
- .act_pattern_id = 55,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [140] = {
- .act_hid = BNXT_ULP_ACT_HID_2e180,
- .act_pattern_id = 56,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [141] = {
- .act_hid = BNXT_ULP_ACT_HID_1d180,
- .act_pattern_id = 57,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [142] = {
- .act_hid = BNXT_ULP_ACT_HID_124a0,
- .act_pattern_id = 58,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [143] = {
- .act_hid = BNXT_ULP_ACT_HID_2bd20,
- .act_pattern_id = 59,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [144] = {
- .act_hid = BNXT_ULP_ACT_HID_25a00,
- .act_pattern_id = 60,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [145] = {
- .act_hid = BNXT_ULP_ACT_HID_345a0,
- .act_pattern_id = 61,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [146] = {
- .act_hid = BNXT_ULP_ACT_HID_154c0,
- .act_pattern_id = 62,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [147] = {
- .act_hid = BNXT_ULP_ACT_HID_2ed40,
- .act_pattern_id = 63,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [148] = {
- .act_hid = BNXT_ULP_ACT_HID_1dd40,
- .act_pattern_id = 64,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [149] = {
- .act_hid = BNXT_ULP_ACT_HID_13060,
- .act_pattern_id = 65,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [150] = {
- .act_hid = BNXT_ULP_ACT_HID_2c8e0,
- .act_pattern_id = 66,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [151] = {
- .act_hid = BNXT_ULP_ACT_HID_35160,
- .act_pattern_id = 67,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [152] = {
- .act_hid = BNXT_ULP_ACT_HID_15540,
- .act_pattern_id = 68,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [153] = {
- .act_hid = BNXT_ULP_ACT_HID_2edc0,
- .act_pattern_id = 69,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [154] = {
- .act_hid = BNXT_ULP_ACT_HID_1ddc0,
- .act_pattern_id = 70,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [155] = {
- .act_hid = BNXT_ULP_ACT_HID_130e0,
- .act_pattern_id = 71,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [156] = {
- .act_hid = BNXT_ULP_ACT_HID_2c960,
- .act_pattern_id = 72,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [157] = {
- .act_hid = BNXT_ULP_ACT_HID_351e0,
- .act_pattern_id = 73,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [158] = {
- .act_hid = BNXT_ULP_ACT_HID_194c0,
- .act_pattern_id = 74,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [159] = {
- .act_hid = BNXT_ULP_ACT_HID_32d40,
- .act_pattern_id = 75,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [160] = {
- .act_hid = BNXT_ULP_ACT_HID_21d40,
- .act_pattern_id = 76,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [161] = {
- .act_hid = BNXT_ULP_ACT_HID_17060,
- .act_pattern_id = 77,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [162] = {
- .act_hid = BNXT_ULP_ACT_HID_308e0,
- .act_pattern_id = 78,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [163] = {
- .act_hid = BNXT_ULP_ACT_HID_39160,
- .act_pattern_id = 79,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [164] = {
- .act_hid = BNXT_ULP_ACT_HID_19540,
- .act_pattern_id = 80,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [165] = {
- .act_hid = BNXT_ULP_ACT_HID_32dc0,
- .act_pattern_id = 81,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [166] = {
- .act_hid = BNXT_ULP_ACT_HID_21dc0,
- .act_pattern_id = 82,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [167] = {
- .act_hid = BNXT_ULP_ACT_HID_170e0,
- .act_pattern_id = 83,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [168] = {
- .act_hid = BNXT_ULP_ACT_HID_30960,
- .act_pattern_id = 84,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [169] = {
- .act_hid = BNXT_ULP_ACT_HID_391e0,
- .act_pattern_id = 85,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [170] = {
- .act_hid = BNXT_ULP_ACT_HID_1d4c0,
- .act_pattern_id = 86,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [171] = {
- .act_hid = BNXT_ULP_ACT_HID_36d40,
- .act_pattern_id = 87,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [172] = {
- .act_hid = BNXT_ULP_ACT_HID_25d40,
- .act_pattern_id = 88,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [173] = {
- .act_hid = BNXT_ULP_ACT_HID_1b060,
- .act_pattern_id = 89,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [174] = {
- .act_hid = BNXT_ULP_ACT_HID_348e0,
- .act_pattern_id = 90,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [175] = {
- .act_hid = BNXT_ULP_ACT_HID_3d160,
- .act_pattern_id = 91,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [176] = {
- .act_hid = BNXT_ULP_ACT_HID_1d540,
- .act_pattern_id = 92,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [177] = {
- .act_hid = BNXT_ULP_ACT_HID_36dc0,
- .act_pattern_id = 93,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [178] = {
- .act_hid = BNXT_ULP_ACT_HID_25dc0,
- .act_pattern_id = 94,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [179] = {
- .act_hid = BNXT_ULP_ACT_HID_1b0e0,
- .act_pattern_id = 95,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [180] = {
- .act_hid = BNXT_ULP_ACT_HID_34960,
- .act_pattern_id = 96,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [181] = {
- .act_hid = BNXT_ULP_ACT_HID_3d1e0,
- .act_pattern_id = 97,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [182] = {
- .act_hid = BNXT_ULP_ACT_HID_214c0,
- .act_pattern_id = 98,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [183] = {
- .act_hid = BNXT_ULP_ACT_HID_3ad40,
- .act_pattern_id = 99,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [184] = {
- .act_hid = BNXT_ULP_ACT_HID_29d40,
- .act_pattern_id = 100,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [185] = {
- .act_hid = BNXT_ULP_ACT_HID_1f060,
- .act_pattern_id = 101,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [186] = {
- .act_hid = BNXT_ULP_ACT_HID_388e0,
- .act_pattern_id = 102,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [187] = {
- .act_hid = BNXT_ULP_ACT_HID_3380,
- .act_pattern_id = 103,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [188] = {
- .act_hid = BNXT_ULP_ACT_HID_21540,
- .act_pattern_id = 104,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [189] = {
- .act_hid = BNXT_ULP_ACT_HID_3adc0,
- .act_pattern_id = 105,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [190] = {
- .act_hid = BNXT_ULP_ACT_HID_29dc0,
- .act_pattern_id = 106,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [191] = {
- .act_hid = BNXT_ULP_ACT_HID_1f0e0,
- .act_pattern_id = 107,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [192] = {
- .act_hid = BNXT_ULP_ACT_HID_38960,
- .act_pattern_id = 108,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [193] = {
- .act_hid = BNXT_ULP_ACT_HID_3400,
- .act_pattern_id = 109,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [194] = {
- .act_hid = BNXT_ULP_ACT_HID_1d742,
- .act_pattern_id = 110,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [195] = {
- .act_hid = BNXT_ULP_ACT_HID_21742,
- .act_pattern_id = 111,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [196] = {
- .act_hid = BNXT_ULP_ACT_HID_25742,
- .act_pattern_id = 112,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [197] = {
- .act_hid = BNXT_ULP_ACT_HID_1d7c2,
- .act_pattern_id = 113,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [198] = {
- .act_hid = BNXT_ULP_ACT_HID_217c2,
- .act_pattern_id = 114,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [199] = {
- .act_hid = BNXT_ULP_ACT_HID_257c2,
- .act_pattern_id = 115,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [200] = {
- .act_hid = BNXT_ULP_ACT_HID_21fc2,
- .act_pattern_id = 116,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [201] = {
- .act_hid = BNXT_ULP_ACT_HID_3b842,
- .act_pattern_id = 117,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [202] = {
- .act_hid = BNXT_ULP_ACT_HID_2a842,
- .act_pattern_id = 118,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [203] = {
- .act_hid = BNXT_ULP_ACT_HID_1fb62,
- .act_pattern_id = 119,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [204] = {
- .act_hid = BNXT_ULP_ACT_HID_393e2,
- .act_pattern_id = 120,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [205] = {
- .act_hid = BNXT_ULP_ACT_HID_330c2,
- .act_pattern_id = 121,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [206] = {
- .act_hid = BNXT_ULP_ACT_HID_3e82,
- .act_pattern_id = 122,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [207] = {
- .act_hid = BNXT_ULP_ACT_HID_25fc2,
- .act_pattern_id = 123,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [208] = {
- .act_hid = BNXT_ULP_ACT_HID_1a62,
- .act_pattern_id = 124,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [209] = {
- .act_hid = BNXT_ULP_ACT_HID_2e842,
- .act_pattern_id = 125,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [210] = {
- .act_hid = BNXT_ULP_ACT_HID_23b62,
- .act_pattern_id = 126,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [211] = {
- .act_hid = BNXT_ULP_ACT_HID_3d3e2,
- .act_pattern_id = 127,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [212] = {
- .act_hid = BNXT_ULP_ACT_HID_370c2,
- .act_pattern_id = 128,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [213] = {
- .act_hid = BNXT_ULP_ACT_HID_7e82,
- .act_pattern_id = 129,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [214] = {
- .act_hid = BNXT_ULP_ACT_HID_29fc2,
- .act_pattern_id = 130,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [215] = {
- .act_hid = BNXT_ULP_ACT_HID_5a62,
- .act_pattern_id = 131,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [216] = {
- .act_hid = BNXT_ULP_ACT_HID_32842,
- .act_pattern_id = 132,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [217] = {
- .act_hid = BNXT_ULP_ACT_HID_27b62,
- .act_pattern_id = 133,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [218] = {
- .act_hid = BNXT_ULP_ACT_HID_3602,
- .act_pattern_id = 134,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [219] = {
- .act_hid = BNXT_ULP_ACT_HID_3b0c2,
- .act_pattern_id = 135,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [220] = {
- .act_hid = BNXT_ULP_ACT_HID_be82,
- .act_pattern_id = 136,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [221] = {
- .act_hid = BNXT_ULP_ACT_HID_2dfc2,
- .act_pattern_id = 137,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [222] = {
- .act_hid = BNXT_ULP_ACT_HID_9a62,
- .act_pattern_id = 138,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [223] = {
- .act_hid = BNXT_ULP_ACT_HID_36842,
- .act_pattern_id = 139,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [224] = {
- .act_hid = BNXT_ULP_ACT_HID_2bb62,
- .act_pattern_id = 140,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [225] = {
- .act_hid = BNXT_ULP_ACT_HID_7602,
- .act_pattern_id = 141,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [226] = {
- .act_hid = BNXT_ULP_ACT_HID_12e2,
- .act_pattern_id = 142,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [227] = {
- .act_hid = BNXT_ULP_ACT_HID_fe82,
- .act_pattern_id = 143,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [228] = {
- .act_hid = BNXT_ULP_ACT_HID_22042,
- .act_pattern_id = 144,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [229] = {
- .act_hid = BNXT_ULP_ACT_HID_3b8c2,
- .act_pattern_id = 145,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [230] = {
- .act_hid = BNXT_ULP_ACT_HID_2a8c2,
- .act_pattern_id = 146,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [231] = {
- .act_hid = BNXT_ULP_ACT_HID_1fbe2,
- .act_pattern_id = 147,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [232] = {
- .act_hid = BNXT_ULP_ACT_HID_39462,
- .act_pattern_id = 148,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [233] = {
- .act_hid = BNXT_ULP_ACT_HID_33142,
- .act_pattern_id = 149,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [234] = {
- .act_hid = BNXT_ULP_ACT_HID_3f02,
- .act_pattern_id = 150,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [235] = {
- .act_hid = BNXT_ULP_ACT_HID_26042,
- .act_pattern_id = 151,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [236] = {
- .act_hid = BNXT_ULP_ACT_HID_1ae2,
- .act_pattern_id = 152,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [237] = {
- .act_hid = BNXT_ULP_ACT_HID_2e8c2,
- .act_pattern_id = 153,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [238] = {
- .act_hid = BNXT_ULP_ACT_HID_23be2,
- .act_pattern_id = 154,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [239] = {
- .act_hid = BNXT_ULP_ACT_HID_3d462,
- .act_pattern_id = 155,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [240] = {
- .act_hid = BNXT_ULP_ACT_HID_37142,
- .act_pattern_id = 156,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [241] = {
- .act_hid = BNXT_ULP_ACT_HID_7f02,
- .act_pattern_id = 157,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [242] = {
- .act_hid = BNXT_ULP_ACT_HID_2a042,
- .act_pattern_id = 158,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [243] = {
- .act_hid = BNXT_ULP_ACT_HID_5ae2,
- .act_pattern_id = 159,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [244] = {
- .act_hid = BNXT_ULP_ACT_HID_328c2,
- .act_pattern_id = 160,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [245] = {
- .act_hid = BNXT_ULP_ACT_HID_27be2,
- .act_pattern_id = 161,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [246] = {
- .act_hid = BNXT_ULP_ACT_HID_3682,
- .act_pattern_id = 162,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [247] = {
- .act_hid = BNXT_ULP_ACT_HID_3b142,
- .act_pattern_id = 163,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [248] = {
- .act_hid = BNXT_ULP_ACT_HID_bf02,
- .act_pattern_id = 164,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [249] = {
- .act_hid = BNXT_ULP_ACT_HID_2e042,
- .act_pattern_id = 165,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [250] = {
- .act_hid = BNXT_ULP_ACT_HID_9ae2,
- .act_pattern_id = 166,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [251] = {
- .act_hid = BNXT_ULP_ACT_HID_368c2,
- .act_pattern_id = 167,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [252] = {
- .act_hid = BNXT_ULP_ACT_HID_2bbe2,
- .act_pattern_id = 168,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [253] = {
- .act_hid = BNXT_ULP_ACT_HID_7682,
- .act_pattern_id = 169,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [254] = {
- .act_hid = BNXT_ULP_ACT_HID_1362,
- .act_pattern_id = 170,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [255] = {
- .act_hid = BNXT_ULP_ACT_HID_ff02,
- .act_pattern_id = 171,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [256] = {
- .act_hid = BNXT_ULP_ACT_HID_2ec02,
- .act_pattern_id = 172,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [257] = {
- .act_hid = BNXT_ULP_ACT_HID_a6a2,
- .act_pattern_id = 173,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [258] = {
- .act_hid = BNXT_ULP_ACT_HID_37482,
- .act_pattern_id = 174,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [259] = {
- .act_hid = BNXT_ULP_ACT_HID_2c7a2,
- .act_pattern_id = 175,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [260] = {
- .act_hid = BNXT_ULP_ACT_HID_8242,
- .act_pattern_id = 176,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [261] = {
- .act_hid = BNXT_ULP_ACT_HID_10ac2,
- .act_pattern_id = 177,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [262] = {
- .act_hid = BNXT_ULP_ACT_HID_2ec82,
- .act_pattern_id = 178,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [263] = {
- .act_hid = BNXT_ULP_ACT_HID_a722,
- .act_pattern_id = 179,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [264] = {
- .act_hid = BNXT_ULP_ACT_HID_37502,
- .act_pattern_id = 180,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [265] = {
- .act_hid = BNXT_ULP_ACT_HID_2c822,
- .act_pattern_id = 181,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [266] = {
- .act_hid = BNXT_ULP_ACT_HID_82c2,
- .act_pattern_id = 182,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [267] = {
- .act_hid = BNXT_ULP_ACT_HID_10b42,
- .act_pattern_id = 183,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [268] = {
- .act_hid = BNXT_ULP_ACT_HID_32c02,
- .act_pattern_id = 184,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [269] = {
- .act_hid = BNXT_ULP_ACT_HID_e6a2,
- .act_pattern_id = 185,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [270] = {
- .act_hid = BNXT_ULP_ACT_HID_3b482,
- .act_pattern_id = 186,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [271] = {
- .act_hid = BNXT_ULP_ACT_HID_307a2,
- .act_pattern_id = 187,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [272] = {
- .act_hid = BNXT_ULP_ACT_HID_c242,
- .act_pattern_id = 188,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [273] = {
- .act_hid = BNXT_ULP_ACT_HID_14ac2,
- .act_pattern_id = 189,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [274] = {
- .act_hid = BNXT_ULP_ACT_HID_32c82,
- .act_pattern_id = 190,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [275] = {
- .act_hid = BNXT_ULP_ACT_HID_e722,
- .act_pattern_id = 191,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [276] = {
- .act_hid = BNXT_ULP_ACT_HID_3b502,
- .act_pattern_id = 192,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [277] = {
- .act_hid = BNXT_ULP_ACT_HID_30822,
- .act_pattern_id = 193,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [278] = {
- .act_hid = BNXT_ULP_ACT_HID_c2c2,
- .act_pattern_id = 194,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [279] = {
- .act_hid = BNXT_ULP_ACT_HID_14b42,
- .act_pattern_id = 195,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [280] = {
- .act_hid = BNXT_ULP_ACT_HID_36c02,
- .act_pattern_id = 196,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [281] = {
- .act_hid = BNXT_ULP_ACT_HID_126a2,
- .act_pattern_id = 197,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [282] = {
- .act_hid = BNXT_ULP_ACT_HID_16a2,
- .act_pattern_id = 198,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [283] = {
- .act_hid = BNXT_ULP_ACT_HID_347a2,
- .act_pattern_id = 199,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [284] = {
- .act_hid = BNXT_ULP_ACT_HID_10242,
- .act_pattern_id = 200,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [285] = {
- .act_hid = BNXT_ULP_ACT_HID_18ac2,
- .act_pattern_id = 201,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [286] = {
- .act_hid = BNXT_ULP_ACT_HID_36c82,
- .act_pattern_id = 202,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [287] = {
- .act_hid = BNXT_ULP_ACT_HID_12722,
- .act_pattern_id = 203,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [288] = {
- .act_hid = BNXT_ULP_ACT_HID_1722,
- .act_pattern_id = 204,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [289] = {
- .act_hid = BNXT_ULP_ACT_HID_34822,
- .act_pattern_id = 205,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [290] = {
- .act_hid = BNXT_ULP_ACT_HID_102c2,
- .act_pattern_id = 206,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [291] = {
- .act_hid = BNXT_ULP_ACT_HID_18b42,
- .act_pattern_id = 207,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [292] = {
- .act_hid = BNXT_ULP_ACT_HID_3ac02,
- .act_pattern_id = 208,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [293] = {
- .act_hid = BNXT_ULP_ACT_HID_166a2,
- .act_pattern_id = 209,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [294] = {
- .act_hid = BNXT_ULP_ACT_HID_56a2,
- .act_pattern_id = 210,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [295] = {
- .act_hid = BNXT_ULP_ACT_HID_387a2,
- .act_pattern_id = 211,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [296] = {
- .act_hid = BNXT_ULP_ACT_HID_14242,
- .act_pattern_id = 212,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [297] = {
- .act_hid = BNXT_ULP_ACT_HID_1cac2,
- .act_pattern_id = 213,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [298] = {
- .act_hid = BNXT_ULP_ACT_HID_3ac82,
- .act_pattern_id = 214,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [299] = {
- .act_hid = BNXT_ULP_ACT_HID_16722,
- .act_pattern_id = 215,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [300] = {
- .act_hid = BNXT_ULP_ACT_HID_5722,
- .act_pattern_id = 216,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [301] = {
- .act_hid = BNXT_ULP_ACT_HID_38822,
- .act_pattern_id = 217,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [302] = {
- .act_hid = BNXT_ULP_ACT_HID_142c2,
- .act_pattern_id = 218,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [303] = {
- .act_hid = BNXT_ULP_ACT_HID_1cb42,
- .act_pattern_id = 219,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [304] = {
- .act_hid = BNXT_ULP_ACT_HID_12520,
- .act_pattern_id = 220,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [305] = {
- .act_hid = BNXT_ULP_ACT_HID_2bda0,
- .act_pattern_id = 221,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [306] = {
- .act_hid = BNXT_ULP_ACT_HID_1ada0,
- .act_pattern_id = 222,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [307] = {
- .act_hid = BNXT_ULP_ACT_HID_120c0,
- .act_pattern_id = 223,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [308] = {
- .act_hid = BNXT_ULP_ACT_HID_2b940,
- .act_pattern_id = 224,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [309] = {
- .act_hid = BNXT_ULP_ACT_HID_23620,
- .act_pattern_id = 225,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [310] = {
- .act_hid = BNXT_ULP_ACT_HID_321c0,
- .act_pattern_id = 226,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [311] = {
- .act_hid = BNXT_ULP_ACT_HID_125a0,
- .act_pattern_id = 227,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [312] = {
- .act_hid = BNXT_ULP_ACT_HID_2be20,
- .act_pattern_id = 228,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [313] = {
- .act_hid = BNXT_ULP_ACT_HID_1ae20,
- .act_pattern_id = 229,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [314] = {
- .act_hid = BNXT_ULP_ACT_HID_12140,
- .act_pattern_id = 230,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [315] = {
- .act_hid = BNXT_ULP_ACT_HID_2b9c0,
- .act_pattern_id = 231,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [316] = {
- .act_hid = BNXT_ULP_ACT_HID_236a0,
- .act_pattern_id = 232,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [317] = {
- .act_hid = BNXT_ULP_ACT_HID_32240,
- .act_pattern_id = 233,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [318] = {
- .act_hid = BNXT_ULP_ACT_HID_1f160,
- .act_pattern_id = 234,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [319] = {
- .act_hid = BNXT_ULP_ACT_HID_3a9e0,
- .act_pattern_id = 235,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [320] = {
- .act_hid = BNXT_ULP_ACT_HID_279e0,
- .act_pattern_id = 236,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [321] = {
- .act_hid = BNXT_ULP_ACT_HID_1ed00,
- .act_pattern_id = 237,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [322] = {
- .act_hid = BNXT_ULP_ACT_HID_36580,
- .act_pattern_id = 238,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [323] = {
- .act_hid = BNXT_ULP_ACT_HID_3020,
- .act_pattern_id = 239,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [324] = {
- .act_hid = BNXT_ULP_ACT_HID_1f1e0,
- .act_pattern_id = 240,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [325] = {
- .act_hid = BNXT_ULP_ACT_HID_3aa60,
- .act_pattern_id = 241,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [326] = {
- .act_hid = BNXT_ULP_ACT_HID_27a60,
- .act_pattern_id = 242,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [327] = {
- .act_hid = BNXT_ULP_ACT_HID_1ed80,
- .act_pattern_id = 243,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [328] = {
- .act_hid = BNXT_ULP_ACT_HID_36600,
- .act_pattern_id = 244,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [329] = {
- .act_hid = BNXT_ULP_ACT_HID_30a0,
- .act_pattern_id = 245,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [330] = {
- .act_hid = BNXT_ULP_ACT_HID_0100,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_RSS |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
- [331] = {
- .act_hid = BNXT_ULP_ACT_HID_0180,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_RSS |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
- [332] = {
- .act_hid = BNXT_ULP_ACT_HID_32e84,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_QUEUE |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
- [333] = {
- .act_hid = BNXT_ULP_ACT_HID_32f04,
- .act_pattern_id = 3,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_QUEUE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
- [334] = {
- .act_hid = BNXT_ULP_ACT_HID_19842,
- .act_pattern_id = 4,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_RSS |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
- [335] = {
- .act_hid = BNXT_ULP_ACT_HID_198c2,
- .act_pattern_id = 5,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_RSS |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
- [336] = {
- .act_hid = BNXT_ULP_ACT_HID_e7e6,
- .act_pattern_id = 6,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_QUEUE |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
- [337] = {
- .act_hid = BNXT_ULP_ACT_HID_e866,
- .act_pattern_id = 7,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_QUEUE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
- [338] = {
- .act_hid = BNXT_ULP_ACT_HID_a3e0,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_METER_PROFILE |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
- },
- [339] = {
- .act_hid = BNXT_ULP_ACT_HID_240e0,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_METER |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
- },
- [340] = {
- .act_hid = BNXT_ULP_ACT_HID_322c8,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DELETE |
- BNXT_ULP_ACT_BIT_METER_PROFILE |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
- },
- [341] = {
- .act_hid = BNXT_ULP_ACT_HID_e228,
- .act_pattern_id = 3,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DELETE |
- BNXT_ULP_ACT_BIT_SHARED_METER |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
- },
- [342] = {
- .act_hid = BNXT_ULP_ACT_HID_36130,
- .act_pattern_id = 4,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_UPDATE |
- BNXT_ULP_ACT_BIT_SHARED_METER |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
- },
- [343] = {
- .act_hid = BNXT_ULP_ACT_HID_2e840,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [344] = {
- .act_hid = BNXT_ULP_ACT_HID_2e880,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [345] = {
- .act_hid = BNXT_ULP_ACT_HID_2e900,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [346] = {
- .act_hid = BNXT_ULP_ACT_HID_170c0,
- .act_pattern_id = 3,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [347] = {
- .act_hid = BNXT_ULP_ACT_HID_14ea0,
- .act_pattern_id = 4,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [348] = {
- .act_hid = BNXT_ULP_ACT_HID_3b480,
- .act_pattern_id = 5,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [349] = {
- .act_hid = BNXT_ULP_ACT_HID_23d00,
- .act_pattern_id = 6,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [350] = {
- .act_hid = BNXT_ULP_ACT_HID_21ae0,
- .act_pattern_id = 7,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [351] = {
- .act_hid = BNXT_ULP_ACT_HID_2e8c0,
- .act_pattern_id = 8,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [352] = {
- .act_hid = BNXT_ULP_ACT_HID_17140,
- .act_pattern_id = 9,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [353] = {
- .act_hid = BNXT_ULP_ACT_HID_14f20,
- .act_pattern_id = 10,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [354] = {
- .act_hid = BNXT_ULP_ACT_HID_3b500,
- .act_pattern_id = 11,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [355] = {
- .act_hid = BNXT_ULP_ACT_HID_23d80,
- .act_pattern_id = 12,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [356] = {
- .act_hid = BNXT_ULP_ACT_HID_21b60,
- .act_pattern_id = 13,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [357] = {
- .act_hid = BNXT_ULP_ACT_HID_a1a2,
- .act_pattern_id = 14,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [358] = {
- .act_hid = BNXT_ULP_ACT_HID_a1e2,
- .act_pattern_id = 15,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [359] = {
- .act_hid = BNXT_ULP_ACT_HID_a262,
- .act_pattern_id = 16,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [360] = {
- .act_hid = BNXT_ULP_ACT_HID_30802,
- .act_pattern_id = 17,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [361] = {
- .act_hid = BNXT_ULP_ACT_HID_2e5e2,
- .act_pattern_id = 18,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [362] = {
- .act_hid = BNXT_ULP_ACT_HID_16de2,
- .act_pattern_id = 19,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [363] = {
- .act_hid = BNXT_ULP_ACT_HID_3d442,
- .act_pattern_id = 20,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [364] = {
- .act_hid = BNXT_ULP_ACT_HID_3b222,
- .act_pattern_id = 21,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [365] = {
- .act_hid = BNXT_ULP_ACT_HID_a222,
- .act_pattern_id = 22,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [366] = {
- .act_hid = BNXT_ULP_ACT_HID_30882,
- .act_pattern_id = 23,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [367] = {
- .act_hid = BNXT_ULP_ACT_HID_2e662,
- .act_pattern_id = 24,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [368] = {
- .act_hid = BNXT_ULP_ACT_HID_16e62,
- .act_pattern_id = 25,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [369] = {
- .act_hid = BNXT_ULP_ACT_HID_3d4c2,
- .act_pattern_id = 26,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [370] = {
- .act_hid = BNXT_ULP_ACT_HID_3b2a2,
- .act_pattern_id = 27,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [371] = {
- .act_hid = BNXT_ULP_ACT_HID_3a4e0,
- .act_pattern_id = 28,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [372] = {
- .act_hid = BNXT_ULP_ACT_HID_3a520,
- .act_pattern_id = 29,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [373] = {
- .act_hid = BNXT_ULP_ACT_HID_3a5a0,
- .act_pattern_id = 30,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [374] = {
- .act_hid = BNXT_ULP_ACT_HID_22d60,
- .act_pattern_id = 31,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [375] = {
- .act_hid = BNXT_ULP_ACT_HID_1eb40,
- .act_pattern_id = 32,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [376] = {
- .act_hid = BNXT_ULP_ACT_HID_7340,
- .act_pattern_id = 33,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [377] = {
- .act_hid = BNXT_ULP_ACT_HID_2f9a0,
- .act_pattern_id = 34,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [378] = {
- .act_hid = BNXT_ULP_ACT_HID_2b780,
- .act_pattern_id = 35,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [379] = {
- .act_hid = BNXT_ULP_ACT_HID_3a560,
- .act_pattern_id = 36,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [380] = {
- .act_hid = BNXT_ULP_ACT_HID_22de0,
- .act_pattern_id = 37,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [381] = {
- .act_hid = BNXT_ULP_ACT_HID_1ebc0,
- .act_pattern_id = 38,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [382] = {
- .act_hid = BNXT_ULP_ACT_HID_73c0,
- .act_pattern_id = 39,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [383] = {
- .act_hid = BNXT_ULP_ACT_HID_2fa20,
- .act_pattern_id = 40,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [384] = {
- .act_hid = BNXT_ULP_ACT_HID_2b800,
- .act_pattern_id = 41,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [385] = {
- .act_hid = BNXT_ULP_ACT_HID_32840,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [386] = {
- .act_hid = BNXT_ULP_ACT_HID_36840,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [387] = {
- .act_hid = BNXT_ULP_ACT_HID_3a840,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [388] = {
- .act_hid = BNXT_ULP_ACT_HID_328c0,
- .act_pattern_id = 3,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [389] = {
- .act_hid = BNXT_ULP_ACT_HID_368c0,
- .act_pattern_id = 4,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [390] = {
- .act_hid = BNXT_ULP_ACT_HID_3a8c0,
- .act_pattern_id = 5,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [391] = {
- .act_hid = BNXT_ULP_ACT_HID_370c0,
- .act_pattern_id = 6,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [392] = {
- .act_hid = BNXT_ULP_ACT_HID_12b60,
- .act_pattern_id = 7,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [393] = {
- .act_hid = BNXT_ULP_ACT_HID_1b60,
- .act_pattern_id = 8,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [394] = {
- .act_hid = BNXT_ULP_ACT_HID_34c60,
- .act_pattern_id = 9,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [395] = {
- .act_hid = BNXT_ULP_ACT_HID_10700,
- .act_pattern_id = 10,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [396] = {
- .act_hid = BNXT_ULP_ACT_HID_18f80,
- .act_pattern_id = 11,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [397] = {
- .act_hid = BNXT_ULP_ACT_HID_3b0c0,
- .act_pattern_id = 12,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [398] = {
- .act_hid = BNXT_ULP_ACT_HID_16b60,
- .act_pattern_id = 13,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [399] = {
- .act_hid = BNXT_ULP_ACT_HID_5b60,
- .act_pattern_id = 14,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [400] = {
- .act_hid = BNXT_ULP_ACT_HID_38c60,
- .act_pattern_id = 15,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [401] = {
- .act_hid = BNXT_ULP_ACT_HID_14700,
- .act_pattern_id = 16,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [402] = {
- .act_hid = BNXT_ULP_ACT_HID_1cf80,
- .act_pattern_id = 17,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [403] = {
- .act_hid = BNXT_ULP_ACT_HID_12e0,
- .act_pattern_id = 18,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [404] = {
- .act_hid = BNXT_ULP_ACT_HID_1ab60,
- .act_pattern_id = 19,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [405] = {
- .act_hid = BNXT_ULP_ACT_HID_9b60,
- .act_pattern_id = 20,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [406] = {
- .act_hid = BNXT_ULP_ACT_HID_3cc60,
- .act_pattern_id = 21,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [407] = {
- .act_hid = BNXT_ULP_ACT_HID_18700,
- .act_pattern_id = 22,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [408] = {
- .act_hid = BNXT_ULP_ACT_HID_20f80,
- .act_pattern_id = 23,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [409] = {
- .act_hid = BNXT_ULP_ACT_HID_52e0,
- .act_pattern_id = 24,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [410] = {
- .act_hid = BNXT_ULP_ACT_HID_1eb60,
- .act_pattern_id = 25,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [411] = {
- .act_hid = BNXT_ULP_ACT_HID_db60,
- .act_pattern_id = 26,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [412] = {
- .act_hid = BNXT_ULP_ACT_HID_2e80,
- .act_pattern_id = 27,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [413] = {
- .act_hid = BNXT_ULP_ACT_HID_1c700,
- .act_pattern_id = 28,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [414] = {
- .act_hid = BNXT_ULP_ACT_HID_24f80,
- .act_pattern_id = 29,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [415] = {
- .act_hid = BNXT_ULP_ACT_HID_37140,
- .act_pattern_id = 30,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [416] = {
- .act_hid = BNXT_ULP_ACT_HID_12be0,
- .act_pattern_id = 31,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [417] = {
- .act_hid = BNXT_ULP_ACT_HID_1be0,
- .act_pattern_id = 32,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [418] = {
- .act_hid = BNXT_ULP_ACT_HID_34ce0,
- .act_pattern_id = 33,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [419] = {
- .act_hid = BNXT_ULP_ACT_HID_10780,
- .act_pattern_id = 34,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [420] = {
- .act_hid = BNXT_ULP_ACT_HID_19000,
- .act_pattern_id = 35,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [421] = {
- .act_hid = BNXT_ULP_ACT_HID_3b140,
- .act_pattern_id = 36,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [422] = {
- .act_hid = BNXT_ULP_ACT_HID_16be0,
- .act_pattern_id = 37,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [423] = {
- .act_hid = BNXT_ULP_ACT_HID_5be0,
- .act_pattern_id = 38,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [424] = {
- .act_hid = BNXT_ULP_ACT_HID_38ce0,
- .act_pattern_id = 39,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [425] = {
- .act_hid = BNXT_ULP_ACT_HID_14780,
- .act_pattern_id = 40,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [426] = {
- .act_hid = BNXT_ULP_ACT_HID_1d000,
- .act_pattern_id = 41,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [427] = {
- .act_hid = BNXT_ULP_ACT_HID_1360,
- .act_pattern_id = 42,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [428] = {
- .act_hid = BNXT_ULP_ACT_HID_1abe0,
- .act_pattern_id = 43,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [429] = {
- .act_hid = BNXT_ULP_ACT_HID_9be0,
- .act_pattern_id = 44,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [430] = {
- .act_hid = BNXT_ULP_ACT_HID_3cce0,
- .act_pattern_id = 45,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [431] = {
- .act_hid = BNXT_ULP_ACT_HID_18780,
- .act_pattern_id = 46,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [432] = {
- .act_hid = BNXT_ULP_ACT_HID_21000,
- .act_pattern_id = 47,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [433] = {
- .act_hid = BNXT_ULP_ACT_HID_5360,
- .act_pattern_id = 48,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [434] = {
- .act_hid = BNXT_ULP_ACT_HID_1ebe0,
- .act_pattern_id = 49,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [435] = {
- .act_hid = BNXT_ULP_ACT_HID_dbe0,
- .act_pattern_id = 50,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [436] = {
- .act_hid = BNXT_ULP_ACT_HID_2f00,
- .act_pattern_id = 51,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [437] = {
- .act_hid = BNXT_ULP_ACT_HID_1c780,
- .act_pattern_id = 52,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [438] = {
- .act_hid = BNXT_ULP_ACT_HID_25000,
- .act_pattern_id = 53,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [439] = {
- .act_hid = BNXT_ULP_ACT_HID_5f20,
- .act_pattern_id = 54,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [440] = {
- .act_hid = BNXT_ULP_ACT_HID_1f7a0,
- .act_pattern_id = 55,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [441] = {
- .act_hid = BNXT_ULP_ACT_HID_e7a0,
- .act_pattern_id = 56,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [442] = {
- .act_hid = BNXT_ULP_ACT_HID_3ac0,
- .act_pattern_id = 57,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [443] = {
- .act_hid = BNXT_ULP_ACT_HID_1d340,
- .act_pattern_id = 58,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [444] = {
- .act_hid = BNXT_ULP_ACT_HID_25bc0,
- .act_pattern_id = 59,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [445] = {
- .act_hid = BNXT_ULP_ACT_HID_5fa0,
- .act_pattern_id = 60,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [446] = {
- .act_hid = BNXT_ULP_ACT_HID_1f820,
- .act_pattern_id = 61,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [447] = {
- .act_hid = BNXT_ULP_ACT_HID_e820,
- .act_pattern_id = 62,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [448] = {
- .act_hid = BNXT_ULP_ACT_HID_3b40,
- .act_pattern_id = 63,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [449] = {
- .act_hid = BNXT_ULP_ACT_HID_1d3c0,
- .act_pattern_id = 64,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [450] = {
- .act_hid = BNXT_ULP_ACT_HID_25c40,
- .act_pattern_id = 65,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [451] = {
- .act_hid = BNXT_ULP_ACT_HID_237a0,
- .act_pattern_id = 66,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [452] = {
- .act_hid = BNXT_ULP_ACT_HID_127a0,
- .act_pattern_id = 67,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [453] = {
- .act_hid = BNXT_ULP_ACT_HID_7ac0,
- .act_pattern_id = 68,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [454] = {
- .act_hid = BNXT_ULP_ACT_HID_9f20,
- .act_pattern_id = 69,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [455] = {
- .act_hid = BNXT_ULP_ACT_HID_21340,
- .act_pattern_id = 70,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [456] = {
- .act_hid = BNXT_ULP_ACT_HID_29bc0,
- .act_pattern_id = 71,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [457] = {
- .act_hid = BNXT_ULP_ACT_HID_9fa0,
- .act_pattern_id = 72,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [458] = {
- .act_hid = BNXT_ULP_ACT_HID_23820,
- .act_pattern_id = 73,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [459] = {
- .act_hid = BNXT_ULP_ACT_HID_12820,
- .act_pattern_id = 74,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [460] = {
- .act_hid = BNXT_ULP_ACT_HID_7b40,
- .act_pattern_id = 75,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [461] = {
- .act_hid = BNXT_ULP_ACT_HID_213c0,
- .act_pattern_id = 76,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [462] = {
- .act_hid = BNXT_ULP_ACT_HID_29c40,
- .act_pattern_id = 77,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [463] = {
- .act_hid = BNXT_ULP_ACT_HID_df20,
- .act_pattern_id = 78,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [464] = {
- .act_hid = BNXT_ULP_ACT_HID_277a0,
- .act_pattern_id = 79,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [465] = {
- .act_hid = BNXT_ULP_ACT_HID_167a0,
- .act_pattern_id = 80,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [466] = {
- .act_hid = BNXT_ULP_ACT_HID_bac0,
- .act_pattern_id = 81,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [467] = {
- .act_hid = BNXT_ULP_ACT_HID_25340,
- .act_pattern_id = 82,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [468] = {
- .act_hid = BNXT_ULP_ACT_HID_2dbc0,
- .act_pattern_id = 83,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [469] = {
- .act_hid = BNXT_ULP_ACT_HID_dfa0,
- .act_pattern_id = 84,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [470] = {
- .act_hid = BNXT_ULP_ACT_HID_27820,
- .act_pattern_id = 85,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [471] = {
- .act_hid = BNXT_ULP_ACT_HID_16820,
- .act_pattern_id = 86,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [472] = {
- .act_hid = BNXT_ULP_ACT_HID_bb40,
- .act_pattern_id = 87,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [473] = {
- .act_hid = BNXT_ULP_ACT_HID_253c0,
- .act_pattern_id = 88,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [474] = {
- .act_hid = BNXT_ULP_ACT_HID_2dc40,
- .act_pattern_id = 89,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [475] = {
- .act_hid = BNXT_ULP_ACT_HID_11f20,
- .act_pattern_id = 90,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [476] = {
- .act_hid = BNXT_ULP_ACT_HID_2b7a0,
- .act_pattern_id = 91,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [477] = {
- .act_hid = BNXT_ULP_ACT_HID_1a7a0,
- .act_pattern_id = 92,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [478] = {
- .act_hid = BNXT_ULP_ACT_HID_fac0,
- .act_pattern_id = 93,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [479] = {
- .act_hid = BNXT_ULP_ACT_HID_29340,
- .act_pattern_id = 94,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [480] = {
- .act_hid = BNXT_ULP_ACT_HID_31bc0,
- .act_pattern_id = 95,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [481] = {
- .act_hid = BNXT_ULP_ACT_HID_11fa0,
- .act_pattern_id = 96,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [482] = {
- .act_hid = BNXT_ULP_ACT_HID_2b820,
- .act_pattern_id = 97,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [483] = {
- .act_hid = BNXT_ULP_ACT_HID_1a820,
- .act_pattern_id = 98,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [484] = {
- .act_hid = BNXT_ULP_ACT_HID_fb40,
- .act_pattern_id = 99,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [485] = {
- .act_hid = BNXT_ULP_ACT_HID_293c0,
- .act_pattern_id = 100,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [486] = {
- .act_hid = BNXT_ULP_ACT_HID_31c40,
- .act_pattern_id = 101,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [487] = {
- .act_hid = BNXT_ULP_ACT_HID_e1a2,
- .act_pattern_id = 102,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [488] = {
- .act_hid = BNXT_ULP_ACT_HID_121a2,
- .act_pattern_id = 103,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [489] = {
- .act_hid = BNXT_ULP_ACT_HID_161a2,
- .act_pattern_id = 104,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [490] = {
- .act_hid = BNXT_ULP_ACT_HID_e222,
- .act_pattern_id = 105,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [491] = {
- .act_hid = BNXT_ULP_ACT_HID_12222,
- .act_pattern_id = 106,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [492] = {
- .act_hid = BNXT_ULP_ACT_HID_16222,
- .act_pattern_id = 107,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [493] = {
- .act_hid = BNXT_ULP_ACT_HID_12a22,
- .act_pattern_id = 108,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [494] = {
- .act_hid = BNXT_ULP_ACT_HID_2c2a2,
- .act_pattern_id = 109,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [495] = {
- .act_hid = BNXT_ULP_ACT_HID_1b2a2,
- .act_pattern_id = 110,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [496] = {
- .act_hid = BNXT_ULP_ACT_HID_105c2,
- .act_pattern_id = 111,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [497] = {
- .act_hid = BNXT_ULP_ACT_HID_29e42,
- .act_pattern_id = 112,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [498] = {
- .act_hid = BNXT_ULP_ACT_HID_326c2,
- .act_pattern_id = 113,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [499] = {
- .act_hid = BNXT_ULP_ACT_HID_16a22,
- .act_pattern_id = 114,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [500] = {
- .act_hid = BNXT_ULP_ACT_HID_302a2,
- .act_pattern_id = 115,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [501] = {
- .act_hid = BNXT_ULP_ACT_HID_1f2a2,
- .act_pattern_id = 116,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [502] = {
- .act_hid = BNXT_ULP_ACT_HID_145c2,
- .act_pattern_id = 117,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [503] = {
- .act_hid = BNXT_ULP_ACT_HID_2de42,
- .act_pattern_id = 118,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [504] = {
- .act_hid = BNXT_ULP_ACT_HID_366c2,
- .act_pattern_id = 119,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [505] = {
- .act_hid = BNXT_ULP_ACT_HID_1aa22,
- .act_pattern_id = 120,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [506] = {
- .act_hid = BNXT_ULP_ACT_HID_342a2,
- .act_pattern_id = 121,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [507] = {
- .act_hid = BNXT_ULP_ACT_HID_232a2,
- .act_pattern_id = 122,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [508] = {
- .act_hid = BNXT_ULP_ACT_HID_185c2,
- .act_pattern_id = 123,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [509] = {
- .act_hid = BNXT_ULP_ACT_HID_31e42,
- .act_pattern_id = 124,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [510] = {
- .act_hid = BNXT_ULP_ACT_HID_3a6c2,
- .act_pattern_id = 125,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [511] = {
- .act_hid = BNXT_ULP_ACT_HID_1ea22,
- .act_pattern_id = 126,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [512] = {
- .act_hid = BNXT_ULP_ACT_HID_382a2,
- .act_pattern_id = 127,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [513] = {
- .act_hid = BNXT_ULP_ACT_HID_272a2,
- .act_pattern_id = 128,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [514] = {
- .act_hid = BNXT_ULP_ACT_HID_1c5c2,
- .act_pattern_id = 129,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [515] = {
- .act_hid = BNXT_ULP_ACT_HID_35e42,
- .act_pattern_id = 130,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [516] = {
- .act_hid = BNXT_ULP_ACT_HID_08e2,
- .act_pattern_id = 131,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [517] = {
- .act_hid = BNXT_ULP_ACT_HID_12aa2,
- .act_pattern_id = 132,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [518] = {
- .act_hid = BNXT_ULP_ACT_HID_2c322,
- .act_pattern_id = 133,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [519] = {
- .act_hid = BNXT_ULP_ACT_HID_1b322,
- .act_pattern_id = 134,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [520] = {
- .act_hid = BNXT_ULP_ACT_HID_10642,
- .act_pattern_id = 135,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [521] = {
- .act_hid = BNXT_ULP_ACT_HID_29ec2,
- .act_pattern_id = 136,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [522] = {
- .act_hid = BNXT_ULP_ACT_HID_32742,
- .act_pattern_id = 137,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [523] = {
- .act_hid = BNXT_ULP_ACT_HID_16aa2,
- .act_pattern_id = 138,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [524] = {
- .act_hid = BNXT_ULP_ACT_HID_30322,
- .act_pattern_id = 139,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [525] = {
- .act_hid = BNXT_ULP_ACT_HID_1f322,
- .act_pattern_id = 140,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [526] = {
- .act_hid = BNXT_ULP_ACT_HID_14642,
- .act_pattern_id = 141,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [527] = {
- .act_hid = BNXT_ULP_ACT_HID_2dec2,
- .act_pattern_id = 142,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [528] = {
- .act_hid = BNXT_ULP_ACT_HID_36742,
- .act_pattern_id = 143,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [529] = {
- .act_hid = BNXT_ULP_ACT_HID_1aaa2,
- .act_pattern_id = 144,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [530] = {
- .act_hid = BNXT_ULP_ACT_HID_34322,
- .act_pattern_id = 145,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [531] = {
- .act_hid = BNXT_ULP_ACT_HID_23322,
- .act_pattern_id = 146,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [532] = {
- .act_hid = BNXT_ULP_ACT_HID_18642,
- .act_pattern_id = 147,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [533] = {
- .act_hid = BNXT_ULP_ACT_HID_31ec2,
- .act_pattern_id = 148,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [534] = {
- .act_hid = BNXT_ULP_ACT_HID_3a742,
- .act_pattern_id = 149,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [535] = {
- .act_hid = BNXT_ULP_ACT_HID_1eaa2,
- .act_pattern_id = 150,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [536] = {
- .act_hid = BNXT_ULP_ACT_HID_38322,
- .act_pattern_id = 151,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [537] = {
- .act_hid = BNXT_ULP_ACT_HID_27322,
- .act_pattern_id = 152,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [538] = {
- .act_hid = BNXT_ULP_ACT_HID_1c642,
- .act_pattern_id = 153,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [539] = {
- .act_hid = BNXT_ULP_ACT_HID_35ec2,
- .act_pattern_id = 154,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [540] = {
- .act_hid = BNXT_ULP_ACT_HID_0962,
- .act_pattern_id = 155,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [541] = {
- .act_hid = BNXT_ULP_ACT_HID_1f662,
- .act_pattern_id = 156,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [542] = {
- .act_hid = BNXT_ULP_ACT_HID_38ee2,
- .act_pattern_id = 157,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [543] = {
- .act_hid = BNXT_ULP_ACT_HID_27ee2,
- .act_pattern_id = 158,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [544] = {
- .act_hid = BNXT_ULP_ACT_HID_1d202,
- .act_pattern_id = 159,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [545] = {
- .act_hid = BNXT_ULP_ACT_HID_36a82,
- .act_pattern_id = 160,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [546] = {
- .act_hid = BNXT_ULP_ACT_HID_1522,
- .act_pattern_id = 161,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [547] = {
- .act_hid = BNXT_ULP_ACT_HID_1f6e2,
- .act_pattern_id = 162,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [548] = {
- .act_hid = BNXT_ULP_ACT_HID_38f62,
- .act_pattern_id = 163,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [549] = {
- .act_hid = BNXT_ULP_ACT_HID_27f62,
- .act_pattern_id = 164,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [550] = {
- .act_hid = BNXT_ULP_ACT_HID_1d282,
- .act_pattern_id = 165,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [551] = {
- .act_hid = BNXT_ULP_ACT_HID_36b02,
- .act_pattern_id = 166,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [552] = {
- .act_hid = BNXT_ULP_ACT_HID_15a2,
- .act_pattern_id = 167,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [553] = {
- .act_hid = BNXT_ULP_ACT_HID_3cee2,
- .act_pattern_id = 168,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [554] = {
- .act_hid = BNXT_ULP_ACT_HID_2bee2,
- .act_pattern_id = 169,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [555] = {
- .act_hid = BNXT_ULP_ACT_HID_21202,
- .act_pattern_id = 170,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [556] = {
- .act_hid = BNXT_ULP_ACT_HID_23662,
- .act_pattern_id = 171,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [557] = {
- .act_hid = BNXT_ULP_ACT_HID_3aa82,
- .act_pattern_id = 172,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [558] = {
- .act_hid = BNXT_ULP_ACT_HID_5522,
- .act_pattern_id = 173,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [559] = {
- .act_hid = BNXT_ULP_ACT_HID_236e2,
- .act_pattern_id = 174,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [560] = {
- .act_hid = BNXT_ULP_ACT_HID_3cf62,
- .act_pattern_id = 175,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [561] = {
- .act_hid = BNXT_ULP_ACT_HID_2bf62,
- .act_pattern_id = 176,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [562] = {
- .act_hid = BNXT_ULP_ACT_HID_21282,
- .act_pattern_id = 177,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [563] = {
- .act_hid = BNXT_ULP_ACT_HID_3ab02,
- .act_pattern_id = 178,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [564] = {
- .act_hid = BNXT_ULP_ACT_HID_55a2,
- .act_pattern_id = 179,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [565] = {
- .act_hid = BNXT_ULP_ACT_HID_27662,
- .act_pattern_id = 180,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [566] = {
- .act_hid = BNXT_ULP_ACT_HID_3102,
- .act_pattern_id = 181,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [567] = {
- .act_hid = BNXT_ULP_ACT_HID_2fee2,
- .act_pattern_id = 182,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [568] = {
- .act_hid = BNXT_ULP_ACT_HID_25202,
- .act_pattern_id = 183,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [569] = {
- .act_hid = BNXT_ULP_ACT_HID_0ca2,
- .act_pattern_id = 184,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [570] = {
- .act_hid = BNXT_ULP_ACT_HID_9522,
- .act_pattern_id = 185,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [571] = {
- .act_hid = BNXT_ULP_ACT_HID_276e2,
- .act_pattern_id = 186,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [572] = {
- .act_hid = BNXT_ULP_ACT_HID_3182,
- .act_pattern_id = 187,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [573] = {
- .act_hid = BNXT_ULP_ACT_HID_2ff62,
- .act_pattern_id = 188,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [574] = {
- .act_hid = BNXT_ULP_ACT_HID_25282,
- .act_pattern_id = 189,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [575] = {
- .act_hid = BNXT_ULP_ACT_HID_0d22,
- .act_pattern_id = 190,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [576] = {
- .act_hid = BNXT_ULP_ACT_HID_95a2,
- .act_pattern_id = 191,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [577] = {
- .act_hid = BNXT_ULP_ACT_HID_2b662,
- .act_pattern_id = 192,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [578] = {
- .act_hid = BNXT_ULP_ACT_HID_7102,
- .act_pattern_id = 193,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [579] = {
- .act_hid = BNXT_ULP_ACT_HID_33ee2,
- .act_pattern_id = 194,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [580] = {
- .act_hid = BNXT_ULP_ACT_HID_29202,
- .act_pattern_id = 195,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [581] = {
- .act_hid = BNXT_ULP_ACT_HID_4ca2,
- .act_pattern_id = 196,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [582] = {
- .act_hid = BNXT_ULP_ACT_HID_d522,
- .act_pattern_id = 197,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [583] = {
- .act_hid = BNXT_ULP_ACT_HID_2b6e2,
- .act_pattern_id = 198,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [584] = {
- .act_hid = BNXT_ULP_ACT_HID_7182,
- .act_pattern_id = 199,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [585] = {
- .act_hid = BNXT_ULP_ACT_HID_33f62,
- .act_pattern_id = 200,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [586] = {
- .act_hid = BNXT_ULP_ACT_HID_29282,
- .act_pattern_id = 201,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [587] = {
- .act_hid = BNXT_ULP_ACT_HID_4d22,
- .act_pattern_id = 202,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [588] = {
- .act_hid = BNXT_ULP_ACT_HID_d5a2,
- .act_pattern_id = 203,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [589] = {
- .act_hid = BNXT_ULP_ACT_HID_3e4e0,
- .act_pattern_id = 204,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [590] = {
- .act_hid = BNXT_ULP_ACT_HID_2700,
- .act_pattern_id = 205,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [591] = {
- .act_hid = BNXT_ULP_ACT_HID_6700,
- .act_pattern_id = 206,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [592] = {
- .act_hid = BNXT_ULP_ACT_HID_3e560,
- .act_pattern_id = 207,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [593] = {
- .act_hid = BNXT_ULP_ACT_HID_2780,
- .act_pattern_id = 208,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [594] = {
- .act_hid = BNXT_ULP_ACT_HID_6780,
- .act_pattern_id = 209,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [595] = {
- .act_hid = BNXT_ULP_ACT_HID_2f80,
- .act_pattern_id = 210,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [596] = {
- .act_hid = BNXT_ULP_ACT_HID_1e800,
- .act_pattern_id = 211,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [597] = {
- .act_hid = BNXT_ULP_ACT_HID_b800,
- .act_pattern_id = 212,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [598] = {
- .act_hid = BNXT_ULP_ACT_HID_2b20,
- .act_pattern_id = 213,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [599] = {
- .act_hid = BNXT_ULP_ACT_HID_1a3a0,
- .act_pattern_id = 214,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [600] = {
- .act_hid = BNXT_ULP_ACT_HID_22c20,
- .act_pattern_id = 215,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [601] = {
- .act_hid = BNXT_ULP_ACT_HID_6f80,
- .act_pattern_id = 216,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [602] = {
- .act_hid = BNXT_ULP_ACT_HID_22800,
- .act_pattern_id = 217,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [603] = {
- .act_hid = BNXT_ULP_ACT_HID_f800,
- .act_pattern_id = 218,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [604] = {
- .act_hid = BNXT_ULP_ACT_HID_6b20,
- .act_pattern_id = 219,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [605] = {
- .act_hid = BNXT_ULP_ACT_HID_1e3a0,
- .act_pattern_id = 220,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [606] = {
- .act_hid = BNXT_ULP_ACT_HID_26c20,
- .act_pattern_id = 221,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [607] = {
- .act_hid = BNXT_ULP_ACT_HID_af80,
- .act_pattern_id = 222,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [608] = {
- .act_hid = BNXT_ULP_ACT_HID_26800,
- .act_pattern_id = 223,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [609] = {
- .act_hid = BNXT_ULP_ACT_HID_13800,
- .act_pattern_id = 224,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [610] = {
- .act_hid = BNXT_ULP_ACT_HID_ab20,
- .act_pattern_id = 225,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [611] = {
- .act_hid = BNXT_ULP_ACT_HID_223a0,
- .act_pattern_id = 226,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [612] = {
- .act_hid = BNXT_ULP_ACT_HID_2ac20,
- .act_pattern_id = 227,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [613] = {
- .act_hid = BNXT_ULP_ACT_HID_ef80,
- .act_pattern_id = 228,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [614] = {
- .act_hid = BNXT_ULP_ACT_HID_2a800,
- .act_pattern_id = 229,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [615] = {
- .act_hid = BNXT_ULP_ACT_HID_17800,
- .act_pattern_id = 230,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [616] = {
- .act_hid = BNXT_ULP_ACT_HID_eb20,
- .act_pattern_id = 231,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [617] = {
- .act_hid = BNXT_ULP_ACT_HID_263a0,
- .act_pattern_id = 232,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [618] = {
- .act_hid = BNXT_ULP_ACT_HID_2ec20,
- .act_pattern_id = 233,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [619] = {
- .act_hid = BNXT_ULP_ACT_HID_3000,
- .act_pattern_id = 234,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [620] = {
- .act_hid = BNXT_ULP_ACT_HID_1e880,
- .act_pattern_id = 235,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [621] = {
- .act_hid = BNXT_ULP_ACT_HID_b880,
- .act_pattern_id = 236,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [622] = {
- .act_hid = BNXT_ULP_ACT_HID_2ba0,
- .act_pattern_id = 237,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [623] = {
- .act_hid = BNXT_ULP_ACT_HID_1a420,
- .act_pattern_id = 238,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [624] = {
- .act_hid = BNXT_ULP_ACT_HID_22ca0,
- .act_pattern_id = 239,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [625] = {
- .act_hid = BNXT_ULP_ACT_HID_7000,
- .act_pattern_id = 240,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [626] = {
- .act_hid = BNXT_ULP_ACT_HID_22880,
- .act_pattern_id = 241,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [627] = {
- .act_hid = BNXT_ULP_ACT_HID_f880,
- .act_pattern_id = 242,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [628] = {
- .act_hid = BNXT_ULP_ACT_HID_6ba0,
- .act_pattern_id = 243,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [629] = {
- .act_hid = BNXT_ULP_ACT_HID_1e420,
- .act_pattern_id = 244,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [630] = {
- .act_hid = BNXT_ULP_ACT_HID_26ca0,
- .act_pattern_id = 245,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [631] = {
- .act_hid = BNXT_ULP_ACT_HID_b000,
- .act_pattern_id = 246,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [632] = {
- .act_hid = BNXT_ULP_ACT_HID_26880,
- .act_pattern_id = 247,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [633] = {
- .act_hid = BNXT_ULP_ACT_HID_13880,
- .act_pattern_id = 248,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [634] = {
- .act_hid = BNXT_ULP_ACT_HID_aba0,
- .act_pattern_id = 249,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [635] = {
- .act_hid = BNXT_ULP_ACT_HID_22420,
- .act_pattern_id = 250,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [636] = {
- .act_hid = BNXT_ULP_ACT_HID_2aca0,
- .act_pattern_id = 251,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [637] = {
- .act_hid = BNXT_ULP_ACT_HID_f000,
- .act_pattern_id = 252,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [638] = {
- .act_hid = BNXT_ULP_ACT_HID_2a880,
- .act_pattern_id = 253,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [639] = {
- .act_hid = BNXT_ULP_ACT_HID_17880,
- .act_pattern_id = 254,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [640] = {
- .act_hid = BNXT_ULP_ACT_HID_eba0,
- .act_pattern_id = 255,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [641] = {
- .act_hid = BNXT_ULP_ACT_HID_26420,
- .act_pattern_id = 256,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [642] = {
- .act_hid = BNXT_ULP_ACT_HID_2eca0,
- .act_pattern_id = 257,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [643] = {
- .act_hid = BNXT_ULP_ACT_HID_fbc0,
- .act_pattern_id = 258,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [644] = {
- .act_hid = BNXT_ULP_ACT_HID_2b440,
- .act_pattern_id = 259,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [645] = {
- .act_hid = BNXT_ULP_ACT_HID_1a440,
- .act_pattern_id = 260,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [646] = {
- .act_hid = BNXT_ULP_ACT_HID_f760,
- .act_pattern_id = 261,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [647] = {
- .act_hid = BNXT_ULP_ACT_HID_26fe0,
- .act_pattern_id = 262,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [648] = {
- .act_hid = BNXT_ULP_ACT_HID_2f860,
- .act_pattern_id = 263,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [649] = {
- .act_hid = BNXT_ULP_ACT_HID_fc40,
- .act_pattern_id = 264,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [650] = {
- .act_hid = BNXT_ULP_ACT_HID_2b4c0,
- .act_pattern_id = 265,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [651] = {
- .act_hid = BNXT_ULP_ACT_HID_1a4c0,
- .act_pattern_id = 266,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [652] = {
- .act_hid = BNXT_ULP_ACT_HID_f7e0,
- .act_pattern_id = 267,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [653] = {
- .act_hid = BNXT_ULP_ACT_HID_27060,
- .act_pattern_id = 268,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [654] = {
- .act_hid = BNXT_ULP_ACT_HID_2f8e0,
- .act_pattern_id = 269,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [655] = {
- .act_hid = BNXT_ULP_ACT_HID_2f440,
- .act_pattern_id = 270,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [656] = {
- .act_hid = BNXT_ULP_ACT_HID_1e440,
- .act_pattern_id = 271,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [657] = {
- .act_hid = BNXT_ULP_ACT_HID_13760,
- .act_pattern_id = 272,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [658] = {
- .act_hid = BNXT_ULP_ACT_HID_13bc0,
- .act_pattern_id = 273,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [659] = {
- .act_hid = BNXT_ULP_ACT_HID_2afe0,
- .act_pattern_id = 274,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [660] = {
- .act_hid = BNXT_ULP_ACT_HID_33860,
- .act_pattern_id = 275,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [661] = {
- .act_hid = BNXT_ULP_ACT_HID_13c40,
- .act_pattern_id = 276,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [662] = {
- .act_hid = BNXT_ULP_ACT_HID_2f4c0,
- .act_pattern_id = 277,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [663] = {
- .act_hid = BNXT_ULP_ACT_HID_1e4c0,
- .act_pattern_id = 278,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [664] = {
- .act_hid = BNXT_ULP_ACT_HID_137e0,
- .act_pattern_id = 279,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [665] = {
- .act_hid = BNXT_ULP_ACT_HID_2b060,
- .act_pattern_id = 280,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [666] = {
- .act_hid = BNXT_ULP_ACT_HID_338e0,
- .act_pattern_id = 281,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [667] = {
- .act_hid = BNXT_ULP_ACT_HID_17bc0,
- .act_pattern_id = 282,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [668] = {
- .act_hid = BNXT_ULP_ACT_HID_33440,
- .act_pattern_id = 283,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [669] = {
- .act_hid = BNXT_ULP_ACT_HID_22440,
- .act_pattern_id = 284,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [670] = {
- .act_hid = BNXT_ULP_ACT_HID_17760,
- .act_pattern_id = 285,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [671] = {
- .act_hid = BNXT_ULP_ACT_HID_2efe0,
- .act_pattern_id = 286,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [672] = {
- .act_hid = BNXT_ULP_ACT_HID_37860,
- .act_pattern_id = 287,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [673] = {
- .act_hid = BNXT_ULP_ACT_HID_17c40,
- .act_pattern_id = 288,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [674] = {
- .act_hid = BNXT_ULP_ACT_HID_334c0,
- .act_pattern_id = 289,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [675] = {
- .act_hid = BNXT_ULP_ACT_HID_224c0,
- .act_pattern_id = 290,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [676] = {
- .act_hid = BNXT_ULP_ACT_HID_177e0,
- .act_pattern_id = 291,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [677] = {
- .act_hid = BNXT_ULP_ACT_HID_2f060,
- .act_pattern_id = 292,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [678] = {
- .act_hid = BNXT_ULP_ACT_HID_378e0,
- .act_pattern_id = 293,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [679] = {
- .act_hid = BNXT_ULP_ACT_HID_1bbc0,
- .act_pattern_id = 294,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [680] = {
- .act_hid = BNXT_ULP_ACT_HID_37440,
- .act_pattern_id = 295,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [681] = {
- .act_hid = BNXT_ULP_ACT_HID_26440,
- .act_pattern_id = 296,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [682] = {
- .act_hid = BNXT_ULP_ACT_HID_1b760,
- .act_pattern_id = 297,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [683] = {
- .act_hid = BNXT_ULP_ACT_HID_32fe0,
- .act_pattern_id = 298,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [684] = {
- .act_hid = BNXT_ULP_ACT_HID_3b860,
- .act_pattern_id = 299,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [685] = {
- .act_hid = BNXT_ULP_ACT_HID_1bc40,
- .act_pattern_id = 300,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [686] = {
- .act_hid = BNXT_ULP_ACT_HID_374c0,
- .act_pattern_id = 301,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
+ BNXT_ULP_ACT_BIT_GENEVE_DECAP |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [687] = {
- .act_hid = BNXT_ULP_ACT_HID_264c0,
- .act_pattern_id = 302,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_METER |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [688] = {
- .act_hid = BNXT_ULP_ACT_HID_1b7e0,
- .act_pattern_id = 303,
- .app_sig = 0,
- .act_sig = { .bits =
BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 1
},
- [689] = {
- .act_hid = BNXT_ULP_ACT_HID_33060,
- .act_pattern_id = 304,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ [2] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED |
+ BNXT_ULP_ACT_BIT_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 2
+ },
+ [3] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_DELETE |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 2
},
- [690] = {
- .act_hid = BNXT_ULP_ACT_HID_3b8e0,
- .act_pattern_id = 305,
- .app_sig = 0,
- .act_sig = { .bits =
+ [4] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV6_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV6_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 7
- },
- [691] = {
- .act_hid = BNXT_ULP_ACT_HID_18e80,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [692] = {
- .act_hid = BNXT_ULP_ACT_HID_18f00,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [693] = {
- .act_hid = BNXT_ULP_ACT_HID_1ce80,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [694] = {
- .act_hid = BNXT_ULP_ACT_HID_1cf00,
- .act_pattern_id = 3,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [695] = {
- .act_hid = BNXT_ULP_ACT_HID_20e80,
- .act_pattern_id = 4,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [696] = {
- .act_hid = BNXT_ULP_ACT_HID_20f00,
- .act_pattern_id = 5,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [697] = {
- .act_hid = BNXT_ULP_ACT_HID_24e80,
- .act_pattern_id = 6,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [698] = {
- .act_hid = BNXT_ULP_ACT_HID_24f00,
- .act_pattern_id = 7,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [699] = {
- .act_hid = BNXT_ULP_ACT_HID_325c2,
- .act_pattern_id = 8,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
- [700] = {
- .act_hid = BNXT_ULP_ACT_HID_32642,
- .act_pattern_id = 9,
- .app_sig = 0,
- .act_sig = { .bits =
+ [5] = {
+ .act_bitmap = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_ACT_BIT_RSS |
+ BNXT_ULP_ACT_BIT_QUEUE |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 4
},
- [701] = {
- .act_hid = BNXT_ULP_ACT_HID_365c2,
- .act_pattern_id = 10,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
+ [6] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_METER_PROFILE |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
},
- [702] = {
- .act_hid = BNXT_ULP_ACT_HID_36642,
- .act_pattern_id = 11,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
+ [7] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_METER |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
},
- [703] = {
- .act_hid = BNXT_ULP_ACT_HID_3a5c2,
- .act_pattern_id = 12,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
+ [8] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_DELETE |
+ BNXT_ULP_ACT_BIT_METER_PROFILE |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
},
- [704] = {
- .act_hid = BNXT_ULP_ACT_HID_3a642,
- .act_pattern_id = 13,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
+ [9] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_DELETE |
+ BNXT_ULP_ACT_BIT_SHARED_METER |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
},
- [705] = {
- .act_hid = BNXT_ULP_ACT_HID_07e2,
- .act_pattern_id = 14,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
+ [10] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_UPDATE |
+ BNXT_ULP_ACT_BIT_SHARED_METER |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
},
- [706] = {
- .act_hid = BNXT_ULP_ACT_HID_0862,
- .act_pattern_id = 15,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ [11] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [707] = {
- .act_hid = BNXT_ULP_ACT_HID_22b20,
- .act_pattern_id = 16,
- .app_sig = 0,
- .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
+ .act_tid = 6
},
- [708] = {
- .act_hid = BNXT_ULP_ACT_HID_22ba0,
- .act_pattern_id = 17,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ [12] = {
+ .act_bitmap = { .bits =
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [709] = {
- .act_hid = BNXT_ULP_ACT_HID_26b20,
- .act_pattern_id = 18,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [710] = {
- .act_hid = BNXT_ULP_ACT_HID_26ba0,
- .act_pattern_id = 19,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [711] = {
- .act_hid = BNXT_ULP_ACT_HID_2ab20,
- .act_pattern_id = 20,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [712] = {
- .act_hid = BNXT_ULP_ACT_HID_2aba0,
- .act_pattern_id = 21,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
- },
- [713] = {
- .act_hid = BNXT_ULP_ACT_HID_2eb20,
- .act_pattern_id = 22,
- .app_sig = 0,
- .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV6_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV6_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 8
+ .act_tid = 7
},
- [714] = {
- .act_hid = BNXT_ULP_ACT_HID_2eba0,
- .act_pattern_id = 23,
- .app_sig = 0,
- .act_sig = { .bits =
+ [13] = {
+ .act_bitmap = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_ACT_BIT_GENEVE_ENCAP |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [715] = {
- .act_hid = BNXT_ULP_ACT_HID_199e0,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_VF_TO_VF |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 9
- },
- [716] = {
- .act_hid = BNXT_ULP_ACT_HID_19960,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_VF_TO_VF |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 9
- },
- [717] = {
- .act_hid = BNXT_ULP_ACT_HID_33122,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_VF_TO_VF |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 9
- },
- [718] = {
- .act_hid = BNXT_ULP_ACT_HID_331a2,
- .act_pattern_id = 3,
- .app_sig = 0,
- .act_sig = { .bits =
+ [14] = {
+ .act_bitmap = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_VF_TO_VF |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 9
- },
- [719] = {
- .act_hid = BNXT_ULP_ACT_HID_23580,
- .act_pattern_id = 4,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
- BNXT_ULP_ACT_BIT_VF_TO_VF |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 9
- },
- [720] = {
- .act_hid = BNXT_ULP_ACT_HID_23700,
- .act_pattern_id = 5,
- .app_sig = 0,
- .act_sig = { .bits =
BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_VF_TO_VF |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 9
},
- [721] = {
- .act_hid = BNXT_ULP_ACT_HID_db61,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED |
- BNXT_ULP_ACT_BIT_SAMPLE |
- BNXT_ULP_ACT_BIT_VF_TO_VF |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 10
- },
- [722] = {
- .act_hid = BNXT_ULP_ACT_HID_dbe1,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
+ [15] = {
+ .act_bitmap = { .bits =
BNXT_ULP_ACT_BIT_SHARED |
BNXT_ULP_ACT_BIT_SAMPLE |
BNXT_ULP_ACT_BIT_VF_TO_VF |
@@ -9534,11 +160,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 10
},
- [723] = {
- .act_hid = BNXT_ULP_ACT_HID_320ca,
- .act_pattern_id = 2,
- .app_sig = 0,
- .act_sig = { .bits =
+ [16] = {
+ .act_bitmap = { .bits =
BNXT_ULP_ACT_BIT_DELETE |
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
@@ -8,42734 +8,7186 @@
#include "ulp_template_struct.h"
#include "ulp_template_db_tbl.h"
-/* Define the template structures */
+/* Define the template match patterns */
/*
- * Classification signature table:
- * maps hash id to ulp_class_match_list[] index
+ * List of protocol matches
*/
-uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
- [BNXT_ULP_CLASS_HID_00b8] = 1,
- [BNXT_ULP_CLASS_HID_0cc2] = 2,
- [BNXT_ULP_CLASS_HID_10e4] = 3,
- [BNXT_ULP_CLASS_HID_1d0e] = 4,
- [BNXT_ULP_CLASS_HID_0286] = 5,
- [BNXT_ULP_CLASS_HID_0e98] = 6,
- [BNXT_ULP_CLASS_HID_1666] = 7,
- [BNXT_ULP_CLASS_HID_02de] = 8,
- [BNXT_ULP_CLASS_HID_81d25] = 9,
- [BNXT_ULP_CLASS_HID_809ad] = 10,
- [BNXT_ULP_CLASS_HID_80ae3] = 11,
- [BNXT_ULP_CLASS_HID_8170d] = 12,
- [BNXT_ULP_CLASS_HID_80773] = 13,
- [BNXT_ULP_CLASS_HID_8139d] = 14,
- [BNXT_ULP_CLASS_HID_814d3] = 15,
- [BNXT_ULP_CLASS_HID_8015b] = 16,
- [BNXT_ULP_CLASS_HID_21977] = 17,
- [BNXT_ULP_CLASS_HID_205ef] = 18,
- [BNXT_ULP_CLASS_HID_20735] = 19,
- [BNXT_ULP_CLASS_HID_2134f] = 20,
- [BNXT_ULP_CLASS_HID_61beb] = 21,
- [BNXT_ULP_CLASS_HID_60863] = 22,
- [BNXT_ULP_CLASS_HID_609a9] = 23,
- [BNXT_ULP_CLASS_HID_615c3] = 24,
- [BNXT_ULP_CLASS_HID_00a8] = 25,
- [BNXT_ULP_CLASS_HID_0cd2] = 26,
- [BNXT_ULP_CLASS_HID_10f4] = 27,
- [BNXT_ULP_CLASS_HID_1d1e] = 28,
- [BNXT_ULP_CLASS_HID_1488] = 29,
- [BNXT_ULP_CLASS_HID_0110] = 30,
- [BNXT_ULP_CLASS_HID_0532] = 31,
- [BNXT_ULP_CLASS_HID_115c] = 32,
- [BNXT_ULP_CLASS_HID_0ab8] = 33,
- [BNXT_ULP_CLASS_HID_16a2] = 34,
- [BNXT_ULP_CLASS_HID_1ac4] = 35,
- [BNXT_ULP_CLASS_HID_074c] = 36,
- [BNXT_ULP_CLASS_HID_1e98] = 37,
- [BNXT_ULP_CLASS_HID_0ae0] = 38,
- [BNXT_ULP_CLASS_HID_0f02] = 39,
- [BNXT_ULP_CLASS_HID_1b2c] = 40,
- [BNXT_ULP_CLASS_HID_0296] = 41,
- [BNXT_ULP_CLASS_HID_0e88] = 42,
- [BNXT_ULP_CLASS_HID_1676] = 43,
- [BNXT_ULP_CLASS_HID_02ce] = 44,
- [BNXT_ULP_CLASS_HID_8076e] = 45,
- [BNXT_ULP_CLASS_HID_81380] = 46,
- [BNXT_ULP_CLASS_HID_81b4e] = 47,
- [BNXT_ULP_CLASS_HID_807c6] = 48,
- [BNXT_ULP_CLASS_HID_404ea] = 49,
- [BNXT_ULP_CLASS_HID_4110c] = 50,
- [BNXT_ULP_CLASS_HID_418ca] = 51,
- [BNXT_ULP_CLASS_HID_40542] = 52,
- [BNXT_ULP_CLASS_HID_c09e2] = 53,
- [BNXT_ULP_CLASS_HID_c1604] = 54,
- [BNXT_ULP_CLASS_HID_c1dc2] = 55,
- [BNXT_ULP_CLASS_HID_c0a5a] = 56,
- [BNXT_ULP_CLASS_HID_0098] = 57,
- [BNXT_ULP_CLASS_HID_0ce2] = 58,
- [BNXT_ULP_CLASS_HID_10c4] = 59,
- [BNXT_ULP_CLASS_HID_1d2e] = 60,
- [BNXT_ULP_CLASS_HID_14b8] = 61,
- [BNXT_ULP_CLASS_HID_0120] = 62,
- [BNXT_ULP_CLASS_HID_0502] = 63,
- [BNXT_ULP_CLASS_HID_116c] = 64,
- [BNXT_ULP_CLASS_HID_0a88] = 65,
- [BNXT_ULP_CLASS_HID_1692] = 66,
- [BNXT_ULP_CLASS_HID_1af4] = 67,
- [BNXT_ULP_CLASS_HID_077c] = 68,
- [BNXT_ULP_CLASS_HID_1ea8] = 69,
- [BNXT_ULP_CLASS_HID_0ad0] = 70,
- [BNXT_ULP_CLASS_HID_0f32] = 71,
- [BNXT_ULP_CLASS_HID_1b1c] = 72,
- [BNXT_ULP_CLASS_HID_02a6] = 73,
- [BNXT_ULP_CLASS_HID_0eb8] = 74,
- [BNXT_ULP_CLASS_HID_1646] = 75,
- [BNXT_ULP_CLASS_HID_02fe] = 76,
- [BNXT_ULP_CLASS_HID_8075e] = 77,
- [BNXT_ULP_CLASS_HID_813b0] = 78,
- [BNXT_ULP_CLASS_HID_81b7e] = 79,
- [BNXT_ULP_CLASS_HID_807f6] = 80,
- [BNXT_ULP_CLASS_HID_404da] = 81,
- [BNXT_ULP_CLASS_HID_4113c] = 82,
- [BNXT_ULP_CLASS_HID_418fa] = 83,
- [BNXT_ULP_CLASS_HID_40572] = 84,
- [BNXT_ULP_CLASS_HID_c09d2] = 85,
- [BNXT_ULP_CLASS_HID_c1634] = 86,
- [BNXT_ULP_CLASS_HID_c1df2] = 87,
- [BNXT_ULP_CLASS_HID_c0a6a] = 88,
- [BNXT_ULP_CLASS_HID_81d35] = 89,
- [BNXT_ULP_CLASS_HID_809bd] = 90,
- [BNXT_ULP_CLASS_HID_80af3] = 91,
- [BNXT_ULP_CLASS_HID_8171d] = 92,
- [BNXT_ULP_CLASS_HID_80763] = 93,
- [BNXT_ULP_CLASS_HID_8138d] = 94,
- [BNXT_ULP_CLASS_HID_814c3] = 95,
- [BNXT_ULP_CLASS_HID_8014b] = 96,
- [BNXT_ULP_CLASS_HID_c001f] = 97,
- [BNXT_ULP_CLASS_HID_c0c39] = 98,
- [BNXT_ULP_CLASS_HID_c0d7f] = 99,
- [BNXT_ULP_CLASS_HID_c1999] = 100,
- [BNXT_ULP_CLASS_HID_c09ef] = 101,
- [BNXT_ULP_CLASS_HID_c1609] = 102,
- [BNXT_ULP_CLASS_HID_c174f] = 103,
- [BNXT_ULP_CLASS_HID_c03d7] = 104,
- [BNXT_ULP_CLASS_HID_a1e73] = 105,
- [BNXT_ULP_CLASS_HID_a0afb] = 106,
- [BNXT_ULP_CLASS_HID_a0c31] = 107,
- [BNXT_ULP_CLASS_HID_a185b] = 108,
- [BNXT_ULP_CLASS_HID_a08a1] = 109,
- [BNXT_ULP_CLASS_HID_a14cb] = 110,
- [BNXT_ULP_CLASS_HID_a1601] = 111,
- [BNXT_ULP_CLASS_HID_a0289] = 112,
- [BNXT_ULP_CLASS_HID_e015d] = 113,
- [BNXT_ULP_CLASS_HID_e0d47] = 114,
- [BNXT_ULP_CLASS_HID_e0ebd] = 115,
- [BNXT_ULP_CLASS_HID_e1aa7] = 116,
- [BNXT_ULP_CLASS_HID_e0b2d] = 117,
- [BNXT_ULP_CLASS_HID_e1757] = 118,
- [BNXT_ULP_CLASS_HID_e188d] = 119,
- [BNXT_ULP_CLASS_HID_e0515] = 120,
- [BNXT_ULP_CLASS_HID_21967] = 121,
- [BNXT_ULP_CLASS_HID_205ff] = 122,
- [BNXT_ULP_CLASS_HID_20725] = 123,
- [BNXT_ULP_CLASS_HID_2135f] = 124,
- [BNXT_ULP_CLASS_HID_61bfb] = 125,
- [BNXT_ULP_CLASS_HID_60873] = 126,
- [BNXT_ULP_CLASS_HID_609b9] = 127,
- [BNXT_ULP_CLASS_HID_615d3] = 128,
- [BNXT_ULP_CLASS_HID_30a55] = 129,
- [BNXT_ULP_CLASS_HID_3164f] = 130,
- [BNXT_ULP_CLASS_HID_317b5] = 131,
- [BNXT_ULP_CLASS_HID_3040d] = 132,
- [BNXT_ULP_CLASS_HID_70ca9] = 133,
- [BNXT_ULP_CLASS_HID_718c3] = 134,
- [BNXT_ULP_CLASS_HID_71a09] = 135,
- [BNXT_ULP_CLASS_HID_70681] = 136,
- [BNXT_ULP_CLASS_HID_2821d] = 137,
- [BNXT_ULP_CLASS_HID_28e37] = 138,
- [BNXT_ULP_CLASS_HID_28f7d] = 139,
- [BNXT_ULP_CLASS_HID_29b97] = 140,
- [BNXT_ULP_CLASS_HID_68491] = 141,
- [BNXT_ULP_CLASS_HID_6908b] = 142,
- [BNXT_ULP_CLASS_HID_691f1] = 143,
- [BNXT_ULP_CLASS_HID_69deb] = 144,
- [BNXT_ULP_CLASS_HID_3926d] = 145,
- [BNXT_ULP_CLASS_HID_39e87] = 146,
- [BNXT_ULP_CLASS_HID_38023] = 147,
- [BNXT_ULP_CLASS_HID_38c45] = 148,
- [BNXT_ULP_CLASS_HID_794e1] = 149,
- [BNXT_ULP_CLASS_HID_78179] = 150,
- [BNXT_ULP_CLASS_HID_782a7] = 151,
- [BNXT_ULP_CLASS_HID_78ed9] = 152,
- [BNXT_ULP_CLASS_HID_81d05] = 153,
- [BNXT_ULP_CLASS_HID_8098d] = 154,
- [BNXT_ULP_CLASS_HID_80ac3] = 155,
- [BNXT_ULP_CLASS_HID_8172d] = 156,
- [BNXT_ULP_CLASS_HID_80753] = 157,
- [BNXT_ULP_CLASS_HID_813bd] = 158,
- [BNXT_ULP_CLASS_HID_814f3] = 159,
- [BNXT_ULP_CLASS_HID_8017b] = 160,
- [BNXT_ULP_CLASS_HID_c002f] = 161,
- [BNXT_ULP_CLASS_HID_c0c09] = 162,
- [BNXT_ULP_CLASS_HID_c0d4f] = 163,
- [BNXT_ULP_CLASS_HID_c19a9] = 164,
- [BNXT_ULP_CLASS_HID_c09df] = 165,
- [BNXT_ULP_CLASS_HID_c1639] = 166,
- [BNXT_ULP_CLASS_HID_c177f] = 167,
- [BNXT_ULP_CLASS_HID_c03e7] = 168,
- [BNXT_ULP_CLASS_HID_a1e43] = 169,
- [BNXT_ULP_CLASS_HID_a0acb] = 170,
- [BNXT_ULP_CLASS_HID_a0c01] = 171,
- [BNXT_ULP_CLASS_HID_a186b] = 172,
- [BNXT_ULP_CLASS_HID_a0891] = 173,
- [BNXT_ULP_CLASS_HID_a14fb] = 174,
- [BNXT_ULP_CLASS_HID_a1631] = 175,
- [BNXT_ULP_CLASS_HID_a02b9] = 176,
- [BNXT_ULP_CLASS_HID_e016d] = 177,
- [BNXT_ULP_CLASS_HID_e0d77] = 178,
- [BNXT_ULP_CLASS_HID_e0e8d] = 179,
- [BNXT_ULP_CLASS_HID_e1a97] = 180,
- [BNXT_ULP_CLASS_HID_e0b1d] = 181,
- [BNXT_ULP_CLASS_HID_e1767] = 182,
- [BNXT_ULP_CLASS_HID_e18bd] = 183,
- [BNXT_ULP_CLASS_HID_e0525] = 184,
- [BNXT_ULP_CLASS_HID_21957] = 185,
- [BNXT_ULP_CLASS_HID_205cf] = 186,
- [BNXT_ULP_CLASS_HID_20715] = 187,
- [BNXT_ULP_CLASS_HID_2136f] = 188,
- [BNXT_ULP_CLASS_HID_61bcb] = 189,
- [BNXT_ULP_CLASS_HID_60843] = 190,
- [BNXT_ULP_CLASS_HID_60989] = 191,
- [BNXT_ULP_CLASS_HID_615e3] = 192,
- [BNXT_ULP_CLASS_HID_30a65] = 193,
- [BNXT_ULP_CLASS_HID_3167f] = 194,
- [BNXT_ULP_CLASS_HID_31785] = 195,
- [BNXT_ULP_CLASS_HID_3043d] = 196,
- [BNXT_ULP_CLASS_HID_70c99] = 197,
- [BNXT_ULP_CLASS_HID_718f3] = 198,
- [BNXT_ULP_CLASS_HID_71a39] = 199,
- [BNXT_ULP_CLASS_HID_706b1] = 200,
- [BNXT_ULP_CLASS_HID_2822d] = 201,
- [BNXT_ULP_CLASS_HID_28e07] = 202,
- [BNXT_ULP_CLASS_HID_28f4d] = 203,
- [BNXT_ULP_CLASS_HID_29ba7] = 204,
- [BNXT_ULP_CLASS_HID_684a1] = 205,
- [BNXT_ULP_CLASS_HID_690bb] = 206,
- [BNXT_ULP_CLASS_HID_691c1] = 207,
- [BNXT_ULP_CLASS_HID_69ddb] = 208,
- [BNXT_ULP_CLASS_HID_3925d] = 209,
- [BNXT_ULP_CLASS_HID_39eb7] = 210,
- [BNXT_ULP_CLASS_HID_38013] = 211,
- [BNXT_ULP_CLASS_HID_38c75] = 212,
- [BNXT_ULP_CLASS_HID_794d1] = 213,
- [BNXT_ULP_CLASS_HID_78149] = 214,
- [BNXT_ULP_CLASS_HID_78297] = 215,
- [BNXT_ULP_CLASS_HID_78ee9] = 216,
- [BNXT_ULP_CLASS_HID_0816] = 217,
- [BNXT_ULP_CLASS_HID_1852] = 218,
- [BNXT_ULP_CLASS_HID_09f4] = 219,
- [BNXT_ULP_CLASS_HID_1dd4] = 220,
- [BNXT_ULP_CLASS_HID_804f1] = 221,
- [BNXT_ULP_CLASS_HID_81251] = 222,
- [BNXT_ULP_CLASS_HID_80ee1] = 223,
- [BNXT_ULP_CLASS_HID_81c41] = 224,
- [BNXT_ULP_CLASS_HID_2013b] = 225,
- [BNXT_ULP_CLASS_HID_20e9b] = 226,
- [BNXT_ULP_CLASS_HID_603bf] = 227,
- [BNXT_ULP_CLASS_HID_6111f] = 228,
- [BNXT_ULP_CLASS_HID_0806] = 229,
- [BNXT_ULP_CLASS_HID_1842] = 230,
- [BNXT_ULP_CLASS_HID_1be6] = 231,
- [BNXT_ULP_CLASS_HID_0c80] = 232,
- [BNXT_ULP_CLASS_HID_1216] = 233,
- [BNXT_ULP_CLASS_HID_02b0] = 234,
- [BNXT_ULP_CLASS_HID_0654] = 235,
- [BNXT_ULP_CLASS_HID_1690] = 236,
- [BNXT_ULP_CLASS_HID_09e4] = 237,
- [BNXT_ULP_CLASS_HID_1dc4] = 238,
- [BNXT_ULP_CLASS_HID_80efc] = 239,
- [BNXT_ULP_CLASS_HID_80332] = 240,
- [BNXT_ULP_CLASS_HID_40c78] = 241,
- [BNXT_ULP_CLASS_HID_400be] = 242,
- [BNXT_ULP_CLASS_HID_c1170] = 243,
- [BNXT_ULP_CLASS_HID_c05b6] = 244,
- [BNXT_ULP_CLASS_HID_0836] = 245,
- [BNXT_ULP_CLASS_HID_1872] = 246,
- [BNXT_ULP_CLASS_HID_1bd6] = 247,
- [BNXT_ULP_CLASS_HID_0cb0] = 248,
- [BNXT_ULP_CLASS_HID_1226] = 249,
- [BNXT_ULP_CLASS_HID_0280] = 250,
- [BNXT_ULP_CLASS_HID_0664] = 251,
- [BNXT_ULP_CLASS_HID_16a0] = 252,
- [BNXT_ULP_CLASS_HID_09d4] = 253,
- [BNXT_ULP_CLASS_HID_1df4] = 254,
- [BNXT_ULP_CLASS_HID_80ecc] = 255,
- [BNXT_ULP_CLASS_HID_80302] = 256,
- [BNXT_ULP_CLASS_HID_40c48] = 257,
- [BNXT_ULP_CLASS_HID_4008e] = 258,
- [BNXT_ULP_CLASS_HID_c1140] = 259,
- [BNXT_ULP_CLASS_HID_c0586] = 260,
- [BNXT_ULP_CLASS_HID_804e1] = 261,
- [BNXT_ULP_CLASS_HID_81241] = 262,
- [BNXT_ULP_CLASS_HID_80ef1] = 263,
- [BNXT_ULP_CLASS_HID_81c51] = 264,
- [BNXT_ULP_CLASS_HID_c076d] = 265,
- [BNXT_ULP_CLASS_HID_c14cd] = 266,
- [BNXT_ULP_CLASS_HID_c117d] = 267,
- [BNXT_ULP_CLASS_HID_c1edd] = 268,
- [BNXT_ULP_CLASS_HID_a062f] = 269,
- [BNXT_ULP_CLASS_HID_a138f] = 270,
- [BNXT_ULP_CLASS_HID_a103f] = 271,
- [BNXT_ULP_CLASS_HID_a1d9f] = 272,
- [BNXT_ULP_CLASS_HID_e08ab] = 273,
- [BNXT_ULP_CLASS_HID_e160b] = 274,
- [BNXT_ULP_CLASS_HID_e12bb] = 275,
- [BNXT_ULP_CLASS_HID_e0079] = 276,
- [BNXT_ULP_CLASS_HID_2012b] = 277,
- [BNXT_ULP_CLASS_HID_20e8b] = 278,
- [BNXT_ULP_CLASS_HID_603af] = 279,
- [BNXT_ULP_CLASS_HID_6110f] = 280,
- [BNXT_ULP_CLASS_HID_311bb] = 281,
- [BNXT_ULP_CLASS_HID_31f1b] = 282,
- [BNXT_ULP_CLASS_HID_7143f] = 283,
- [BNXT_ULP_CLASS_HID_701fd] = 284,
- [BNXT_ULP_CLASS_HID_28963] = 285,
- [BNXT_ULP_CLASS_HID_296c3] = 286,
- [BNXT_ULP_CLASS_HID_68be7] = 287,
- [BNXT_ULP_CLASS_HID_69947] = 288,
- [BNXT_ULP_CLASS_HID_399f3] = 289,
- [BNXT_ULP_CLASS_HID_387b1] = 290,
- [BNXT_ULP_CLASS_HID_79c77] = 291,
- [BNXT_ULP_CLASS_HID_78a35] = 292,
- [BNXT_ULP_CLASS_HID_804d1] = 293,
- [BNXT_ULP_CLASS_HID_81271] = 294,
- [BNXT_ULP_CLASS_HID_80ec1] = 295,
- [BNXT_ULP_CLASS_HID_81c61] = 296,
- [BNXT_ULP_CLASS_HID_c075d] = 297,
- [BNXT_ULP_CLASS_HID_c14fd] = 298,
- [BNXT_ULP_CLASS_HID_c114d] = 299,
- [BNXT_ULP_CLASS_HID_c1eed] = 300,
- [BNXT_ULP_CLASS_HID_a061f] = 301,
- [BNXT_ULP_CLASS_HID_a13bf] = 302,
- [BNXT_ULP_CLASS_HID_a100f] = 303,
- [BNXT_ULP_CLASS_HID_a1daf] = 304,
- [BNXT_ULP_CLASS_HID_e089b] = 305,
- [BNXT_ULP_CLASS_HID_e163b] = 306,
- [BNXT_ULP_CLASS_HID_e128b] = 307,
- [BNXT_ULP_CLASS_HID_e0049] = 308,
- [BNXT_ULP_CLASS_HID_2011b] = 309,
- [BNXT_ULP_CLASS_HID_20ebb] = 310,
- [BNXT_ULP_CLASS_HID_6039f] = 311,
- [BNXT_ULP_CLASS_HID_6113f] = 312,
- [BNXT_ULP_CLASS_HID_3118b] = 313,
- [BNXT_ULP_CLASS_HID_31f2b] = 314,
- [BNXT_ULP_CLASS_HID_7140f] = 315,
- [BNXT_ULP_CLASS_HID_701cd] = 316,
- [BNXT_ULP_CLASS_HID_28953] = 317,
- [BNXT_ULP_CLASS_HID_296f3] = 318,
- [BNXT_ULP_CLASS_HID_68bd7] = 319,
- [BNXT_ULP_CLASS_HID_69977] = 320,
- [BNXT_ULP_CLASS_HID_399c3] = 321,
- [BNXT_ULP_CLASS_HID_38781] = 322,
- [BNXT_ULP_CLASS_HID_79c47] = 323,
- [BNXT_ULP_CLASS_HID_78a05] = 324,
- [BNXT_ULP_CLASS_HID_04a4] = 325,
- [BNXT_ULP_CLASS_HID_04a8] = 326,
- [BNXT_ULP_CLASS_HID_04a5] = 327,
- [BNXT_ULP_CLASS_HID_1205] = 328,
- [BNXT_ULP_CLASS_HID_04a9] = 329,
- [BNXT_ULP_CLASS_HID_1209] = 330,
- [BNXT_ULP_CLASS_HID_04b4] = 331,
- [BNXT_ULP_CLASS_HID_04b8] = 332,
- [BNXT_ULP_CLASS_HID_0484] = 333,
- [BNXT_ULP_CLASS_HID_0488] = 334,
- [BNXT_ULP_CLASS_HID_04b5] = 335,
- [BNXT_ULP_CLASS_HID_1215] = 336,
- [BNXT_ULP_CLASS_HID_04b9] = 337,
- [BNXT_ULP_CLASS_HID_1219] = 338,
- [BNXT_ULP_CLASS_HID_0485] = 339,
- [BNXT_ULP_CLASS_HID_1225] = 340,
- [BNXT_ULP_CLASS_HID_0489] = 341,
- [BNXT_ULP_CLASS_HID_1229] = 342,
- [BNXT_ULP_CLASS_HID_0226] = 343,
- [BNXT_ULP_CLASS_HID_4045a] = 344,
- [BNXT_ULP_CLASS_HID_0daa] = 345,
- [BNXT_ULP_CLASS_HID_11b0] = 346,
- [BNXT_ULP_CLASS_HID_403f8] = 347,
- [BNXT_ULP_CLASS_HID_4161e] = 348,
- [BNXT_ULP_CLASS_HID_40439] = 349,
- [BNXT_ULP_CLASS_HID_41405] = 350,
- [BNXT_ULP_CLASS_HID_51449] = 351,
- [BNXT_ULP_CLASS_HID_50b33] = 352,
- [BNXT_ULP_CLASS_HID_48c01] = 353,
- [BNXT_ULP_CLASS_HID_483eb] = 354,
- [BNXT_ULP_CLASS_HID_5833f] = 355,
- [BNXT_ULP_CLASS_HID_5937b] = 356,
- [BNXT_ULP_CLASS_HID_41875] = 357,
- [BNXT_ULP_CLASS_HID_40f5f] = 358,
- [BNXT_ULP_CLASS_HID_50f23] = 359,
- [BNXT_ULP_CLASS_HID_51f6f] = 360,
- [BNXT_ULP_CLASS_HID_4875b] = 361,
- [BNXT_ULP_CLASS_HID_49727] = 362,
- [BNXT_ULP_CLASS_HID_5976b] = 363,
- [BNXT_ULP_CLASS_HID_58655] = 364,
- [BNXT_ULP_CLASS_HID_4125f] = 365,
- [BNXT_ULP_CLASS_HID_401f9] = 366,
- [BNXT_ULP_CLASS_HID_501cd] = 367,
- [BNXT_ULP_CLASS_HID_51149] = 368,
- [BNXT_ULP_CLASS_HID_49a67] = 369,
- [BNXT_ULP_CLASS_HID_489c1] = 370,
- [BNXT_ULP_CLASS_HID_58955] = 371,
- [BNXT_ULP_CLASS_HID_59951] = 372,
- [BNXT_ULP_CLASS_HID_40569] = 373,
- [BNXT_ULP_CLASS_HID_41575] = 374,
- [BNXT_ULP_CLASS_HID_51579] = 375,
- [BNXT_ULP_CLASS_HID_50463] = 376,
- [BNXT_ULP_CLASS_HID_48d71] = 377,
- [BNXT_ULP_CLASS_HID_49d7d] = 378,
- [BNXT_ULP_CLASS_HID_59d41] = 379,
- [BNXT_ULP_CLASS_HID_58c6b] = 380,
- [BNXT_ULP_CLASS_HID_10255] = 381,
- [BNXT_ULP_CLASS_HID_11675] = 382,
- [BNXT_ULP_CLASS_HID_14649] = 383,
- [BNXT_ULP_CLASS_HID_15a69] = 384,
- [BNXT_ULP_CLASS_HID_1205b] = 385,
- [BNXT_ULP_CLASS_HID_1347b] = 386,
- [BNXT_ULP_CLASS_HID_16bbf] = 387,
- [BNXT_ULP_CLASS_HID_1785f] = 388,
- [BNXT_ULP_CLASS_HID_11551] = 389,
- [BNXT_ULP_CLASS_HID_10897] = 390,
- [BNXT_ULP_CLASS_HID_15955] = 391,
- [BNXT_ULP_CLASS_HID_14c8b] = 392,
- [BNXT_ULP_CLASS_HID_13b47] = 393,
- [BNXT_ULP_CLASS_HID_12e85] = 394,
- [BNXT_ULP_CLASS_HID_17f5b] = 395,
- [BNXT_ULP_CLASS_HID_17299] = 396,
- [BNXT_ULP_CLASS_HID_10fe7] = 397,
- [BNXT_ULP_CLASS_HID_10325] = 398,
- [BNXT_ULP_CLASS_HID_153cb] = 399,
- [BNXT_ULP_CLASS_HID_14709] = 400,
- [BNXT_ULP_CLASS_HID_12dc5] = 401,
- [BNXT_ULP_CLASS_HID_1212b] = 402,
- [BNXT_ULP_CLASS_HID_171c9] = 403,
- [BNXT_ULP_CLASS_HID_1650f] = 404,
- [BNXT_ULP_CLASS_HID_10201] = 405,
- [BNXT_ULP_CLASS_HID_116c1] = 406,
- [BNXT_ULP_CLASS_HID_14605] = 407,
- [BNXT_ULP_CLASS_HID_15a05] = 408,
- [BNXT_ULP_CLASS_HID_12007] = 409,
- [BNXT_ULP_CLASS_HID_13407] = 410,
- [BNXT_ULP_CLASS_HID_1640b] = 411,
- [BNXT_ULP_CLASS_HID_1780b] = 412,
- [BNXT_ULP_CLASS_HID_404b0] = 413,
- [BNXT_ULP_CLASS_HID_4148c] = 414,
- [BNXT_ULP_CLASS_HID_514c0] = 415,
- [BNXT_ULP_CLASS_HID_50bba] = 416,
- [BNXT_ULP_CLASS_HID_48c88] = 417,
- [BNXT_ULP_CLASS_HID_48362] = 418,
- [BNXT_ULP_CLASS_HID_583b6] = 419,
- [BNXT_ULP_CLASS_HID_593f2] = 420,
- [BNXT_ULP_CLASS_HID_41f54] = 421,
- [BNXT_ULP_CLASS_HID_40fce] = 422,
- [BNXT_ULP_CLASS_HID_50e02] = 423,
- [BNXT_ULP_CLASS_HID_51e5e] = 424,
- [BNXT_ULP_CLASS_HID_487ca] = 425,
- [BNXT_ULP_CLASS_HID_49606] = 426,
- [BNXT_ULP_CLASS_HID_5965a] = 427,
- [BNXT_ULP_CLASS_HID_58514] = 428,
- [BNXT_ULP_CLASS_HID_412c2] = 429,
- [BNXT_ULP_CLASS_HID_401ac] = 430,
- [BNXT_ULP_CLASS_HID_501e0] = 431,
- [BNXT_ULP_CLASS_HID_511cc] = 432,
- [BNXT_ULP_CLASS_HID_4990a] = 433,
- [BNXT_ULP_CLASS_HID_489e4] = 434,
- [BNXT_ULP_CLASS_HID_589c8] = 435,
- [BNXT_ULP_CLASS_HID_59804] = 436,
- [BNXT_ULP_CLASS_HID_40404] = 437,
- [BNXT_ULP_CLASS_HID_41440] = 438,
- [BNXT_ULP_CLASS_HID_51484] = 439,
- [BNXT_ULP_CLASS_HID_50b0e] = 440,
- [BNXT_ULP_CLASS_HID_48c4c] = 441,
- [BNXT_ULP_CLASS_HID_48306] = 442,
- [BNXT_ULP_CLASS_HID_5830a] = 443,
- [BNXT_ULP_CLASS_HID_59346] = 444,
- [BNXT_ULP_CLASS_HID_102cc] = 445,
- [BNXT_ULP_CLASS_HID_116ec] = 446,
- [BNXT_ULP_CLASS_HID_146d0] = 447,
- [BNXT_ULP_CLASS_HID_15af0] = 448,
- [BNXT_ULP_CLASS_HID_120c2] = 449,
- [BNXT_ULP_CLASS_HID_134e2] = 450,
- [BNXT_ULP_CLASS_HID_16b26] = 451,
- [BNXT_ULP_CLASS_HID_178c6] = 452,
- [BNXT_ULP_CLASS_HID_115c6] = 453,
- [BNXT_ULP_CLASS_HID_10804] = 454,
- [BNXT_ULP_CLASS_HID_15822] = 455,
- [BNXT_ULP_CLASS_HID_14c60] = 456,
- [BNXT_ULP_CLASS_HID_13bd4] = 457,
- [BNXT_ULP_CLASS_HID_12e12] = 458,
- [BNXT_ULP_CLASS_HID_17e30] = 459,
- [BNXT_ULP_CLASS_HID_17276] = 460,
- [BNXT_ULP_CLASS_HID_11f1a] = 461,
- [BNXT_ULP_CLASS_HID_11358] = 462,
- [BNXT_ULP_CLASS_HID_14398] = 463,
- [BNXT_ULP_CLASS_HID_157b8] = 464,
- [BNXT_ULP_CLASS_HID_13d68] = 465,
- [BNXT_ULP_CLASS_HID_131aa] = 466,
- [BNXT_ULP_CLASS_HID_16192] = 467,
- [BNXT_ULP_CLASS_HID_175b2] = 468,
- [BNXT_ULP_CLASS_HID_112b2] = 469,
- [BNXT_ULP_CLASS_HID_106f0] = 470,
- [BNXT_ULP_CLASS_HID_15692] = 471,
- [BNXT_ULP_CLASS_HID_14ad0] = 472,
- [BNXT_ULP_CLASS_HID_13080] = 473,
- [BNXT_ULP_CLASS_HID_124c2] = 474,
- [BNXT_ULP_CLASS_HID_174e0] = 475,
- [BNXT_ULP_CLASS_HID_16f22] = 476,
- [BNXT_ULP_CLASS_HID_4025b] = 477,
- [BNXT_ULP_CLASS_HID_41267] = 478,
- [BNXT_ULP_CLASS_HID_5122b] = 479,
- [BNXT_ULP_CLASS_HID_50d51] = 480,
- [BNXT_ULP_CLASS_HID_48a63] = 481,
- [BNXT_ULP_CLASS_HID_48589] = 482,
- [BNXT_ULP_CLASS_HID_5855d] = 483,
- [BNXT_ULP_CLASS_HID_59519] = 484,
- [BNXT_ULP_CLASS_HID_41e17] = 485,
- [BNXT_ULP_CLASS_HID_4093d] = 486,
- [BNXT_ULP_CLASS_HID_50941] = 487,
- [BNXT_ULP_CLASS_HID_5190d] = 488,
- [BNXT_ULP_CLASS_HID_48139] = 489,
- [BNXT_ULP_CLASS_HID_49145] = 490,
- [BNXT_ULP_CLASS_HID_59109] = 491,
- [BNXT_ULP_CLASS_HID_58037] = 492,
- [BNXT_ULP_CLASS_HID_4143d] = 493,
- [BNXT_ULP_CLASS_HID_4079b] = 494,
- [BNXT_ULP_CLASS_HID_507af] = 495,
- [BNXT_ULP_CLASS_HID_5172b] = 496,
- [BNXT_ULP_CLASS_HID_49c05] = 497,
- [BNXT_ULP_CLASS_HID_48fa3] = 498,
- [BNXT_ULP_CLASS_HID_58f37] = 499,
- [BNXT_ULP_CLASS_HID_59f33] = 500,
- [BNXT_ULP_CLASS_HID_4030b] = 501,
- [BNXT_ULP_CLASS_HID_41317] = 502,
- [BNXT_ULP_CLASS_HID_5131b] = 503,
- [BNXT_ULP_CLASS_HID_50201] = 504,
- [BNXT_ULP_CLASS_HID_48b13] = 505,
- [BNXT_ULP_CLASS_HID_49b1f] = 506,
- [BNXT_ULP_CLASS_HID_59b23] = 507,
- [BNXT_ULP_CLASS_HID_58a09] = 508,
- [BNXT_ULP_CLASS_HID_419bf] = 509,
- [BNXT_ULP_CLASS_HID_40925] = 510,
- [BNXT_ULP_CLASS_HID_508e9] = 511,
- [BNXT_ULP_CLASS_HID_518b5] = 512,
- [BNXT_ULP_CLASS_HID_48121] = 513,
- [BNXT_ULP_CLASS_HID_490ed] = 514,
- [BNXT_ULP_CLASS_HID_590b1] = 515,
- [BNXT_ULP_CLASS_HID_583ff] = 516,
- [BNXT_ULP_CLASS_HID_41475] = 517,
- [BNXT_ULP_CLASS_HID_40473] = 518,
- [BNXT_ULP_CLASS_HID_50427] = 519,
- [BNXT_ULP_CLASS_HID_51763] = 520,
- [BNXT_ULP_CLASS_HID_49c3d] = 521,
- [BNXT_ULP_CLASS_HID_48c3b] = 522,
- [BNXT_ULP_CLASS_HID_58f6f] = 523,
- [BNXT_ULP_CLASS_HID_59f2b] = 524,
- [BNXT_ULP_CLASS_HID_40333] = 525,
- [BNXT_ULP_CLASS_HID_412bf] = 526,
- [BNXT_ULP_CLASS_HID_512a3] = 527,
- [BNXT_ULP_CLASS_HID_50229] = 528,
- [BNXT_ULP_CLASS_HID_48abb] = 529,
- [BNXT_ULP_CLASS_HID_49aa7] = 530,
- [BNXT_ULP_CLASS_HID_59a2b] = 531,
- [BNXT_ULP_CLASS_HID_595b1] = 532,
- [BNXT_ULP_CLASS_HID_41e2f] = 533,
- [BNXT_ULP_CLASS_HID_40e35] = 534,
- [BNXT_ULP_CLASS_HID_50939] = 535,
- [BNXT_ULP_CLASS_HID_51925] = 536,
- [BNXT_ULP_CLASS_HID_48631] = 537,
- [BNXT_ULP_CLASS_HID_4913d] = 538,
- [BNXT_ULP_CLASS_HID_59121] = 539,
- [BNXT_ULP_CLASS_HID_5812f] = 540,
- [BNXT_ULP_CLASS_HID_41429] = 541,
- [BNXT_ULP_CLASS_HID_40747] = 542,
- [BNXT_ULP_CLASS_HID_5070b] = 543,
- [BNXT_ULP_CLASS_HID_51727] = 544,
- [BNXT_ULP_CLASS_HID_49fe1] = 545,
- [BNXT_ULP_CLASS_HID_48f0f] = 546,
- [BNXT_ULP_CLASS_HID_58f23] = 547,
- [BNXT_ULP_CLASS_HID_59eef] = 548,
- [BNXT_ULP_CLASS_HID_40347] = 549,
- [BNXT_ULP_CLASS_HID_41303] = 550,
- [BNXT_ULP_CLASS_HID_51247] = 551,
- [BNXT_ULP_CLASS_HID_5026d] = 552,
- [BNXT_ULP_CLASS_HID_48b0f] = 553,
- [BNXT_ULP_CLASS_HID_49a4b] = 554,
- [BNXT_ULP_CLASS_HID_59a0f] = 555,
- [BNXT_ULP_CLASS_HID_58a05] = 556,
- [BNXT_ULP_CLASS_HID_41983] = 557,
- [BNXT_ULP_CLASS_HID_40929] = 558,
- [BNXT_ULP_CLASS_HID_5092d] = 559,
- [BNXT_ULP_CLASS_HID_518a9] = 560,
- [BNXT_ULP_CLASS_HID_48125] = 561,
- [BNXT_ULP_CLASS_HID_49121] = 562,
- [BNXT_ULP_CLASS_HID_59085] = 563,
- [BNXT_ULP_CLASS_HID_58023] = 564,
- [BNXT_ULP_CLASS_HID_41509] = 565,
- [BNXT_ULP_CLASS_HID_40407] = 566,
- [BNXT_ULP_CLASS_HID_5040b] = 567,
- [BNXT_ULP_CLASS_HID_51407] = 568,
- [BNXT_ULP_CLASS_HID_49d21] = 569,
- [BNXT_ULP_CLASS_HID_48c0f] = 570,
- [BNXT_ULP_CLASS_HID_58c03] = 571,
- [BNXT_ULP_CLASS_HID_59f0f] = 572,
- [BNXT_ULP_CLASS_HID_402ef] = 573,
- [BNXT_ULP_CLASS_HID_412ab] = 574,
- [BNXT_ULP_CLASS_HID_5126f] = 575,
- [BNXT_ULP_CLASS_HID_50de5] = 576,
- [BNXT_ULP_CLASS_HID_48aa7] = 577,
- [BNXT_ULP_CLASS_HID_485ed] = 578,
- [BNXT_ULP_CLASS_HID_585e1] = 579,
- [BNXT_ULP_CLASS_HID_595ad] = 580,
- [BNXT_ULP_CLASS_HID_41e6b] = 581,
- [BNXT_ULP_CLASS_HID_40961] = 582,
- [BNXT_ULP_CLASS_HID_50925] = 583,
- [BNXT_ULP_CLASS_HID_51961] = 584,
- [BNXT_ULP_CLASS_HID_4816d] = 585,
- [BNXT_ULP_CLASS_HID_49129] = 586,
- [BNXT_ULP_CLASS_HID_5916d] = 587,
- [BNXT_ULP_CLASS_HID_5806b] = 588,
- [BNXT_ULP_CLASS_HID_414a1] = 589,
- [BNXT_ULP_CLASS_HID_4042f] = 590,
- [BNXT_ULP_CLASS_HID_507a3] = 591,
- [BNXT_ULP_CLASS_HID_517af] = 592,
- [BNXT_ULP_CLASS_HID_49c29] = 593,
- [BNXT_ULP_CLASS_HID_48fa7] = 594,
- [BNXT_ULP_CLASS_HID_58fab] = 595,
- [BNXT_ULP_CLASS_HID_59f27] = 596,
- [BNXT_ULP_CLASS_HID_4032f] = 597,
- [BNXT_ULP_CLASS_HID_4132b] = 598,
- [BNXT_ULP_CLASS_HID_5132f] = 599,
- [BNXT_ULP_CLASS_HID_50225] = 600,
- [BNXT_ULP_CLASS_HID_48b27] = 601,
- [BNXT_ULP_CLASS_HID_49b23] = 602,
- [BNXT_ULP_CLASS_HID_59b27] = 603,
- [BNXT_ULP_CLASS_HID_58a2d] = 604,
- [BNXT_ULP_CLASS_HID_10437] = 605,
- [BNXT_ULP_CLASS_HID_11017] = 606,
- [BNXT_ULP_CLASS_HID_1402b] = 607,
- [BNXT_ULP_CLASS_HID_15c0b] = 608,
- [BNXT_ULP_CLASS_HID_12639] = 609,
- [BNXT_ULP_CLASS_HID_13219] = 610,
- [BNXT_ULP_CLASS_HID_16ddd] = 611,
- [BNXT_ULP_CLASS_HID_17e3d] = 612,
- [BNXT_ULP_CLASS_HID_11333] = 613,
- [BNXT_ULP_CLASS_HID_10ef5] = 614,
- [BNXT_ULP_CLASS_HID_15f37] = 615,
- [BNXT_ULP_CLASS_HID_14ae9] = 616,
- [BNXT_ULP_CLASS_HID_13d25] = 617,
- [BNXT_ULP_CLASS_HID_128e7] = 618,
- [BNXT_ULP_CLASS_HID_17939] = 619,
- [BNXT_ULP_CLASS_HID_174fb] = 620,
- [BNXT_ULP_CLASS_HID_10985] = 621,
- [BNXT_ULP_CLASS_HID_10547] = 622,
- [BNXT_ULP_CLASS_HID_155a9] = 623,
- [BNXT_ULP_CLASS_HID_1416b] = 624,
- [BNXT_ULP_CLASS_HID_12ba7] = 625,
- [BNXT_ULP_CLASS_HID_12749] = 626,
- [BNXT_ULP_CLASS_HID_177ab] = 627,
- [BNXT_ULP_CLASS_HID_1636d] = 628,
- [BNXT_ULP_CLASS_HID_10463] = 629,
- [BNXT_ULP_CLASS_HID_110a3] = 630,
- [BNXT_ULP_CLASS_HID_14067] = 631,
- [BNXT_ULP_CLASS_HID_15c67] = 632,
- [BNXT_ULP_CLASS_HID_12665] = 633,
- [BNXT_ULP_CLASS_HID_13265] = 634,
- [BNXT_ULP_CLASS_HID_16269] = 635,
- [BNXT_ULP_CLASS_HID_17e69] = 636,
- [BNXT_ULP_CLASS_HID_1133d] = 637,
- [BNXT_ULP_CLASS_HID_10eff] = 638,
- [BNXT_ULP_CLASS_HID_15ed9] = 639,
- [BNXT_ULP_CLASS_HID_14a9b] = 640,
- [BNXT_ULP_CLASS_HID_13d2f] = 641,
- [BNXT_ULP_CLASS_HID_128e9] = 642,
- [BNXT_ULP_CLASS_HID_178cb] = 643,
- [BNXT_ULP_CLASS_HID_1748d] = 644,
- [BNXT_ULP_CLASS_HID_109fb] = 645,
- [BNXT_ULP_CLASS_HID_105bd] = 646,
- [BNXT_ULP_CLASS_HID_155bf] = 647,
- [BNXT_ULP_CLASS_HID_14179] = 648,
- [BNXT_ULP_CLASS_HID_12bed] = 649,
- [BNXT_ULP_CLASS_HID_127af] = 650,
- [BNXT_ULP_CLASS_HID_177a9] = 651,
- [BNXT_ULP_CLASS_HID_1636b] = 652,
- [BNXT_ULP_CLASS_HID_1046d] = 653,
- [BNXT_ULP_CLASS_HID_1104d] = 654,
- [BNXT_ULP_CLASS_HID_14009] = 655,
- [BNXT_ULP_CLASS_HID_15c69] = 656,
- [BNXT_ULP_CLASS_HID_1260f] = 657,
- [BNXT_ULP_CLASS_HID_1326f] = 658,
- [BNXT_ULP_CLASS_HID_1622b] = 659,
- [BNXT_ULP_CLASS_HID_17e0b] = 660,
- [BNXT_ULP_CLASS_HID_11369] = 661,
- [BNXT_ULP_CLASS_HID_10f2b] = 662,
- [BNXT_ULP_CLASS_HID_15f6d] = 663,
- [BNXT_ULP_CLASS_HID_14b2f] = 664,
- [BNXT_ULP_CLASS_HID_13d6b] = 665,
- [BNXT_ULP_CLASS_HID_1292d] = 666,
- [BNXT_ULP_CLASS_HID_1792f] = 667,
- [BNXT_ULP_CLASS_HID_174e9] = 668,
- [BNXT_ULP_CLASS_HID_119e1] = 669,
- [BNXT_ULP_CLASS_HID_115a3] = 670,
- [BNXT_ULP_CLASS_HID_14563] = 671,
- [BNXT_ULP_CLASS_HID_15143] = 672,
- [BNXT_ULP_CLASS_HID_13b93] = 673,
- [BNXT_ULP_CLASS_HID_13751] = 674,
- [BNXT_ULP_CLASS_HID_16769] = 675,
- [BNXT_ULP_CLASS_HID_17349] = 676,
- [BNXT_ULP_CLASS_HID_114ab] = 677,
- [BNXT_ULP_CLASS_HID_10061] = 678,
- [BNXT_ULP_CLASS_HID_15063] = 679,
- [BNXT_ULP_CLASS_HID_14c21] = 680,
- [BNXT_ULP_CLASS_HID_13671] = 681,
- [BNXT_ULP_CLASS_HID_12233] = 682,
- [BNXT_ULP_CLASS_HID_17271] = 683,
- [BNXT_ULP_CLASS_HID_16e33] = 684,
- [BNXT_ULP_CLASS_HID_102c1] = 685,
- [BNXT_ULP_CLASS_HID_11f21] = 686,
- [BNXT_ULP_CLASS_HID_14ee1] = 687,
- [BNXT_ULP_CLASS_HID_15ac1] = 688,
- [BNXT_ULP_CLASS_HID_12cc3] = 689,
- [BNXT_ULP_CLASS_HID_13923] = 690,
- [BNXT_ULP_CLASS_HID_168e3] = 691,
- [BNXT_ULP_CLASS_HID_164a9] = 692,
- [BNXT_ULP_CLASS_HID_11e29] = 693,
- [BNXT_ULP_CLASS_HID_115eb] = 694,
- [BNXT_ULP_CLASS_HID_145a3] = 695,
- [BNXT_ULP_CLASS_HID_151a3] = 696,
- [BNXT_ULP_CLASS_HID_1382b] = 697,
- [BNXT_ULP_CLASS_HID_137e1] = 698,
- [BNXT_ULP_CLASS_HID_167a1] = 699,
- [BNXT_ULP_CLASS_HID_173a1] = 700,
- [BNXT_ULP_CLASS_HID_11449] = 701,
- [BNXT_ULP_CLASS_HID_1000b] = 702,
- [BNXT_ULP_CLASS_HID_15069] = 703,
- [BNXT_ULP_CLASS_HID_14c2b] = 704,
- [BNXT_ULP_CLASS_HID_1367b] = 705,
- [BNXT_ULP_CLASS_HID_12239] = 706,
- [BNXT_ULP_CLASS_HID_1721b] = 707,
- [BNXT_ULP_CLASS_HID_169d9] = 708,
- [BNXT_ULP_CLASS_HID_1033b] = 709,
- [BNXT_ULP_CLASS_HID_11f3b] = 710,
- [BNXT_ULP_CLASS_HID_14f2b] = 711,
- [BNXT_ULP_CLASS_HID_15b2b] = 712,
- [BNXT_ULP_CLASS_HID_12d39] = 713,
- [BNXT_ULP_CLASS_HID_13939] = 714,
- [BNXT_ULP_CLASS_HID_168f9] = 715,
- [BNXT_ULP_CLASS_HID_164bb] = 716,
- [BNXT_ULP_CLASS_HID_119cb] = 717,
- [BNXT_ULP_CLASS_HID_11589] = 718,
- [BNXT_ULP_CLASS_HID_14549] = 719,
- [BNXT_ULP_CLASS_HID_151a9] = 720,
- [BNXT_ULP_CLASS_HID_13bc9] = 721,
- [BNXT_ULP_CLASS_HID_1378b] = 722,
- [BNXT_ULP_CLASS_HID_1674b] = 723,
- [BNXT_ULP_CLASS_HID_173ab] = 724,
- [BNXT_ULP_CLASS_HID_114a9] = 725,
- [BNXT_ULP_CLASS_HID_1006b] = 726,
- [BNXT_ULP_CLASS_HID_150a9] = 727,
- [BNXT_ULP_CLASS_HID_14c6b] = 728,
- [BNXT_ULP_CLASS_HID_136ab] = 729,
- [BNXT_ULP_CLASS_HID_12269] = 730,
- [BNXT_ULP_CLASS_HID_172ab] = 731,
- [BNXT_ULP_CLASS_HID_16e69] = 732,
- [BNXT_ULP_CLASS_HID_402d2] = 733,
- [BNXT_ULP_CLASS_HID_412ee] = 734,
- [BNXT_ULP_CLASS_HID_512a2] = 735,
- [BNXT_ULP_CLASS_HID_50dd8] = 736,
- [BNXT_ULP_CLASS_HID_48aea] = 737,
- [BNXT_ULP_CLASS_HID_48500] = 738,
- [BNXT_ULP_CLASS_HID_585d4] = 739,
- [BNXT_ULP_CLASS_HID_59590] = 740,
- [BNXT_ULP_CLASS_HID_41936] = 741,
- [BNXT_ULP_CLASS_HID_409ac] = 742,
- [BNXT_ULP_CLASS_HID_50860] = 743,
- [BNXT_ULP_CLASS_HID_5183c] = 744,
- [BNXT_ULP_CLASS_HID_481a8] = 745,
- [BNXT_ULP_CLASS_HID_49064] = 746,
- [BNXT_ULP_CLASS_HID_59038] = 747,
- [BNXT_ULP_CLASS_HID_58376] = 748,
- [BNXT_ULP_CLASS_HID_414a0] = 749,
- [BNXT_ULP_CLASS_HID_407ce] = 750,
- [BNXT_ULP_CLASS_HID_50782] = 751,
- [BNXT_ULP_CLASS_HID_517ae] = 752,
- [BNXT_ULP_CLASS_HID_49f68] = 753,
- [BNXT_ULP_CLASS_HID_48f86] = 754,
- [BNXT_ULP_CLASS_HID_58faa] = 755,
- [BNXT_ULP_CLASS_HID_59e66] = 756,
- [BNXT_ULP_CLASS_HID_40266] = 757,
- [BNXT_ULP_CLASS_HID_41222] = 758,
- [BNXT_ULP_CLASS_HID_512e6] = 759,
- [BNXT_ULP_CLASS_HID_50d6c] = 760,
- [BNXT_ULP_CLASS_HID_48a2e] = 761,
- [BNXT_ULP_CLASS_HID_48564] = 762,
- [BNXT_ULP_CLASS_HID_58568] = 763,
- [BNXT_ULP_CLASS_HID_59524] = 764,
- [BNXT_ULP_CLASS_HID_419d8] = 765,
- [BNXT_ULP_CLASS_HID_4087e] = 766,
- [BNXT_ULP_CLASS_HID_5080a] = 767,
- [BNXT_ULP_CLASS_HID_518ce] = 768,
- [BNXT_ULP_CLASS_HID_4807a] = 769,
- [BNXT_ULP_CLASS_HID_4900e] = 770,
- [BNXT_ULP_CLASS_HID_590ca] = 771,
- [BNXT_ULP_CLASS_HID_58378] = 772,
- [BNXT_ULP_CLASS_HID_414be] = 773,
- [BNXT_ULP_CLASS_HID_4073c] = 774,
- [BNXT_ULP_CLASS_HID_507e8] = 775,
- [BNXT_ULP_CLASS_HID_517ac] = 776,
- [BNXT_ULP_CLASS_HID_49f7e] = 777,
- [BNXT_ULP_CLASS_HID_48fec] = 778,
- [BNXT_ULP_CLASS_HID_58fa8] = 779,
- [BNXT_ULP_CLASS_HID_59e7c] = 780,
- [BNXT_ULP_CLASS_HID_40208] = 781,
- [BNXT_ULP_CLASS_HID_412cc] = 782,
- [BNXT_ULP_CLASS_HID_51288] = 783,
- [BNXT_ULP_CLASS_HID_50d2e] = 784,
- [BNXT_ULP_CLASS_HID_48ac8] = 785,
- [BNXT_ULP_CLASS_HID_4856e] = 786,
- [BNXT_ULP_CLASS_HID_5852a] = 787,
- [BNXT_ULP_CLASS_HID_595ce] = 788,
- [BNXT_ULP_CLASS_HID_4196c] = 789,
- [BNXT_ULP_CLASS_HID_409aa] = 790,
- [BNXT_ULP_CLASS_HID_5086e] = 791,
- [BNXT_ULP_CLASS_HID_5182a] = 792,
- [BNXT_ULP_CLASS_HID_481ae] = 793,
- [BNXT_ULP_CLASS_HID_4906a] = 794,
- [BNXT_ULP_CLASS_HID_5902e] = 795,
- [BNXT_ULP_CLASS_HID_580ac] = 796,
- [BNXT_ULP_CLASS_HID_40766] = 797,
- [BNXT_ULP_CLASS_HID_41726] = 798,
- [BNXT_ULP_CLASS_HID_517f6] = 799,
- [BNXT_ULP_CLASS_HID_5066c] = 800,
- [BNXT_ULP_CLASS_HID_48f3e] = 801,
- [BNXT_ULP_CLASS_HID_49ffe] = 802,
- [BNXT_ULP_CLASS_HID_59f8e] = 803,
- [BNXT_ULP_CLASS_HID_58e24] = 804,
- [BNXT_ULP_CLASS_HID_4126e] = 805,
- [BNXT_ULP_CLASS_HID_402e4] = 806,
- [BNXT_ULP_CLASS_HID_502b4] = 807,
- [BNXT_ULP_CLASS_HID_51d74] = 808,
- [BNXT_ULP_CLASS_HID_49a26] = 809,
- [BNXT_ULP_CLASS_HID_48abc] = 810,
- [BNXT_ULP_CLASS_HID_5956c] = 811,
- [BNXT_ULP_CLASS_HID_585ee] = 812,
- [BNXT_ULP_CLASS_HID_409e4] = 813,
- [BNXT_ULP_CLASS_HID_419a4] = 814,
- [BNXT_ULP_CLASS_HID_51844] = 815,
- [BNXT_ULP_CLASS_HID_508e6] = 816,
- [BNXT_ULP_CLASS_HID_4918c] = 817,
- [BNXT_ULP_CLASS_HID_4802e] = 818,
- [BNXT_ULP_CLASS_HID_580ee] = 819,
- [BNXT_ULP_CLASS_HID_590ae] = 820,
- [BNXT_ULP_CLASS_HID_404ae] = 821,
- [BNXT_ULP_CLASS_HID_41766] = 822,
- [BNXT_ULP_CLASS_HID_5172e] = 823,
- [BNXT_ULP_CLASS_HID_507a4] = 824,
- [BNXT_ULP_CLASS_HID_48f66] = 825,
- [BNXT_ULP_CLASS_HID_49f2e] = 826,
- [BNXT_ULP_CLASS_HID_59fe6] = 827,
- [BNXT_ULP_CLASS_HID_58e6c] = 828,
- [BNXT_ULP_CLASS_HID_4126c] = 829,
- [BNXT_ULP_CLASS_HID_4028e] = 830,
- [BNXT_ULP_CLASS_HID_50d5e] = 831,
- [BNXT_ULP_CLASS_HID_51d1e] = 832,
- [BNXT_ULP_CLASS_HID_49a2c] = 833,
- [BNXT_ULP_CLASS_HID_4954e] = 834,
- [BNXT_ULP_CLASS_HID_5951e] = 835,
- [BNXT_ULP_CLASS_HID_5858c] = 836,
- [BNXT_ULP_CLASS_HID_409fe] = 837,
- [BNXT_ULP_CLASS_HID_419ee] = 838,
- [BNXT_ULP_CLASS_HID_519ae] = 839,
- [BNXT_ULP_CLASS_HID_508fc] = 840,
- [BNXT_ULP_CLASS_HID_491ee] = 841,
- [BNXT_ULP_CLASS_HID_4802c] = 842,
- [BNXT_ULP_CLASS_HID_580fc] = 843,
- [BNXT_ULP_CLASS_HID_590bc] = 844,
- [BNXT_ULP_CLASS_HID_4074c] = 845,
- [BNXT_ULP_CLASS_HID_4170c] = 846,
- [BNXT_ULP_CLASS_HID_5172c] = 847,
- [BNXT_ULP_CLASS_HID_5064e] = 848,
- [BNXT_ULP_CLASS_HID_48f0c] = 849,
- [BNXT_ULP_CLASS_HID_49fcc] = 850,
- [BNXT_ULP_CLASS_HID_59fec] = 851,
- [BNXT_ULP_CLASS_HID_58e0e] = 852,
- [BNXT_ULP_CLASS_HID_413ac] = 853,
- [BNXT_ULP_CLASS_HID_402ee] = 854,
- [BNXT_ULP_CLASS_HID_502ae] = 855,
- [BNXT_ULP_CLASS_HID_512ae] = 856,
- [BNXT_ULP_CLASS_HID_49a6c] = 857,
- [BNXT_ULP_CLASS_HID_48aae] = 858,
- [BNXT_ULP_CLASS_HID_58aae] = 859,
- [BNXT_ULP_CLASS_HID_585ec] = 860,
- [BNXT_ULP_CLASS_HID_104ae] = 861,
- [BNXT_ULP_CLASS_HID_1108e] = 862,
- [BNXT_ULP_CLASS_HID_140b2] = 863,
- [BNXT_ULP_CLASS_HID_15c92] = 864,
- [BNXT_ULP_CLASS_HID_126a0] = 865,
- [BNXT_ULP_CLASS_HID_13280] = 866,
- [BNXT_ULP_CLASS_HID_16d44] = 867,
- [BNXT_ULP_CLASS_HID_17ea4] = 868,
- [BNXT_ULP_CLASS_HID_113a4] = 869,
- [BNXT_ULP_CLASS_HID_10e66] = 870,
- [BNXT_ULP_CLASS_HID_15e40] = 871,
- [BNXT_ULP_CLASS_HID_14a02] = 872,
- [BNXT_ULP_CLASS_HID_13db6] = 873,
- [BNXT_ULP_CLASS_HID_12870] = 874,
- [BNXT_ULP_CLASS_HID_17852] = 875,
- [BNXT_ULP_CLASS_HID_17414] = 876,
- [BNXT_ULP_CLASS_HID_11978] = 877,
- [BNXT_ULP_CLASS_HID_1153a] = 878,
- [BNXT_ULP_CLASS_HID_145fa] = 879,
- [BNXT_ULP_CLASS_HID_151da] = 880,
- [BNXT_ULP_CLASS_HID_13b0a] = 881,
- [BNXT_ULP_CLASS_HID_137c8] = 882,
- [BNXT_ULP_CLASS_HID_167f0] = 883,
- [BNXT_ULP_CLASS_HID_173d0] = 884,
- [BNXT_ULP_CLASS_HID_114d0] = 885,
- [BNXT_ULP_CLASS_HID_10092] = 886,
- [BNXT_ULP_CLASS_HID_150f0] = 887,
- [BNXT_ULP_CLASS_HID_14cb2] = 888,
- [BNXT_ULP_CLASS_HID_136e2] = 889,
- [BNXT_ULP_CLASS_HID_122a0] = 890,
- [BNXT_ULP_CLASS_HID_17282] = 891,
- [BNXT_ULP_CLASS_HID_16940] = 892,
- [BNXT_ULP_CLASS_HID_11b90] = 893,
- [BNXT_ULP_CLASS_HID_11654] = 894,
- [BNXT_ULP_CLASS_HID_14618] = 895,
- [BNXT_ULP_CLASS_HID_15278] = 896,
- [BNXT_ULP_CLASS_HID_12404] = 897,
- [BNXT_ULP_CLASS_HID_13064] = 898,
- [BNXT_ULP_CLASS_HID_16028] = 899,
- [BNXT_ULP_CLASS_HID_17c08] = 900,
- [BNXT_ULP_CLASS_HID_11100] = 901,
- [BNXT_ULP_CLASS_HID_10dc4] = 902,
- [BNXT_ULP_CLASS_HID_15d24] = 903,
- [BNXT_ULP_CLASS_HID_149d0] = 904,
- [BNXT_ULP_CLASS_HID_13314] = 905,
- [BNXT_ULP_CLASS_HID_12fd4] = 906,
- [BNXT_ULP_CLASS_HID_17f20] = 907,
- [BNXT_ULP_CLASS_HID_16be0] = 908,
- [BNXT_ULP_CLASS_HID_11cd8] = 909,
- [BNXT_ULP_CLASS_HID_10880] = 910,
- [BNXT_ULP_CLASS_HID_158e0] = 911,
- [BNXT_ULP_CLASS_HID_154a0] = 912,
- [BNXT_ULP_CLASS_HID_13ed0] = 913,
- [BNXT_ULP_CLASS_HID_12a90] = 914,
- [BNXT_ULP_CLASS_HID_16550] = 915,
- [BNXT_ULP_CLASS_HID_176b0] = 916,
- [BNXT_ULP_CLASS_HID_10bb0] = 917,
- [BNXT_ULP_CLASS_HID_10670] = 918,
- [BNXT_ULP_CLASS_HID_15650] = 919,
- [BNXT_ULP_CLASS_HID_14210] = 920,
- [BNXT_ULP_CLASS_HID_13440] = 921,
- [BNXT_ULP_CLASS_HID_12000] = 922,
- [BNXT_ULP_CLASS_HID_17060] = 923,
- [BNXT_ULP_CLASS_HID_16c20] = 924,
- [BNXT_ULP_CLASS_HID_11511] = 925,
- [BNXT_ULP_CLASS_HID_101d3] = 926,
- [BNXT_ULP_CLASS_HID_15135] = 927,
- [BNXT_ULP_CLASS_HID_14df7] = 928,
- [BNXT_ULP_CLASS_HID_13723] = 929,
- [BNXT_ULP_CLASS_HID_123e5] = 930,
- [BNXT_ULP_CLASS_HID_173c7] = 931,
- [BNXT_ULP_CLASS_HID_16f89] = 932,
- [BNXT_ULP_CLASS_HID_10081] = 933,
- [BNXT_ULP_CLASS_HID_11ce1] = 934,
- [BNXT_ULP_CLASS_HID_14ca5] = 935,
- [BNXT_ULP_CLASS_HID_15885] = 936,
- [BNXT_ULP_CLASS_HID_12293] = 937,
- [BNXT_ULP_CLASS_HID_13ef3] = 938,
- [BNXT_ULP_CLASS_HID_16eb7] = 939,
- [BNXT_ULP_CLASS_HID_16561] = 940,
- [BNXT_ULP_CLASS_HID_10e59] = 941,
- [BNXT_ULP_CLASS_HID_11bb9] = 942,
- [BNXT_ULP_CLASS_HID_14a61] = 943,
- [BNXT_ULP_CLASS_HID_14623] = 944,
- [BNXT_ULP_CLASS_HID_1286b] = 945,
- [BNXT_ULP_CLASS_HID_12411] = 946,
- [BNXT_ULP_CLASS_HID_17473] = 947,
- [BNXT_ULP_CLASS_HID_16031] = 948,
- [BNXT_ULP_CLASS_HID_10531] = 949,
- [BNXT_ULP_CLASS_HID_11111] = 950,
- [BNXT_ULP_CLASS_HID_141d1] = 951,
- [BNXT_ULP_CLASS_HID_15d31] = 952,
- [BNXT_ULP_CLASS_HID_127c3] = 953,
- [BNXT_ULP_CLASS_HID_13323] = 954,
- [BNXT_ULP_CLASS_HID_163e3] = 955,
- [BNXT_ULP_CLASS_HID_17fc3] = 956,
- [BNXT_ULP_CLASS_HID_108f5] = 957,
- [BNXT_ULP_CLASS_HID_104b9] = 958,
- [BNXT_ULP_CLASS_HID_15499] = 959,
- [BNXT_ULP_CLASS_HID_1435d] = 960,
- [BNXT_ULP_CLASS_HID_12a89] = 961,
- [BNXT_ULP_CLASS_HID_12149] = 962,
- [BNXT_ULP_CLASS_HID_176ad] = 963,
- [BNXT_ULP_CLASS_HID_16d6d] = 964,
- [BNXT_ULP_CLASS_HID_10665] = 965,
- [BNXT_ULP_CLASS_HID_11245] = 966,
- [BNXT_ULP_CLASS_HID_14271] = 967,
- [BNXT_ULP_CLASS_HID_15e51] = 968,
- [BNXT_ULP_CLASS_HID_12061] = 969,
- [BNXT_ULP_CLASS_HID_13c41] = 970,
- [BNXT_ULP_CLASS_HID_16c05] = 971,
- [BNXT_ULP_CLASS_HID_17865] = 972,
- [BNXT_ULP_CLASS_HID_10d21] = 973,
- [BNXT_ULP_CLASS_HID_11901] = 974,
- [BNXT_ULP_CLASS_HID_149c1] = 975,
- [BNXT_ULP_CLASS_HID_14589] = 976,
- [BNXT_ULP_CLASS_HID_12f31] = 977,
- [BNXT_ULP_CLASS_HID_13b11] = 978,
- [BNXT_ULP_CLASS_HID_16bd9] = 979,
- [BNXT_ULP_CLASS_HID_16799] = 980,
- [BNXT_ULP_CLASS_HID_11831] = 981,
- [BNXT_ULP_CLASS_HID_114f1] = 982,
- [BNXT_ULP_CLASS_HID_144b1] = 983,
- [BNXT_ULP_CLASS_HID_15091] = 984,
- [BNXT_ULP_CLASS_HID_13ac1] = 985,
- [BNXT_ULP_CLASS_HID_13681] = 986,
- [BNXT_ULP_CLASS_HID_166b1] = 987,
- [BNXT_ULP_CLASS_HID_17291] = 988,
- [BNXT_ULP_CLASS_HID_4007d] = 989,
- [BNXT_ULP_CLASS_HID_41041] = 990,
- [BNXT_ULP_CLASS_HID_5100d] = 991,
- [BNXT_ULP_CLASS_HID_50f77] = 992,
- [BNXT_ULP_CLASS_HID_48845] = 993,
- [BNXT_ULP_CLASS_HID_487af] = 994,
- [BNXT_ULP_CLASS_HID_5877b] = 995,
- [BNXT_ULP_CLASS_HID_5973f] = 996,
- [BNXT_ULP_CLASS_HID_41c31] = 997,
- [BNXT_ULP_CLASS_HID_40b1b] = 998,
- [BNXT_ULP_CLASS_HID_50b67] = 999,
- [BNXT_ULP_CLASS_HID_51b2b] = 1000,
- [BNXT_ULP_CLASS_HID_4831f] = 1001,
- [BNXT_ULP_CLASS_HID_49363] = 1002,
- [BNXT_ULP_CLASS_HID_5932f] = 1003,
- [BNXT_ULP_CLASS_HID_58211] = 1004,
- [BNXT_ULP_CLASS_HID_4161b] = 1005,
- [BNXT_ULP_CLASS_HID_405bd] = 1006,
- [BNXT_ULP_CLASS_HID_50589] = 1007,
- [BNXT_ULP_CLASS_HID_5150d] = 1008,
- [BNXT_ULP_CLASS_HID_49e23] = 1009,
- [BNXT_ULP_CLASS_HID_48d85] = 1010,
- [BNXT_ULP_CLASS_HID_58d11] = 1011,
- [BNXT_ULP_CLASS_HID_59d15] = 1012,
- [BNXT_ULP_CLASS_HID_4012d] = 1013,
- [BNXT_ULP_CLASS_HID_41131] = 1014,
- [BNXT_ULP_CLASS_HID_5113d] = 1015,
- [BNXT_ULP_CLASS_HID_50027] = 1016,
- [BNXT_ULP_CLASS_HID_48935] = 1017,
- [BNXT_ULP_CLASS_HID_49939] = 1018,
- [BNXT_ULP_CLASS_HID_59905] = 1019,
- [BNXT_ULP_CLASS_HID_5882f] = 1020,
- [BNXT_ULP_CLASS_HID_41b99] = 1021,
- [BNXT_ULP_CLASS_HID_40b03] = 1022,
- [BNXT_ULP_CLASS_HID_50acf] = 1023,
- [BNXT_ULP_CLASS_HID_51a93] = 1024,
- [BNXT_ULP_CLASS_HID_48307] = 1025,
- [BNXT_ULP_CLASS_HID_492cb] = 1026,
- [BNXT_ULP_CLASS_HID_59297] = 1027,
- [BNXT_ULP_CLASS_HID_581d9] = 1028,
- [BNXT_ULP_CLASS_HID_41653] = 1029,
- [BNXT_ULP_CLASS_HID_40655] = 1030,
- [BNXT_ULP_CLASS_HID_50601] = 1031,
- [BNXT_ULP_CLASS_HID_51545] = 1032,
- [BNXT_ULP_CLASS_HID_49e1b] = 1033,
- [BNXT_ULP_CLASS_HID_48e1d] = 1034,
- [BNXT_ULP_CLASS_HID_58d49] = 1035,
- [BNXT_ULP_CLASS_HID_59d0d] = 1036,
- [BNXT_ULP_CLASS_HID_40115] = 1037,
- [BNXT_ULP_CLASS_HID_41099] = 1038,
- [BNXT_ULP_CLASS_HID_51085] = 1039,
- [BNXT_ULP_CLASS_HID_5000f] = 1040,
- [BNXT_ULP_CLASS_HID_4889d] = 1041,
- [BNXT_ULP_CLASS_HID_49881] = 1042,
- [BNXT_ULP_CLASS_HID_5980d] = 1043,
- [BNXT_ULP_CLASS_HID_59797] = 1044,
- [BNXT_ULP_CLASS_HID_41c09] = 1045,
- [BNXT_ULP_CLASS_HID_40c13] = 1046,
- [BNXT_ULP_CLASS_HID_50b1f] = 1047,
- [BNXT_ULP_CLASS_HID_51b03] = 1048,
- [BNXT_ULP_CLASS_HID_48417] = 1049,
- [BNXT_ULP_CLASS_HID_4931b] = 1050,
- [BNXT_ULP_CLASS_HID_59307] = 1051,
- [BNXT_ULP_CLASS_HID_58309] = 1052,
- [BNXT_ULP_CLASS_HID_4160f] = 1053,
- [BNXT_ULP_CLASS_HID_40561] = 1054,
- [BNXT_ULP_CLASS_HID_5052d] = 1055,
- [BNXT_ULP_CLASS_HID_51501] = 1056,
- [BNXT_ULP_CLASS_HID_49dc7] = 1057,
- [BNXT_ULP_CLASS_HID_48d29] = 1058,
- [BNXT_ULP_CLASS_HID_58d05] = 1059,
- [BNXT_ULP_CLASS_HID_59cc9] = 1060,
- [BNXT_ULP_CLASS_HID_40161] = 1061,
- [BNXT_ULP_CLASS_HID_41125] = 1062,
- [BNXT_ULP_CLASS_HID_51061] = 1063,
- [BNXT_ULP_CLASS_HID_5004b] = 1064,
- [BNXT_ULP_CLASS_HID_48929] = 1065,
- [BNXT_ULP_CLASS_HID_4986d] = 1066,
- [BNXT_ULP_CLASS_HID_59829] = 1067,
- [BNXT_ULP_CLASS_HID_58823] = 1068,
- [BNXT_ULP_CLASS_HID_41ba5] = 1069,
- [BNXT_ULP_CLASS_HID_40b0f] = 1070,
- [BNXT_ULP_CLASS_HID_50b0b] = 1071,
- [BNXT_ULP_CLASS_HID_51a8f] = 1072,
- [BNXT_ULP_CLASS_HID_48303] = 1073,
- [BNXT_ULP_CLASS_HID_49307] = 1074,
- [BNXT_ULP_CLASS_HID_592a3] = 1075,
- [BNXT_ULP_CLASS_HID_58205] = 1076,
- [BNXT_ULP_CLASS_HID_4172f] = 1077,
- [BNXT_ULP_CLASS_HID_40621] = 1078,
- [BNXT_ULP_CLASS_HID_5062d] = 1079,
- [BNXT_ULP_CLASS_HID_51621] = 1080,
- [BNXT_ULP_CLASS_HID_49f07] = 1081,
- [BNXT_ULP_CLASS_HID_48e29] = 1082,
- [BNXT_ULP_CLASS_HID_58e25] = 1083,
- [BNXT_ULP_CLASS_HID_59d29] = 1084,
- [BNXT_ULP_CLASS_HID_400c9] = 1085,
- [BNXT_ULP_CLASS_HID_4108d] = 1086,
- [BNXT_ULP_CLASS_HID_51049] = 1087,
- [BNXT_ULP_CLASS_HID_50fc3] = 1088,
- [BNXT_ULP_CLASS_HID_48881] = 1089,
- [BNXT_ULP_CLASS_HID_487cb] = 1090,
- [BNXT_ULP_CLASS_HID_587c7] = 1091,
- [BNXT_ULP_CLASS_HID_5978b] = 1092,
- [BNXT_ULP_CLASS_HID_41c4d] = 1093,
- [BNXT_ULP_CLASS_HID_40b47] = 1094,
- [BNXT_ULP_CLASS_HID_50b03] = 1095,
- [BNXT_ULP_CLASS_HID_51b47] = 1096,
- [BNXT_ULP_CLASS_HID_4834b] = 1097,
- [BNXT_ULP_CLASS_HID_4930f] = 1098,
- [BNXT_ULP_CLASS_HID_5934b] = 1099,
- [BNXT_ULP_CLASS_HID_5824d] = 1100,
- [BNXT_ULP_CLASS_HID_41687] = 1101,
- [BNXT_ULP_CLASS_HID_40609] = 1102,
- [BNXT_ULP_CLASS_HID_50585] = 1103,
- [BNXT_ULP_CLASS_HID_51589] = 1104,
- [BNXT_ULP_CLASS_HID_49e0f] = 1105,
- [BNXT_ULP_CLASS_HID_48d81] = 1106,
- [BNXT_ULP_CLASS_HID_58d8d] = 1107,
- [BNXT_ULP_CLASS_HID_59d01] = 1108,
- [BNXT_ULP_CLASS_HID_40109] = 1109,
- [BNXT_ULP_CLASS_HID_4110d] = 1110,
- [BNXT_ULP_CLASS_HID_51109] = 1111,
- [BNXT_ULP_CLASS_HID_50003] = 1112,
- [BNXT_ULP_CLASS_HID_48901] = 1113,
- [BNXT_ULP_CLASS_HID_49905] = 1114,
- [BNXT_ULP_CLASS_HID_59901] = 1115,
- [BNXT_ULP_CLASS_HID_5880b] = 1116,
- [BNXT_ULP_CLASS_HID_10619] = 1117,
- [BNXT_ULP_CLASS_HID_11239] = 1118,
- [BNXT_ULP_CLASS_HID_14205] = 1119,
- [BNXT_ULP_CLASS_HID_15e25] = 1120,
- [BNXT_ULP_CLASS_HID_12417] = 1121,
- [BNXT_ULP_CLASS_HID_13037] = 1122,
- [BNXT_ULP_CLASS_HID_16ff3] = 1123,
- [BNXT_ULP_CLASS_HID_17c13] = 1124,
- [BNXT_ULP_CLASS_HID_1111d] = 1125,
- [BNXT_ULP_CLASS_HID_10cdb] = 1126,
- [BNXT_ULP_CLASS_HID_15d19] = 1127,
- [BNXT_ULP_CLASS_HID_148c7] = 1128,
- [BNXT_ULP_CLASS_HID_13f0b] = 1129,
- [BNXT_ULP_CLASS_HID_12ac9] = 1130,
- [BNXT_ULP_CLASS_HID_17b17] = 1131,
- [BNXT_ULP_CLASS_HID_176d5] = 1132,
- [BNXT_ULP_CLASS_HID_10bab] = 1133,
- [BNXT_ULP_CLASS_HID_10769] = 1134,
- [BNXT_ULP_CLASS_HID_15787] = 1135,
- [BNXT_ULP_CLASS_HID_14345] = 1136,
- [BNXT_ULP_CLASS_HID_12989] = 1137,
- [BNXT_ULP_CLASS_HID_12567] = 1138,
- [BNXT_ULP_CLASS_HID_17585] = 1139,
- [BNXT_ULP_CLASS_HID_16143] = 1140,
- [BNXT_ULP_CLASS_HID_1064d] = 1141,
- [BNXT_ULP_CLASS_HID_1128d] = 1142,
- [BNXT_ULP_CLASS_HID_14249] = 1143,
- [BNXT_ULP_CLASS_HID_15e49] = 1144,
- [BNXT_ULP_CLASS_HID_1244b] = 1145,
- [BNXT_ULP_CLASS_HID_1304b] = 1146,
- [BNXT_ULP_CLASS_HID_16047] = 1147,
- [BNXT_ULP_CLASS_HID_17c47] = 1148,
- [BNXT_ULP_CLASS_HID_11113] = 1149,
- [BNXT_ULP_CLASS_HID_10cd1] = 1150,
- [BNXT_ULP_CLASS_HID_15cf7] = 1151,
- [BNXT_ULP_CLASS_HID_148b5] = 1152,
- [BNXT_ULP_CLASS_HID_13f01] = 1153,
- [BNXT_ULP_CLASS_HID_12ac7] = 1154,
- [BNXT_ULP_CLASS_HID_17ae5] = 1155,
- [BNXT_ULP_CLASS_HID_176a3] = 1156,
- [BNXT_ULP_CLASS_HID_10bd5] = 1157,
- [BNXT_ULP_CLASS_HID_10793] = 1158,
- [BNXT_ULP_CLASS_HID_15791] = 1159,
- [BNXT_ULP_CLASS_HID_14357] = 1160,
- [BNXT_ULP_CLASS_HID_129c3] = 1161,
- [BNXT_ULP_CLASS_HID_12581] = 1162,
- [BNXT_ULP_CLASS_HID_17587] = 1163,
- [BNXT_ULP_CLASS_HID_16145] = 1164,
- [BNXT_ULP_CLASS_HID_10643] = 1165,
- [BNXT_ULP_CLASS_HID_11263] = 1166,
- [BNXT_ULP_CLASS_HID_14227] = 1167,
- [BNXT_ULP_CLASS_HID_15e47] = 1168,
- [BNXT_ULP_CLASS_HID_12421] = 1169,
- [BNXT_ULP_CLASS_HID_13041] = 1170,
- [BNXT_ULP_CLASS_HID_16005] = 1171,
- [BNXT_ULP_CLASS_HID_17c25] = 1172,
- [BNXT_ULP_CLASS_HID_11147] = 1173,
- [BNXT_ULP_CLASS_HID_10d05] = 1174,
- [BNXT_ULP_CLASS_HID_15d43] = 1175,
- [BNXT_ULP_CLASS_HID_14901] = 1176,
- [BNXT_ULP_CLASS_HID_13f45] = 1177,
- [BNXT_ULP_CLASS_HID_12b03] = 1178,
- [BNXT_ULP_CLASS_HID_17b01] = 1179,
- [BNXT_ULP_CLASS_HID_176c7] = 1180,
- [BNXT_ULP_CLASS_HID_11bcf] = 1181,
- [BNXT_ULP_CLASS_HID_1178d] = 1182,
- [BNXT_ULP_CLASS_HID_1474d] = 1183,
- [BNXT_ULP_CLASS_HID_1536d] = 1184,
- [BNXT_ULP_CLASS_HID_139bd] = 1185,
- [BNXT_ULP_CLASS_HID_1357f] = 1186,
- [BNXT_ULP_CLASS_HID_16547] = 1187,
- [BNXT_ULP_CLASS_HID_17167] = 1188,
- [BNXT_ULP_CLASS_HID_11685] = 1189,
- [BNXT_ULP_CLASS_HID_1024f] = 1190,
- [BNXT_ULP_CLASS_HID_1524d] = 1191,
- [BNXT_ULP_CLASS_HID_14e0f] = 1192,
- [BNXT_ULP_CLASS_HID_1345f] = 1193,
- [BNXT_ULP_CLASS_HID_1201d] = 1194,
- [BNXT_ULP_CLASS_HID_1705f] = 1195,
- [BNXT_ULP_CLASS_HID_16c1d] = 1196,
- [BNXT_ULP_CLASS_HID_100ef] = 1197,
- [BNXT_ULP_CLASS_HID_11d0f] = 1198,
- [BNXT_ULP_CLASS_HID_14ccf] = 1199,
- [BNXT_ULP_CLASS_HID_158ef] = 1200,
- [BNXT_ULP_CLASS_HID_12eed] = 1201,
- [BNXT_ULP_CLASS_HID_13b0d] = 1202,
- [BNXT_ULP_CLASS_HID_16acd] = 1203,
- [BNXT_ULP_CLASS_HID_16687] = 1204,
- [BNXT_ULP_CLASS_HID_11c07] = 1205,
- [BNXT_ULP_CLASS_HID_117c5] = 1206,
- [BNXT_ULP_CLASS_HID_1478d] = 1207,
- [BNXT_ULP_CLASS_HID_1538d] = 1208,
- [BNXT_ULP_CLASS_HID_13a05] = 1209,
- [BNXT_ULP_CLASS_HID_135cf] = 1210,
- [BNXT_ULP_CLASS_HID_1658f] = 1211,
- [BNXT_ULP_CLASS_HID_1718f] = 1212,
- [BNXT_ULP_CLASS_HID_11667] = 1213,
- [BNXT_ULP_CLASS_HID_10225] = 1214,
- [BNXT_ULP_CLASS_HID_15247] = 1215,
- [BNXT_ULP_CLASS_HID_14e05] = 1216,
- [BNXT_ULP_CLASS_HID_13455] = 1217,
- [BNXT_ULP_CLASS_HID_12017] = 1218,
- [BNXT_ULP_CLASS_HID_17035] = 1219,
- [BNXT_ULP_CLASS_HID_16bf7] = 1220,
- [BNXT_ULP_CLASS_HID_10115] = 1221,
- [BNXT_ULP_CLASS_HID_11d15] = 1222,
- [BNXT_ULP_CLASS_HID_14d05] = 1223,
- [BNXT_ULP_CLASS_HID_15905] = 1224,
- [BNXT_ULP_CLASS_HID_12f17] = 1225,
- [BNXT_ULP_CLASS_HID_13b17] = 1226,
- [BNXT_ULP_CLASS_HID_16ad7] = 1227,
- [BNXT_ULP_CLASS_HID_16695] = 1228,
- [BNXT_ULP_CLASS_HID_11be5] = 1229,
- [BNXT_ULP_CLASS_HID_117a7] = 1230,
- [BNXT_ULP_CLASS_HID_14767] = 1231,
- [BNXT_ULP_CLASS_HID_15387] = 1232,
- [BNXT_ULP_CLASS_HID_139e7] = 1233,
- [BNXT_ULP_CLASS_HID_135a5] = 1234,
- [BNXT_ULP_CLASS_HID_16565] = 1235,
- [BNXT_ULP_CLASS_HID_17185] = 1236,
- [BNXT_ULP_CLASS_HID_11687] = 1237,
- [BNXT_ULP_CLASS_HID_10245] = 1238,
- [BNXT_ULP_CLASS_HID_15287] = 1239,
- [BNXT_ULP_CLASS_HID_14e45] = 1240,
- [BNXT_ULP_CLASS_HID_13485] = 1241,
- [BNXT_ULP_CLASS_HID_12047] = 1242,
- [BNXT_ULP_CLASS_HID_17085] = 1243,
- [BNXT_ULP_CLASS_HID_16c47] = 1244,
- [BNXT_ULP_CLASS_HID_400f4] = 1245,
- [BNXT_ULP_CLASS_HID_410c8] = 1246,
- [BNXT_ULP_CLASS_HID_51084] = 1247,
- [BNXT_ULP_CLASS_HID_50ffe] = 1248,
- [BNXT_ULP_CLASS_HID_488cc] = 1249,
- [BNXT_ULP_CLASS_HID_48726] = 1250,
- [BNXT_ULP_CLASS_HID_587f2] = 1251,
- [BNXT_ULP_CLASS_HID_597b6] = 1252,
- [BNXT_ULP_CLASS_HID_41b10] = 1253,
- [BNXT_ULP_CLASS_HID_40b8a] = 1254,
- [BNXT_ULP_CLASS_HID_50a46] = 1255,
- [BNXT_ULP_CLASS_HID_51a1a] = 1256,
- [BNXT_ULP_CLASS_HID_4838e] = 1257,
- [BNXT_ULP_CLASS_HID_49242] = 1258,
- [BNXT_ULP_CLASS_HID_5921e] = 1259,
- [BNXT_ULP_CLASS_HID_58150] = 1260,
- [BNXT_ULP_CLASS_HID_41686] = 1261,
- [BNXT_ULP_CLASS_HID_405e8] = 1262,
- [BNXT_ULP_CLASS_HID_505a4] = 1263,
- [BNXT_ULP_CLASS_HID_51588] = 1264,
- [BNXT_ULP_CLASS_HID_49d4e] = 1265,
- [BNXT_ULP_CLASS_HID_48da0] = 1266,
- [BNXT_ULP_CLASS_HID_58d8c] = 1267,
- [BNXT_ULP_CLASS_HID_59c40] = 1268,
- [BNXT_ULP_CLASS_HID_40040] = 1269,
- [BNXT_ULP_CLASS_HID_41004] = 1270,
- [BNXT_ULP_CLASS_HID_510c0] = 1271,
- [BNXT_ULP_CLASS_HID_50f4a] = 1272,
- [BNXT_ULP_CLASS_HID_48808] = 1273,
- [BNXT_ULP_CLASS_HID_48742] = 1274,
- [BNXT_ULP_CLASS_HID_5874e] = 1275,
- [BNXT_ULP_CLASS_HID_59702] = 1276,
- [BNXT_ULP_CLASS_HID_41bfe] = 1277,
- [BNXT_ULP_CLASS_HID_40a58] = 1278,
- [BNXT_ULP_CLASS_HID_50a2c] = 1279,
- [BNXT_ULP_CLASS_HID_51ae8] = 1280,
- [BNXT_ULP_CLASS_HID_4825c] = 1281,
- [BNXT_ULP_CLASS_HID_49228] = 1282,
- [BNXT_ULP_CLASS_HID_592ec] = 1283,
- [BNXT_ULP_CLASS_HID_5815e] = 1284,
- [BNXT_ULP_CLASS_HID_41698] = 1285,
- [BNXT_ULP_CLASS_HID_4051a] = 1286,
- [BNXT_ULP_CLASS_HID_505ce] = 1287,
- [BNXT_ULP_CLASS_HID_5158a] = 1288,
- [BNXT_ULP_CLASS_HID_49d58] = 1289,
- [BNXT_ULP_CLASS_HID_48dca] = 1290,
- [BNXT_ULP_CLASS_HID_58d8e] = 1291,
- [BNXT_ULP_CLASS_HID_59c5a] = 1292,
- [BNXT_ULP_CLASS_HID_4002e] = 1293,
- [BNXT_ULP_CLASS_HID_410ea] = 1294,
- [BNXT_ULP_CLASS_HID_510ae] = 1295,
- [BNXT_ULP_CLASS_HID_50f08] = 1296,
- [BNXT_ULP_CLASS_HID_488ee] = 1297,
- [BNXT_ULP_CLASS_HID_48748] = 1298,
- [BNXT_ULP_CLASS_HID_5870c] = 1299,
- [BNXT_ULP_CLASS_HID_597e8] = 1300,
- [BNXT_ULP_CLASS_HID_41b4a] = 1301,
- [BNXT_ULP_CLASS_HID_40b8c] = 1302,
- [BNXT_ULP_CLASS_HID_50a48] = 1303,
- [BNXT_ULP_CLASS_HID_51a0c] = 1304,
- [BNXT_ULP_CLASS_HID_48388] = 1305,
- [BNXT_ULP_CLASS_HID_4924c] = 1306,
- [BNXT_ULP_CLASS_HID_59208] = 1307,
- [BNXT_ULP_CLASS_HID_5828a] = 1308,
- [BNXT_ULP_CLASS_HID_40540] = 1309,
- [BNXT_ULP_CLASS_HID_41500] = 1310,
- [BNXT_ULP_CLASS_HID_515d0] = 1311,
- [BNXT_ULP_CLASS_HID_5044a] = 1312,
- [BNXT_ULP_CLASS_HID_48d18] = 1313,
- [BNXT_ULP_CLASS_HID_49dd8] = 1314,
- [BNXT_ULP_CLASS_HID_59da8] = 1315,
- [BNXT_ULP_CLASS_HID_58c02] = 1316,
- [BNXT_ULP_CLASS_HID_41048] = 1317,
- [BNXT_ULP_CLASS_HID_400c2] = 1318,
- [BNXT_ULP_CLASS_HID_50092] = 1319,
- [BNXT_ULP_CLASS_HID_51f52] = 1320,
- [BNXT_ULP_CLASS_HID_49800] = 1321,
- [BNXT_ULP_CLASS_HID_4889a] = 1322,
- [BNXT_ULP_CLASS_HID_5974a] = 1323,
- [BNXT_ULP_CLASS_HID_587c8] = 1324,
- [BNXT_ULP_CLASS_HID_40bc2] = 1325,
- [BNXT_ULP_CLASS_HID_41b82] = 1326,
- [BNXT_ULP_CLASS_HID_51a62] = 1327,
- [BNXT_ULP_CLASS_HID_50ac0] = 1328,
- [BNXT_ULP_CLASS_HID_493aa] = 1329,
- [BNXT_ULP_CLASS_HID_48208] = 1330,
- [BNXT_ULP_CLASS_HID_582c8] = 1331,
- [BNXT_ULP_CLASS_HID_59288] = 1332,
- [BNXT_ULP_CLASS_HID_40688] = 1333,
- [BNXT_ULP_CLASS_HID_41540] = 1334,
- [BNXT_ULP_CLASS_HID_51508] = 1335,
- [BNXT_ULP_CLASS_HID_50582] = 1336,
- [BNXT_ULP_CLASS_HID_48d40] = 1337,
- [BNXT_ULP_CLASS_HID_49d08] = 1338,
- [BNXT_ULP_CLASS_HID_59dc0] = 1339,
- [BNXT_ULP_CLASS_HID_58c4a] = 1340,
- [BNXT_ULP_CLASS_HID_4104a] = 1341,
- [BNXT_ULP_CLASS_HID_400a8] = 1342,
- [BNXT_ULP_CLASS_HID_50f78] = 1343,
- [BNXT_ULP_CLASS_HID_51f38] = 1344,
- [BNXT_ULP_CLASS_HID_4980a] = 1345,
- [BNXT_ULP_CLASS_HID_49768] = 1346,
- [BNXT_ULP_CLASS_HID_59738] = 1347,
- [BNXT_ULP_CLASS_HID_587aa] = 1348,
- [BNXT_ULP_CLASS_HID_40bd8] = 1349,
- [BNXT_ULP_CLASS_HID_41bc8] = 1350,
- [BNXT_ULP_CLASS_HID_51b88] = 1351,
- [BNXT_ULP_CLASS_HID_50ada] = 1352,
- [BNXT_ULP_CLASS_HID_493c8] = 1353,
- [BNXT_ULP_CLASS_HID_4820a] = 1354,
- [BNXT_ULP_CLASS_HID_582da] = 1355,
- [BNXT_ULP_CLASS_HID_5929a] = 1356,
- [BNXT_ULP_CLASS_HID_4056a] = 1357,
- [BNXT_ULP_CLASS_HID_4152a] = 1358,
- [BNXT_ULP_CLASS_HID_5150a] = 1359,
- [BNXT_ULP_CLASS_HID_50468] = 1360,
- [BNXT_ULP_CLASS_HID_48d2a] = 1361,
- [BNXT_ULP_CLASS_HID_49dea] = 1362,
- [BNXT_ULP_CLASS_HID_59dca] = 1363,
- [BNXT_ULP_CLASS_HID_58c28] = 1364,
- [BNXT_ULP_CLASS_HID_4118a] = 1365,
- [BNXT_ULP_CLASS_HID_400c8] = 1366,
- [BNXT_ULP_CLASS_HID_50088] = 1367,
- [BNXT_ULP_CLASS_HID_51088] = 1368,
- [BNXT_ULP_CLASS_HID_4984a] = 1369,
- [BNXT_ULP_CLASS_HID_48888] = 1370,
- [BNXT_ULP_CLASS_HID_58888] = 1371,
- [BNXT_ULP_CLASS_HID_587ca] = 1372,
- [BNXT_ULP_CLASS_HID_10690] = 1373,
- [BNXT_ULP_CLASS_HID_112b0] = 1374,
- [BNXT_ULP_CLASS_HID_1428c] = 1375,
- [BNXT_ULP_CLASS_HID_15eac] = 1376,
- [BNXT_ULP_CLASS_HID_1249e] = 1377,
- [BNXT_ULP_CLASS_HID_130be] = 1378,
- [BNXT_ULP_CLASS_HID_16f7a] = 1379,
- [BNXT_ULP_CLASS_HID_17c9a] = 1380,
- [BNXT_ULP_CLASS_HID_1119a] = 1381,
- [BNXT_ULP_CLASS_HID_10c58] = 1382,
- [BNXT_ULP_CLASS_HID_15c7e] = 1383,
- [BNXT_ULP_CLASS_HID_1483c] = 1384,
- [BNXT_ULP_CLASS_HID_13f88] = 1385,
- [BNXT_ULP_CLASS_HID_12a4e] = 1386,
- [BNXT_ULP_CLASS_HID_17a6c] = 1387,
- [BNXT_ULP_CLASS_HID_1762a] = 1388,
- [BNXT_ULP_CLASS_HID_11b46] = 1389,
- [BNXT_ULP_CLASS_HID_11704] = 1390,
- [BNXT_ULP_CLASS_HID_147c4] = 1391,
- [BNXT_ULP_CLASS_HID_153e4] = 1392,
- [BNXT_ULP_CLASS_HID_13934] = 1393,
- [BNXT_ULP_CLASS_HID_135f6] = 1394,
- [BNXT_ULP_CLASS_HID_165ce] = 1395,
- [BNXT_ULP_CLASS_HID_171ee] = 1396,
- [BNXT_ULP_CLASS_HID_116ee] = 1397,
- [BNXT_ULP_CLASS_HID_102ac] = 1398,
- [BNXT_ULP_CLASS_HID_152ce] = 1399,
- [BNXT_ULP_CLASS_HID_14e8c] = 1400,
- [BNXT_ULP_CLASS_HID_134dc] = 1401,
- [BNXT_ULP_CLASS_HID_1209e] = 1402,
- [BNXT_ULP_CLASS_HID_170bc] = 1403,
- [BNXT_ULP_CLASS_HID_16b7e] = 1404,
- [BNXT_ULP_CLASS_HID_119ae] = 1405,
- [BNXT_ULP_CLASS_HID_1146a] = 1406,
- [BNXT_ULP_CLASS_HID_14426] = 1407,
- [BNXT_ULP_CLASS_HID_15046] = 1408,
- [BNXT_ULP_CLASS_HID_1263a] = 1409,
- [BNXT_ULP_CLASS_HID_1325a] = 1410,
- [BNXT_ULP_CLASS_HID_16216] = 1411,
- [BNXT_ULP_CLASS_HID_17e36] = 1412,
- [BNXT_ULP_CLASS_HID_1133e] = 1413,
- [BNXT_ULP_CLASS_HID_10ffa] = 1414,
- [BNXT_ULP_CLASS_HID_15f1a] = 1415,
- [BNXT_ULP_CLASS_HID_14bee] = 1416,
- [BNXT_ULP_CLASS_HID_1312a] = 1417,
- [BNXT_ULP_CLASS_HID_12dea] = 1418,
- [BNXT_ULP_CLASS_HID_17d1e] = 1419,
- [BNXT_ULP_CLASS_HID_169de] = 1420,
- [BNXT_ULP_CLASS_HID_11ee6] = 1421,
- [BNXT_ULP_CLASS_HID_10abe] = 1422,
- [BNXT_ULP_CLASS_HID_15ade] = 1423,
- [BNXT_ULP_CLASS_HID_1569e] = 1424,
- [BNXT_ULP_CLASS_HID_13cee] = 1425,
- [BNXT_ULP_CLASS_HID_128ae] = 1426,
- [BNXT_ULP_CLASS_HID_1676e] = 1427,
- [BNXT_ULP_CLASS_HID_1748e] = 1428,
- [BNXT_ULP_CLASS_HID_1098e] = 1429,
- [BNXT_ULP_CLASS_HID_1044e] = 1430,
- [BNXT_ULP_CLASS_HID_1546e] = 1431,
- [BNXT_ULP_CLASS_HID_1402e] = 1432,
- [BNXT_ULP_CLASS_HID_1367e] = 1433,
- [BNXT_ULP_CLASS_HID_1223e] = 1434,
- [BNXT_ULP_CLASS_HID_1725e] = 1435,
- [BNXT_ULP_CLASS_HID_16e1e] = 1436,
- [BNXT_ULP_CLASS_HID_1172f] = 1437,
- [BNXT_ULP_CLASS_HID_103ed] = 1438,
- [BNXT_ULP_CLASS_HID_1530b] = 1439,
- [BNXT_ULP_CLASS_HID_14fc9] = 1440,
- [BNXT_ULP_CLASS_HID_1351d] = 1441,
- [BNXT_ULP_CLASS_HID_121db] = 1442,
- [BNXT_ULP_CLASS_HID_171f9] = 1443,
- [BNXT_ULP_CLASS_HID_16db7] = 1444,
- [BNXT_ULP_CLASS_HID_102bf] = 1445,
- [BNXT_ULP_CLASS_HID_11edf] = 1446,
- [BNXT_ULP_CLASS_HID_14e9b] = 1447,
- [BNXT_ULP_CLASS_HID_15abb] = 1448,
- [BNXT_ULP_CLASS_HID_120ad] = 1449,
- [BNXT_ULP_CLASS_HID_13ccd] = 1450,
- [BNXT_ULP_CLASS_HID_16c89] = 1451,
- [BNXT_ULP_CLASS_HID_1675f] = 1452,
- [BNXT_ULP_CLASS_HID_10c67] = 1453,
- [BNXT_ULP_CLASS_HID_11987] = 1454,
- [BNXT_ULP_CLASS_HID_1485f] = 1455,
- [BNXT_ULP_CLASS_HID_1441d] = 1456,
- [BNXT_ULP_CLASS_HID_12a55] = 1457,
- [BNXT_ULP_CLASS_HID_1262f] = 1458,
- [BNXT_ULP_CLASS_HID_1764d] = 1459,
- [BNXT_ULP_CLASS_HID_1620f] = 1460,
- [BNXT_ULP_CLASS_HID_1070f] = 1461,
- [BNXT_ULP_CLASS_HID_1132f] = 1462,
- [BNXT_ULP_CLASS_HID_143ef] = 1463,
- [BNXT_ULP_CLASS_HID_15f0f] = 1464,
- [BNXT_ULP_CLASS_HID_125fd] = 1465,
- [BNXT_ULP_CLASS_HID_1311d] = 1466,
- [BNXT_ULP_CLASS_HID_161dd] = 1467,
- [BNXT_ULP_CLASS_HID_17dfd] = 1468,
- [BNXT_ULP_CLASS_HID_10acb] = 1469,
- [BNXT_ULP_CLASS_HID_10687] = 1470,
- [BNXT_ULP_CLASS_HID_156a7] = 1471,
- [BNXT_ULP_CLASS_HID_14163] = 1472,
- [BNXT_ULP_CLASS_HID_128b7] = 1473,
- [BNXT_ULP_CLASS_HID_12377] = 1474,
- [BNXT_ULP_CLASS_HID_17493] = 1475,
- [BNXT_ULP_CLASS_HID_16f53] = 1476,
- [BNXT_ULP_CLASS_HID_1045b] = 1477,
- [BNXT_ULP_CLASS_HID_1107b] = 1478,
- [BNXT_ULP_CLASS_HID_1404f] = 1479,
- [BNXT_ULP_CLASS_HID_15c6f] = 1480,
- [BNXT_ULP_CLASS_HID_1225f] = 1481,
- [BNXT_ULP_CLASS_HID_13e7f] = 1482,
- [BNXT_ULP_CLASS_HID_16e3b] = 1483,
- [BNXT_ULP_CLASS_HID_17a5b] = 1484,
- [BNXT_ULP_CLASS_HID_10f1f] = 1485,
- [BNXT_ULP_CLASS_HID_11b3f] = 1486,
- [BNXT_ULP_CLASS_HID_14bff] = 1487,
- [BNXT_ULP_CLASS_HID_147b7] = 1488,
- [BNXT_ULP_CLASS_HID_12d0f] = 1489,
- [BNXT_ULP_CLASS_HID_1392f] = 1490,
- [BNXT_ULP_CLASS_HID_169e7] = 1491,
- [BNXT_ULP_CLASS_HID_165a7] = 1492,
- [BNXT_ULP_CLASS_HID_11a0f] = 1493,
- [BNXT_ULP_CLASS_HID_116cf] = 1494,
- [BNXT_ULP_CLASS_HID_1468f] = 1495,
- [BNXT_ULP_CLASS_HID_152af] = 1496,
- [BNXT_ULP_CLASS_HID_138ff] = 1497,
- [BNXT_ULP_CLASS_HID_134bf] = 1498,
- [BNXT_ULP_CLASS_HID_1648f] = 1499,
- [BNXT_ULP_CLASS_HID_170af] = 1500,
- [BNXT_ULP_CLASS_HID_40c38] = 1501,
- [BNXT_ULP_CLASS_HID_41c04] = 1502,
- [BNXT_ULP_CLASS_HID_51c48] = 1503,
- [BNXT_ULP_CLASS_HID_50332] = 1504,
- [BNXT_ULP_CLASS_HID_48400] = 1505,
- [BNXT_ULP_CLASS_HID_48bea] = 1506,
- [BNXT_ULP_CLASS_HID_58b3e] = 1507,
- [BNXT_ULP_CLASS_HID_59b7a] = 1508,
- [BNXT_ULP_CLASS_HID_417dc] = 1509,
- [BNXT_ULP_CLASS_HID_40746] = 1510,
- [BNXT_ULP_CLASS_HID_5068a] = 1511,
- [BNXT_ULP_CLASS_HID_516d6] = 1512,
- [BNXT_ULP_CLASS_HID_48f42] = 1513,
- [BNXT_ULP_CLASS_HID_49e8e] = 1514,
- [BNXT_ULP_CLASS_HID_59ed2] = 1515,
- [BNXT_ULP_CLASS_HID_58d9c] = 1516,
- [BNXT_ULP_CLASS_HID_41a4a] = 1517,
- [BNXT_ULP_CLASS_HID_40924] = 1518,
- [BNXT_ULP_CLASS_HID_50968] = 1519,
- [BNXT_ULP_CLASS_HID_51944] = 1520,
- [BNXT_ULP_CLASS_HID_49182] = 1521,
- [BNXT_ULP_CLASS_HID_4816c] = 1522,
- [BNXT_ULP_CLASS_HID_58140] = 1523,
- [BNXT_ULP_CLASS_HID_5908c] = 1524,
- [BNXT_ULP_CLASS_HID_40c8c] = 1525,
- [BNXT_ULP_CLASS_HID_41cc8] = 1526,
- [BNXT_ULP_CLASS_HID_51c0c] = 1527,
- [BNXT_ULP_CLASS_HID_50386] = 1528,
- [BNXT_ULP_CLASS_HID_484c4] = 1529,
- [BNXT_ULP_CLASS_HID_48b8e] = 1530,
- [BNXT_ULP_CLASS_HID_58b82] = 1531,
- [BNXT_ULP_CLASS_HID_59bce] = 1532,
- [BNXT_ULP_CLASS_HID_10a54] = 1533,
- [BNXT_ULP_CLASS_HID_11e74] = 1534,
- [BNXT_ULP_CLASS_HID_14e48] = 1535,
- [BNX