From patchwork Thu Aug 22 09:56:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soumyadeep Hore X-Patchwork-Id: 143309 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CE00D45845; Thu, 22 Aug 2024 12:51:00 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3579142EB8; Thu, 22 Aug 2024 12:50:57 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by mails.dpdk.org (Postfix) with ESMTP id BA51142E9D for ; Thu, 22 Aug 2024 12:50:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724323848; x=1755859848; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AfDzN/1wulD6TsJ8VBzCn/FE1MrnTQeLKaGv6usS++Y=; b=lrevqYE9nTnvEv1bBVUyLgeeJgnyfLYz3dSQYUV1lHNvMBBbvh6O2wiO saW3sy2h3hKaP4vO86q58yfRv7d+5eX98vSUzJXj0StmSYRdAHoiQa3ex hK2GBcdY7XhDVkht+TOk944tiLWjuX68HgofkKh2O6vQVnT/2YfrhAkqo WmDrR3e0FzeXLXo56ja6mNLoriqNXW4NTcvaDfjEelxjAgKjXagSz6RPL 3g7SNqnknW+cQEhngj9deKq5oTpDhvIXeg+cNzBNlceT+xkmC39pJpktY SfZri6Q44wvF0D3nn/RvQvyk/epD/L1reJiZKiMIPa05n5aWtNs8WLnYP Q==; X-CSE-ConnectionGUID: lqNeAmO+TQahV00MxY0XSw== X-CSE-MsgGUID: WRkbIOnbRhCuHDbfcIxO2A== X-IronPort-AV: E=McAfee;i="6700,10204,11171"; a="22542215" X-IronPort-AV: E=Sophos;i="6.10,166,1719903600"; d="scan'208";a="22542215" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Aug 2024 03:50:47 -0700 X-CSE-ConnectionGUID: LqyYLjhbRcq0yg24Bxw7Vg== X-CSE-MsgGUID: 92lsj5KtQlioVb3tL+Fewg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,166,1719903600"; d="scan'208";a="61559719" Received: from unknown (HELO npf-hyd-clx-03..) ([10.145.170.182]) by fmviesa010.fm.intel.com with ESMTP; 22 Aug 2024 03:50:43 -0700 From: Soumyadeep Hore To: bruce.richardson@intel.com, ian.stokes@intel.com, aman.deep.singh@intel.com Cc: dev@dpdk.org, shaiq.wani@intel.com Subject: [PATCH v1 01/12] net/ice: use correct format specifiers for unsigned ints Date: Thu, 22 Aug 2024 09:56:01 +0000 Message-ID: <20240822095612.216214-2-soumyadeep.hore@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240822095612.216214-1-soumyadeep.hore@intel.com> References: <20240822095612.216214-1-soumyadeep.hore@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Firmware was giving a number for the MSIX vectors that was way too big and obviously not right. Because of the wrong format specifier, this big number ended up looking like a tiny negative number in the logs. This was fixed by using the right format specifier everywhere it's needed. Signed-off-by: Soumyadeep Hore --- drivers/net/ice/base/ice_common.c | 54 +++++++++++++++---------------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 536392776f..48d5fff42a 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -2365,48 +2365,48 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, switch (cap) { case ICE_AQC_CAPS_VALID_FUNCTIONS: caps->valid_functions = number; - ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = 0x%x\n", prefix, caps->valid_functions); break; case ICE_AQC_CAPS_DCB: caps->dcb = (number == 1); caps->active_tc_bitmap = logical_id; caps->maxtc = phys_id; - ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb); - ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %u\n", prefix, caps->dcb); + ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = 0x%x\n", prefix, caps->active_tc_bitmap); - ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc); + ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %u\n", prefix, caps->maxtc); break; case ICE_AQC_CAPS_RSS: caps->rss_table_size = number; caps->rss_table_entry_width = logical_id; - ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %u\n", prefix, caps->rss_table_size); - ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %u\n", prefix, caps->rss_table_entry_width); break; case ICE_AQC_CAPS_RXQS: caps->num_rxq = number; caps->rxq_first_id = phys_id; - ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %u\n", prefix, caps->num_rxq); - ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %u\n", prefix, caps->rxq_first_id); break; case ICE_AQC_CAPS_TXQS: caps->num_txq = number; caps->txq_first_id = phys_id; - ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %u\n", prefix, caps->num_txq); - ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %u\n", prefix, caps->txq_first_id); break; case ICE_AQC_CAPS_MSIX: caps->num_msix_vectors = number; caps->msix_vector_first_id = phys_id; - ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %u\n", prefix, caps->num_msix_vectors); - ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix, + ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %u\n", prefix, caps->msix_vector_first_id); break; case ICE_AQC_CAPS_NVM_MGMT: @@ -2433,7 +2433,7 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, break; case ICE_AQC_CAPS_MAX_MTU: caps->max_mtu = number; - ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %d\n", + ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %u\n", prefix, caps->max_mtu); break; case ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE: @@ -2467,15 +2467,15 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, caps->ext_topo_dev_img_ver_schema[index] = (phys_id & ICE_EXT_TOPO_DEV_IMG_VER_SCHEMA) != 0; ice_debug(hw, ICE_DBG_INIT, - "%s: ext_topo_dev_img_ver_high[%d] = %d\n", + "%s: ext_topo_dev_img_ver_high[%d] = %u\n", prefix, index, caps->ext_topo_dev_img_ver_high[index]); ice_debug(hw, ICE_DBG_INIT, - "%s: ext_topo_dev_img_ver_low[%d] = %d\n", + "%s: ext_topo_dev_img_ver_low[%d] = %u\n", prefix, index, caps->ext_topo_dev_img_ver_low[index]); ice_debug(hw, ICE_DBG_INIT, - "%s: ext_topo_dev_img_part_num[%d] = %d\n", + "%s: ext_topo_dev_img_part_num[%d] = %u\n", prefix, index, caps->ext_topo_dev_img_part_num[index]); ice_debug(hw, ICE_DBG_INIT, @@ -2531,7 +2531,7 @@ ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps) if (hw->dev_caps.num_funcs > 4) { /* Max 4 TCs per port */ caps->maxtc = 4; - ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %d (based on #ports)\n", + ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %u (based on #ports)\n", caps->maxtc); } } @@ -2549,9 +2549,9 @@ ice_parse_vsi_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, struct ice_aqc_list_caps_elem *cap) { func_p->guar_num_vsi = ice_get_num_per_func(hw, ICE_MAX_VSI); - ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi (fw) = %d\n", + ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi (fw) = %u\n", LE32_TO_CPU(cap->number)); - ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi = %d\n", + ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi = %u\n", func_p->guar_num_vsi); } @@ -2636,9 +2636,9 @@ ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p) GLQF_FD_SIZE_FD_BSIZE_S; func_p->fd_fltr_best_effort = val; - ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %d\n", + ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %u\n", func_p->fd_fltr_guar); - ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %d\n", + ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %u\n", func_p->fd_fltr_best_effort); } @@ -2728,7 +2728,7 @@ ice_parse_valid_functions_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, u32 number = LE32_TO_CPU(cap->number); dev_p->num_funcs = ice_hweight32(number); - ice_debug(hw, ICE_DBG_INIT, "dev caps: num_funcs = %d\n", + ice_debug(hw, ICE_DBG_INIT, "dev caps: num_funcs = %u\n", dev_p->num_funcs); hw->logical_pf_id = ice_func_id_to_logical_id(number, hw->pf_id); @@ -2749,7 +2749,7 @@ ice_parse_vsi_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, u32 number = LE32_TO_CPU(cap->number); dev_p->num_vsi_allocd_to_host = number; - ice_debug(hw, ICE_DBG_INIT, "dev caps: num_vsi_allocd_to_host = %d\n", + ice_debug(hw, ICE_DBG_INIT, "dev caps: num_vsi_allocd_to_host = %u\n", dev_p->num_vsi_allocd_to_host); } @@ -2822,7 +2822,7 @@ ice_parse_fdir_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, u32 number = LE32_TO_CPU(cap->number); dev_p->num_flow_director_fltr = number; - ice_debug(hw, ICE_DBG_INIT, "dev caps: num_flow_director_fltr = %d\n", + ice_debug(hw, ICE_DBG_INIT, "dev caps: num_flow_director_fltr = %u\n", dev_p->num_flow_director_fltr); } @@ -2841,7 +2841,7 @@ ice_parse_nac_topo_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, dev_p->nac_topo.mode = LE32_TO_CPU(cap->number); dev_p->nac_topo.id = LE32_TO_CPU(cap->phys_id) & ICE_NAC_TOPO_ID_M; - ice_info(hw, "PF is configured in %s mode with IP instance ID %d\n", + ice_info(hw, "PF is configured in %s mode with IP instance ID %u\n", (dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M) ? "primary" : "secondary", dev_p->nac_topo.id); @@ -2849,7 +2849,7 @@ ice_parse_nac_topo_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M)); ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_dual = %d\n", !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_DUAL_M)); - ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology id = %d\n", + ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology id = %u\n", dev_p->nac_topo.id); } @@ -2927,7 +2927,7 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, default: /* Don't list common capabilities as unknown */ if (!found) - ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%d]: 0x%x\n", + ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%u]: 0x%x\n", i, cap); break; }