diff mbox series

[04/11] common/dpaax: caamflib change desc sharing mode

Message ID 20240703102649.3096530-5-g.singh@nxp.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series DPAA and DPAA2 crypto specific fixes |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Gagandeep Singh July 3, 2024, 10:26 a.m. UTC 
Updating sharing mode for aes-aes and null-aes
pdcp test cases to SHR_ALWAYS.

This patch avoid Invalid key SEC err issue.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
---
 drivers/common/dpaax/caamflib/desc/pdcp.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/drivers/common/dpaax/caamflib/desc/pdcp.h b/drivers/common/dpaax/caamflib/desc/pdcp.h
index 0ed9eec816..bc35114cf4 100644
--- a/drivers/common/dpaax/caamflib/desc/pdcp.h
+++ b/drivers/common/dpaax/caamflib/desc/pdcp.h
@@ -2349,7 +2349,7 @@  cnstr_shdsc_pdcp_c_plane_encap(uint32_t *descbuf,
 		{	/* NULL */
 			SHR_WAIT,	/* NULL */
 			SHR_WAIT,	/* SNOW f9 */
-			SHR_WAIT,	/* AES CMAC */
+			SHR_ALWAYS,	/* AES CMAC */
 			SHR_WAIT	/* ZUC-I */
 		},
 		{	/* SNOW f8 */
@@ -2361,7 +2361,7 @@  cnstr_shdsc_pdcp_c_plane_encap(uint32_t *descbuf,
 		{	/* AES CTR */
 			SHR_WAIT,	/* NULL */
 			SHR_WAIT,	/* SNOW f9 */
-			SHR_WAIT,	/* AES CMAC */
+			SHR_ALWAYS,	/* AES CMAC */
 			SHR_WAIT	/* ZUC-I */
 		},
 		{	/* ZUC-E */
@@ -2489,7 +2489,7 @@  cnstr_shdsc_pdcp_c_plane_decap(uint32_t *descbuf,
 		{	/* NULL */
 			SHR_WAIT,	/* NULL */
 			SHR_WAIT,	/* SNOW f9 */
-			SHR_WAIT,	/* AES CMAC */
+			SHR_ALWAYS,	/* AES CMAC */
 			SHR_WAIT	/* ZUC-I */
 		},
 		{	/* SNOW f8 */
@@ -2501,7 +2501,7 @@  cnstr_shdsc_pdcp_c_plane_decap(uint32_t *descbuf,
 		{	/* AES CTR */
 			SHR_WAIT,	/* NULL */
 			SHR_WAIT,	/* SNOW f9 */
-			SHR_WAIT,	/* AES CMAC */
+			SHR_ALWAYS,	/* AES CMAC */
 			SHR_WAIT	/* ZUC-I */
 		},
 		{	/* ZUC-E */
@@ -2654,7 +2654,7 @@  cnstr_shdsc_pdcp_u_plane_encap(uint32_t *descbuf,
 		{	/* NULL */
 			SHR_WAIT,	/* NULL */
 			SHR_WAIT,	/* SNOW f9 */
-			SHR_WAIT,	/* AES CMAC */
+			SHR_ALWAYS,	/* AES CMAC */
 			SHR_WAIT	/* ZUC-I */
 		},
 		{	/* SNOW f8 */
@@ -2666,7 +2666,7 @@  cnstr_shdsc_pdcp_u_plane_encap(uint32_t *descbuf,
 		{	/* AES CTR */
 			SHR_WAIT,	/* NULL */
 			SHR_WAIT,	/* SNOW f9 */
-			SHR_WAIT,	/* AES CMAC */
+			SHR_ALWAYS,	/* AES CMAC */
 			SHR_WAIT	/* ZUC-I */
 		},
 		{	/* ZUC-E */
@@ -2839,7 +2839,7 @@  cnstr_shdsc_pdcp_u_plane_decap(uint32_t *descbuf,
 		{	/* NULL */
 			SHR_WAIT,	/* NULL */
 			SHR_WAIT,	/* SNOW f9 */
-			SHR_WAIT,	/* AES CMAC */
+			SHR_ALWAYS,	/* AES CMAC */
 			SHR_WAIT	/* ZUC-I */
 		},
 		{	/* SNOW f8 */
@@ -2851,7 +2851,7 @@  cnstr_shdsc_pdcp_u_plane_decap(uint32_t *descbuf,
 		{	/* AES CTR */
 			SHR_WAIT,	/* NULL */
 			SHR_WAIT,	/* SNOW f9 */
-			SHR_WAIT,	/* AES CMAC */
+			SHR_ALWAYS,	/* AES CMAC */
 			SHR_WAIT	/* ZUC-I */
 		},
 		{	/* ZUC-E */