From patchwork Tue Jun 18 07:11:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141246 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7978345489; Tue, 18 Jun 2024 09:15:09 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 79189427E1; Tue, 18 Jun 2024 09:13:12 +0200 (CEST) Received: from smtpbgjp3.qq.com (smtpbgjp3.qq.com [54.92.39.34]) by mails.dpdk.org (Postfix) with ESMTP id 26E1840E1F; Tue, 18 Jun 2024 09:12:30 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694748trw4xqo X-QQ-Originating-IP: bZOf6qidJVcswWHhdnGW5+nqTu8wB3YFIAJH66mgz+M= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:27 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 11714324669690390713 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 16/19] net/txgbe: fix Rx interrupt Date: Tue, 18 Jun 2024 15:11:47 +0800 Message-Id: <20240618071150.21564-17-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Fix Rx interrupt enable failure. Fixes: a5682d28f134 ("net/txgbe: support Rx interrupt") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 18 +++++++++--------- drivers/net/txgbe/txgbe_ethdev_vf.c | 2 +- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 26cf7632c3..700be8f83c 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -3852,13 +3852,13 @@ txgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) struct txgbe_hw *hw = TXGBE_DEV_HW(dev); if (queue_id < 32) { - mask = rd32(hw, TXGBE_IMS(0)); - mask &= (1 << queue_id); - wr32(hw, TXGBE_IMS(0), mask); + mask = rd32(hw, TXGBE_IMC(0)); + mask |= (1 << queue_id); + wr32(hw, TXGBE_IMC(0), mask); } else if (queue_id < 64) { - mask = rd32(hw, TXGBE_IMS(1)); - mask &= (1 << (queue_id - 32)); - wr32(hw, TXGBE_IMS(1), mask); + mask = rd32(hw, TXGBE_IMC(1)); + mask |= (1 << (queue_id - 32)); + wr32(hw, TXGBE_IMC(1), mask); } rte_intr_enable(intr_handle); @@ -3873,11 +3873,11 @@ txgbe_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) if (queue_id < 32) { mask = rd32(hw, TXGBE_IMS(0)); - mask &= ~(1 << queue_id); + mask |= (1 << queue_id); wr32(hw, TXGBE_IMS(0), mask); } else if (queue_id < 64) { mask = rd32(hw, TXGBE_IMS(1)); - mask &= ~(1 << (queue_id - 32)); + mask |= (1 << (queue_id - 32)); wr32(hw, TXGBE_IMS(1), mask); } @@ -3911,7 +3911,7 @@ txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction, wr32(hw, TXGBE_IVARMISC, tmp); } else { /* rx or tx causes */ - /* Workaround for ICR lost */ + msix_vector |= TXGBE_IVAR_VLD; /* Workaround for ICR lost */ idx = ((16 * (queue & 1)) + (8 * direction)); tmp = rd32(hw, TXGBE_IVAR(queue >> 1)); tmp &= ~(0xFF << idx); diff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c index 87f76673d7..d075f9d232 100644 --- a/drivers/net/txgbe/txgbe_ethdev_vf.c +++ b/drivers/net/txgbe/txgbe_ethdev_vf.c @@ -971,7 +971,7 @@ txgbevf_set_ivar_map(struct txgbe_hw *hw, int8_t direction, wr32(hw, TXGBE_VFIVARMISC, tmp); } else { /* rx or tx cause */ - /* Workaround for ICR lost */ + msix_vector |= TXGBE_VFIVAR_VLD; /* Workaround for ICR lost */ idx = ((16 * (queue & 1)) + (8 * direction)); tmp = rd32(hw, TXGBE_VFIVAR(queue >> 1)); tmp &= ~(0xFF << idx);