From patchwork Tue Jun 18 07:11:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141243 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3FFEE45489; Tue, 18 Jun 2024 09:14:36 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 068A0427B4; Tue, 18 Jun 2024 09:12:52 +0200 (CEST) Received: from smtpbgsg2.qq.com (smtpbgsg2.qq.com [54.254.200.128]) by mails.dpdk.org (Postfix) with ESMTP id 86D0240DFB; Tue, 18 Jun 2024 09:12:23 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694740tf6lbcf X-QQ-Originating-IP: g5ND8Zar4+EqjNsRyQ4v9nfCHhPVYIyC9+qBThUyt4k= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:19 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 15333027653939455559 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 12/19] net/txgbe: correct valid MTU range Date: Tue, 18 Jun 2024 15:11:43 +0800 Message-Id: <20240618071150.21564-13-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The valid range of MTU is 68 to 9414. Set min_mtu and max_mtu in dev_info. Fixes: 3926214fd80d ("net/txgbe: support MTU set") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 12 +++++------- drivers/net/txgbe/txgbe_ethdev.h | 2 +- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 20fa0a5b05..c2df5a314b 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -2670,7 +2670,9 @@ txgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues; dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues; dev_info->min_rx_bufsize = 1024; - dev_info->max_rx_pktlen = 15872; + dev_info->max_rx_pktlen = TXGBE_MAX_MTU + TXGBE_ETH_OVERHEAD; + dev_info->min_mtu = RTE_ETHER_MIN_MTU; + dev_info->max_mtu = TXGBE_MAX_MTU; dev_info->max_mac_addrs = hw->mac.num_rar_entries; dev_info->max_hash_mac_addrs = TXGBE_VMDQ_NUM_UC_MAC; dev_info->max_vfs = pci_dev->max_vfs; @@ -3694,12 +3696,8 @@ txgbe_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) return -EINVAL; } - if (hw->mode) - wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK, - TXGBE_FRAME_SIZE_MAX); - else - wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK, - TXGBE_FRMSZ_MAX(frame_size)); + wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK, + TXGBE_FRMSZ_MAX(frame_size)); return 0; } diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h index 050acd967f..f0f4ced5b0 100644 --- a/drivers/net/txgbe/txgbe_ethdev.h +++ b/drivers/net/txgbe/txgbe_ethdev.h @@ -56,7 +56,7 @@ #define TXGBE_5TUPLE_MAX_PRI 7 #define TXGBE_5TUPLE_MIN_PRI 1 - +#define TXGBE_MAX_MTU 9414 /* The overhead from MTU to max frame size. */ #define TXGBE_ETH_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN)