From patchwork Mon Apr 22 15:40:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hernan Vargas X-Patchwork-Id: 139625 X-Patchwork-Delegate: maxime.coquelin@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CF18943EDB; Mon, 22 Apr 2024 17:44:27 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2D06F40E01; Mon, 22 Apr 2024 17:44:07 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by mails.dpdk.org (Postfix) with ESMTP id 10F9B40696 for ; Mon, 22 Apr 2024 17:44:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713800642; x=1745336642; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Qf1vqMMDSktb7OrbKxLujbZHnxAJWwgp7VxdnX1dWLQ=; b=jRTSlS2L8umBMXD78iYamodlLTPe54D9mbodGRyCG/f2MIXSL6La+WJd aOlW6gOsrr7Z8fO0TMTztV9/0gjjbhFbiwPY2PaGJUOaeFuCXQztBdcDG Y0+W9E2nu0sRYOca9WDPVtz85EN5WZ7/50mKvCSVj7YtMfFEnw2vGYet8 573e15ukJt091kNm8bUzYhjdpC5DQsBZ0Q6H6Wi/Cyne64vNRoLXM1Hzr PYrA0BFnefsiDs9CMmp1oulTCz5Eu7urEj+UJ2rahSZBdJPPA2q1iUwpG 7MXTvvoHVrGS3GRR/jG0qZZm1dSFnfI9rZo3fHNKOBKKaAglJht6SEgxQ Q==; X-CSE-ConnectionGUID: 4VN43OFdQ2qNxa8cIa4Qng== X-CSE-MsgGUID: N+H28CvtR8G2uYtYlLsACg== X-IronPort-AV: E=McAfee;i="6600,9927,11052"; a="20492701" X-IronPort-AV: E=Sophos;i="6.07,220,1708416000"; d="scan'208";a="20492701" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2024 08:43:40 -0700 X-CSE-ConnectionGUID: 3CWouIL5SlS2wZAdoAvkmw== X-CSE-MsgGUID: eW7eiUqFSsmg6LVKK45agw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,220,1708416000"; d="scan'208";a="28567533" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by fmviesa003.fm.intel.com with ESMTP; 22 Apr 2024 08:43:40 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v1 2/5] baseband/acc: remove ACC100 HARQ pruning Date: Mon, 22 Apr 2024 08:40:05 -0700 Message-Id: <20240422154008.119800-3-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20240422154008.119800-1-hernan.vargas@intel.com> References: <20240422154008.119800-1-hernan.vargas@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org HARQ pruning is not an ACC100 feature. Removing in effect dead code. Signed-off-by: Hernan Vargas Reviewed-by: Maxime Coquelin --- drivers/baseband/acc/rte_acc100_pmd.c | 33 +++++---------------------- 1 file changed, 6 insertions(+), 27 deletions(-) diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c index d6b0b9400c82..f37722879c20 100644 --- a/drivers/baseband/acc/rte_acc100_pmd.c +++ b/drivers/baseband/acc/rte_acc100_pmd.c @@ -1152,7 +1152,6 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw, uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset; uint32_t harq_index; uint32_t l; - bool harq_prun = false; uint32_t max_hc_in; fcw->qm = op->ldpc_dec.q_m; @@ -1199,13 +1198,6 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw, fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_LLR_COMPRESSION); harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset); -#ifdef ACC100_EXT_MEM - /* Limit cases when HARQ pruning is valid */ - harq_prun = ((op->ldpc_dec.harq_combined_output.offset % - ACC_HARQ_OFFSET) == 0) && - (op->ldpc_dec.harq_combined_output.offset <= UINT16_MAX - * ACC_HARQ_OFFSET); -#endif if (fcw->hcin_en > 0) { harq_in_length = op->ldpc_dec.harq_combined_input.length; if (fcw->hcin_decomp_mode > 0) @@ -1221,16 +1213,9 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw, if (fcw->hcin_decomp_mode > 0) harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC100_HARQ_ALIGN_COMP); - if ((harq_layout[harq_index].offset > 0) && harq_prun) { - rte_bbdev_log_debug("HARQ IN offset unexpected for now\n"); - fcw->hcin_size0 = harq_layout[harq_index].size0; - fcw->hcin_offset = harq_layout[harq_index].offset; - fcw->hcin_size1 = harq_in_length - harq_layout[harq_index].offset; - } else { - fcw->hcin_size0 = harq_in_length; - fcw->hcin_offset = 0; - fcw->hcin_size1 = 0; - } + fcw->hcin_size0 = harq_in_length; + fcw->hcin_offset = 0; + fcw->hcin_size1 = 0; } else { fcw->hcin_size0 = 0; fcw->hcin_offset = 0; @@ -1296,15 +1281,9 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw, if (fcw->hcout_comp_mode > 0) harq_out_length = RTE_ALIGN_FLOOR(harq_out_length, ACC100_HARQ_ALIGN_COMP); - if ((k0_p > fcw->hcin_size0 + ACC_HARQ_OFFSET_THRESHOLD) && harq_prun) { - fcw->hcout_size0 = (uint16_t) fcw->hcin_size0; - fcw->hcout_offset = k0_p & 0xFFC0; - fcw->hcout_size1 = harq_out_length - fcw->hcout_offset; - } else { - fcw->hcout_size0 = harq_out_length; - fcw->hcout_size1 = 0; - fcw->hcout_offset = 0; - } + fcw->hcout_size0 = harq_out_length; + fcw->hcout_size1 = 0; + fcw->hcout_offset = 0; if (fcw->hcout_size0 == 0) { rte_bbdev_log(ERR, " Invalid FCW : HCout %d",