From patchwork Wed Mar 6 15:49:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 138053 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 474C643C5F; Wed, 6 Mar 2024 17:19:21 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3699842E92; Wed, 6 Mar 2024 17:19:21 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 49DA840276 for ; Wed, 6 Mar 2024 17:19:20 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 4269onkh004180; Wed, 6 Mar 2024 08:19:17 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=huz3WNKL6+tuqy2RA/ezSHSygjpDm3mNdzYge98vzlg=; b=E5a 5c/LNtaZMN243MpucghIfimUA4wz61Rv4QAayWpVmRIki0nj+7ULfyU5OcObTv77 O5WAZuN3bRK8+7Ma+QaG2AVnBd/yrz9975E2RykI5kTyYwDcXJxzeskQ+g1xJACE eiKXkKZz9LPdUDDVcFjGt6e6eJi2GrENqs3ky7sH6xL3a0q5MBwcKpSOyijbTexN 7zzgzndmIKTm9+v2g0Mo+10voITAjYMO6D5hBCFqeL1QjIZ3/YfZsdGE6qR7JrDo GesE01XnUZk+WEYlEfWvKOu8eFu09mo5e/xXCR1lNN6XW7k4i+vTu86ynd8QLDQ9 vL95fb3SA/krwzxR9Sw== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3wpp7bhtf5-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 06 Mar 2024 08:19:16 -0800 (PST) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Wed, 6 Mar 2024 08:19:15 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Wed, 6 Mar 2024 08:19:15 -0800 Received: from MININT-80QBFE8.corp.innovium.com (MININT-80QBFE8.marvell.com [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id 5E7FA3F719E; Wed, 6 Mar 2024 07:50:07 -0800 (PST) From: To: , , , , Ruifeng Wang , "Bruce Richardson" CC: , Pavan Nikhilesh , Chengwen Feng , Honnappa Nagarahalli Subject: [PATCH v7 3/3] config/arm: allow WFE to be enabled config time Date: Wed, 6 Mar 2024 21:19:57 +0530 Message-ID: <20240306154957.750-3-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240306154957.750-1-pbhagavatula@marvell.com> References: <20240226073810.19015-1-pbhagavatula@marvell.com> <20240306154957.750-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 20VCKr8hy-gicrUdIE91Qs9Eb-QspjNm X-Proofpoint-GUID: 20VCKr8hy-gicrUdIE91Qs9Eb-QspjNm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-06_10,2024-03-05_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Allow RTE_ARM_USE_WFE to be enabled at meson configuration time by passing it via c_args instead of modifying `config/arm/meson.build`. Example usage: meson build -Dc_args='-DRTE_ARM_USE_WFE' \ --cross-file config/arm/arm64_cn10k_linux_gcc Signed-off-by: Pavan Nikhilesh Acked-by: Chengwen Feng Acked-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli Reviewed-by: Wathsala Vithanage --- config/arm/meson.build | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 73557bc169..88c17ed566 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -17,7 +17,9 @@ flags_common = [ # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], - ['RTE_ARM_USE_WFE', false], + # Enable use of ARM wait for event instruction. + # ['RTE_ARM_USE_WFE', false], + ['RTE_ARCH_ARM64', true], ['RTE_CACHE_LINE_SIZE', 128] ]