From patchwork Mon Mar 4 12:29:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 137891 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9D2EB43B9B; Mon, 4 Mar 2024 13:31:29 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3260142DA7; Mon, 4 Mar 2024 13:30:25 +0100 (CET) Received: from smtp-fw-80008.amazon.com (smtp-fw-80008.amazon.com [99.78.197.219]) by mails.dpdk.org (Postfix) with ESMTP id 1AE8342DD9 for ; Mon, 4 Mar 2024 13:30:22 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709555423; x=1741091423; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=vT9uLUa6L4PATln0gi7ELKwa4TTMi+RHT6LRmHl0bBY=; b=RHWRRwAlol5Mhwa9/5i5aGOrg1kqDTfsUSKulspXg7NKYiiXrkyfpl5f qaWgc+nmf6woYdVbVJJvyXxgDP7SoD5+qOAM7MV7CVtZgXTKGwsRNWPR9 ESD/RdffgHswYdWN7A36oho06YWN1HDpqtgi16ucNdxNE/a52iurVILq8 Y=; X-IronPort-AV: E=Sophos;i="6.06,203,1705363200"; d="scan'208";a="70480721" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.25.36.214]) by smtp-border-fw-80008.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Mar 2024 12:30:22 +0000 Received: from EX19MTAEUB001.ant.amazon.com [10.0.17.79:18299] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.0.36:2525] with esmtp (Farcaster) id f3514171-5a80-47da-89f6-387c263efb28; Mon, 4 Mar 2024 12:30:21 +0000 (UTC) X-Farcaster-Flow-ID: f3514171-5a80-47da-89f6-387c263efb28 Received: from EX19D007EUA003.ant.amazon.com (10.252.50.8) by EX19MTAEUB001.ant.amazon.com (10.252.51.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Mon, 4 Mar 2024 12:30:20 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA003.ant.amazon.com (10.252.50.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Mon, 4 Mar 2024 12:30:19 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.212.49) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Mon, 4 Mar 2024 12:30:18 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v2 14/33] net/ena/hal: add completion descriptor corruption check Date: Mon, 4 Mar 2024 14:29:23 +0200 Message-ID: <20240304122942.3496-15-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240304122942.3496-1-shaibran@amazon.com> References: <20240304122942.3496-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Adding a check of the MBZ (Must Be Zero) fields in the incoming tx and rx completion descriptors in order to identify corrupted descriptors. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_eth_com.c | 13 +++++++++++-- drivers/net/ena/hal/ena_eth_com.h | 14 +++++++++++++- 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/net/ena/hal/ena_eth_com.c b/drivers/net/ena/hal/ena_eth_com.c index dc2935a53e..988fa013a7 100644 --- a/drivers/net/ena/hal/ena_eth_com.c +++ b/drivers/net/ena/hal/ena_eth_com.c @@ -237,6 +237,7 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, u16 *first_cdesc_idx, u16 *num_descs) { + struct ena_com_dev *dev = ena_com_io_cq_to_ena_dev(io_cq); u16 count = io_cq->cur_rx_pkt_cdesc_count, head_masked; struct ena_eth_io_rx_cdesc_base *cdesc; u32 last = 0; @@ -252,13 +253,21 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, ena_com_cq_inc_head(io_cq); if (unlikely((status & ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK) >> ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT && count != 0)) { - struct ena_com_dev *dev = ena_com_io_cq_to_ena_dev(io_cq); - ena_trc_err(dev, "First bit is on in descriptor #%d on q_id: %d, req_id: %u\n", count, io_cq->qid, cdesc->req_id); return ENA_COM_FAULT; } + + if (unlikely((status & (ENA_ETH_IO_RX_CDESC_BASE_MBZ7_MASK | + ENA_ETH_IO_RX_CDESC_BASE_MBZ17_MASK)) && + ena_com_get_cap(dev, ENA_ADMIN_CDESC_MBZ))) { + ena_trc_err(dev, + "Corrupted RX descriptor #%d on q_id: %d, req_id: %u\n", + count, io_cq->qid, cdesc->req_id); + return ENA_COM_FAULT; + } + count++; last = (status & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) >> ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT; diff --git a/drivers/net/ena/hal/ena_eth_com.h b/drivers/net/ena/hal/ena_eth_com.h index 6a7c17f84f..2fac10e678 100644 --- a/drivers/net/ena/hal/ena_eth_com.h +++ b/drivers/net/ena/hal/ena_eth_com.h @@ -204,9 +204,11 @@ static inline void ena_com_cq_inc_head(struct ena_com_io_cq *io_cq) static inline int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, u16 *req_id) { + struct ena_com_dev *dev = ena_com_io_cq_to_ena_dev(io_cq); u8 expected_phase, cdesc_phase; struct ena_eth_io_tx_cdesc *cdesc; u16 masked_head; + u8 flags; masked_head = io_cq->head & (io_cq->q_depth - 1); expected_phase = io_cq->phase; @@ -215,14 +217,24 @@ static inline int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, ((uintptr_t)io_cq->cdesc_addr.virt_addr + (masked_head * io_cq->cdesc_entry_size_in_bytes)); + flags = READ_ONCE8(cdesc->flags); + /* When the current completion descriptor phase isn't the same as the * expected, it mean that the device still didn't update * this completion. */ - cdesc_phase = READ_ONCE8(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK; + cdesc_phase = flags & ENA_ETH_IO_TX_CDESC_PHASE_MASK; if (cdesc_phase != expected_phase) return ENA_COM_TRY_AGAIN; + if (unlikely((flags & ENA_ETH_IO_TX_CDESC_MBZ6_MASK) && + ena_com_get_cap(dev, ENA_ADMIN_CDESC_MBZ))) { + ena_trc_err(dev, + "Corrupted TX descriptor on q_id: %d, req_id: %u\n", + io_cq->qid, cdesc->req_id); + return ENA_COM_FAULT; + } + dma_rmb(); *req_id = READ_ONCE16(cdesc->req_id);