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(unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 80DAB3F718E; Fri, 1 Mar 2024 09:32:07 -0800 (PST) From: Amit Prakash Shukla To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Vamsi Attunuru CC: , , , , , Amit Prakash Shukla Subject: [PATCH v4 1/3] common/cnxk: dma result to an offset of the event Date: Fri, 1 Mar 2024 23:02:00 +0530 Message-ID: <20240301173202.2782112-1-amitprakashs@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240226094334.3657250-1-amitprakashs@marvell.com> References: <20240226094334.3657250-1-amitprakashs@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: feaf1-OA05cNiHP73eBIebVc3jhPMHeb X-Proofpoint-ORIG-GUID: feaf1-OA05cNiHP73eBIebVc3jhPMHeb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-01_19,2024-03-01_02,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Adds support to configure writing result to offset of the DMA response event. Signed-off-by: Amit Prakash Shukla --- v4: - Fixed compilation error. - Updated release notes. v3: - Rebased and fixed compilation error. v2: - Added dual workslot enqueue support. - Fixed compilation error. drivers/common/cnxk/roc_dpi.c | 6 +++++- drivers/common/cnxk/roc_dpi.h | 2 +- drivers/common/cnxk/roc_dpi_priv.h | 4 ++++ drivers/common/cnxk/roc_idev.c | 20 ++++++++++++++++++++ drivers/common/cnxk/roc_idev_priv.h | 3 +++ drivers/dma/cnxk/cnxk_dmadev.c | 2 +- 6 files changed, 34 insertions(+), 3 deletions(-) diff --git a/drivers/common/cnxk/roc_dpi.c b/drivers/common/cnxk/roc_dpi.c index c241168294..1ee777d779 100644 --- a/drivers/common/cnxk/roc_dpi.c +++ b/drivers/common/cnxk/roc_dpi.c @@ -83,6 +83,9 @@ roc_dpi_configure(struct roc_dpi *roc_dpi, uint32_t chunk_sz, uint64_t aura, uin mbox_msg.s.aura = aura; mbox_msg.s.sso_pf_func = idev_sso_pffunc_get(); mbox_msg.s.npa_pf_func = idev_npa_pffunc_get(); + mbox_msg.s.wqecsoff = idev_dma_cs_offset_get(); + if (mbox_msg.s.wqecsoff) + mbox_msg.s.wqecs = 1; rc = send_msg_to_pf(&pci_dev->addr, (const char *)&mbox_msg, sizeof(dpi_mbox_msg_t)); @@ -94,7 +97,7 @@ roc_dpi_configure(struct roc_dpi *roc_dpi, uint32_t chunk_sz, uint64_t aura, uin } int -roc_dpi_dev_init(struct roc_dpi *roc_dpi) +roc_dpi_dev_init(struct roc_dpi *roc_dpi, uint8_t offset) { struct plt_pci_device *pci_dev = roc_dpi->pci_dev; uint16_t vfid; @@ -103,6 +106,7 @@ roc_dpi_dev_init(struct roc_dpi *roc_dpi) vfid = ((pci_dev->addr.devid & 0x1F) << 3) | (pci_dev->addr.function & 0x7); vfid -= 1; roc_dpi->vfid = vfid; + idev_dma_cs_offset_set(offset); return 0; } diff --git a/drivers/common/cnxk/roc_dpi.h b/drivers/common/cnxk/roc_dpi.h index 4ebde5b8a6..978e2badb2 100644 --- a/drivers/common/cnxk/roc_dpi.h +++ b/drivers/common/cnxk/roc_dpi.h @@ -11,7 +11,7 @@ struct roc_dpi { uint16_t vfid; } __plt_cache_aligned; -int __roc_api roc_dpi_dev_init(struct roc_dpi *roc_dpi); +int __roc_api roc_dpi_dev_init(struct roc_dpi *roc_dpi, uint8_t offset); int __roc_api roc_dpi_dev_fini(struct roc_dpi *roc_dpi); int __roc_api roc_dpi_configure(struct roc_dpi *dpi, uint32_t chunk_sz, uint64_t aura, diff --git a/drivers/common/cnxk/roc_dpi_priv.h b/drivers/common/cnxk/roc_dpi_priv.h index 518a3e7351..52962c8bc0 100644 --- a/drivers/common/cnxk/roc_dpi_priv.h +++ b/drivers/common/cnxk/roc_dpi_priv.h @@ -31,6 +31,10 @@ typedef union dpi_mbox_msg_t { uint64_t sso_pf_func : 16; /* NPA PF function */ uint64_t npa_pf_func : 16; + /* WQE queue DMA completion status enable */ + uint64_t wqecs : 1; + /* WQE queue DMA completion status offset */ + uint64_t wqecsoff : 8; } s; } dpi_mbox_msg_t; diff --git a/drivers/common/cnxk/roc_idev.c b/drivers/common/cnxk/roc_idev.c index 48df3518b0..d0307c666c 100644 --- a/drivers/common/cnxk/roc_idev.c +++ b/drivers/common/cnxk/roc_idev.c @@ -301,6 +301,26 @@ idev_sso_set(struct roc_sso *sso) __atomic_store_n(&idev->sso, sso, __ATOMIC_RELEASE); } +void +idev_dma_cs_offset_set(uint8_t offset) +{ + struct idev_cfg *idev = idev_get_cfg(); + + if (idev != NULL) + idev->dma_cs_offset = offset; +} + +uint8_t +idev_dma_cs_offset_get(void) +{ + struct idev_cfg *idev = idev_get_cfg(); + + if (idev != NULL) + return idev->dma_cs_offset; + + return 0; +} + uint64_t roc_idev_nix_inl_meta_aura_get(void) { diff --git a/drivers/common/cnxk/roc_idev_priv.h b/drivers/common/cnxk/roc_idev_priv.h index 8dc1cb25bf..6628b18152 100644 --- a/drivers/common/cnxk/roc_idev_priv.h +++ b/drivers/common/cnxk/roc_idev_priv.h @@ -43,6 +43,7 @@ struct idev_cfg { struct idev_nix_inl_rx_inj_cfg inl_rx_inj_cfg; plt_spinlock_t nix_inl_dev_lock; plt_spinlock_t npa_dev_lock; + uint8_t dma_cs_offset; }; /* Generic */ @@ -61,6 +62,8 @@ void idev_sso_pffunc_set(uint16_t sso_pf_func); uint16_t idev_sso_pffunc_get(void); struct roc_sso *idev_sso_get(void); void idev_sso_set(struct roc_sso *sso); +void idev_dma_cs_offset_set(uint8_t offset); +uint8_t idev_dma_cs_offset_get(void); /* idev lmt */ uint16_t idev_lmt_pffunc_get(void); diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c index 1e7f49792c..48ab09cc38 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.c +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -592,7 +592,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_de rdpi = &dpivf->rdpi; rdpi->pci_dev = pci_dev; - rc = roc_dpi_dev_init(rdpi); + rc = roc_dpi_dev_init(rdpi, 0); if (rc < 0) goto err_out_free;